UTMC Microelectronic Systems
Abstract: No abstract text available
Text: Semicustom Products UTMC Mentor Graphics Design System Fact Sheet June 1997 Design Idea Schematic Entry Convert an FPGA Translate an External Design Synthesis UTMC Mentor Design System Design Manufacturing Overview of the Design System Advantages The UTMC Mentor Graphics Design System provides
|
Original
|
PDF
|
MENTFS-5-6-97-IS
UTMC Microelectronic Systems
|
UTMC Microelectronic Systems
Abstract: No abstract text available
Text: Semicustom Products DC Testing Guidelines for NON-JTAG Arrays Fact Sheet May 1997 INTRODUCTION As designs become more complex, testing DC threshold voltage levels for input buffers becomes more difficult. To ensure a complete and correct test is implemented, UTMC has specific
|
Original
|
PDF
|
DC-6-5-97
UTMC Microelectronic Systems
|
5962-96B02
Abstract: QML-38535
Text: Semicustom Products QML Gate Array Program Fact Sheet Dec. 1997 INTRODUCTION UTMC is the first manufacturer to achieve JAN certification and qualification to build CMOS gate arrays to the generic family qualification requirements defined in the military detail
|
Original
|
PDF
|
|
b982
Abstract: B-982 0004H 1000H 2002H UT1553 UT1553B
Text: 1.0 BUS CONTROLLER ARCHITECTURE The UTMC BC family of products provide all protocol, data handling, message error checking, and memory control functions. Discussed in this section are the following BC features and functions: The preceding section discussed the RT architecture and
|
Original
|
PDF
|
UT1553B
UT1553
b982
B-982
0004H
1000H
2002H
UT1553
|
multiplexing demultiplexing in microcontroller
Abstract: 80C196KD F-100 UT54ACS373 UT80CXX196KD
Text: UTMC Application Note UT80CXX196KD MicroController JD02* ALE Considerations Introduction: The UT80CXX196KD microcontroller incorporates a multiplexed address and data bus. As a result, the microcontroller provides an Address Latch Enable (ALE) signal to clock an external address latch. The address latch is used to
|
Original
|
PDF
|
UT80CXX196KD
UT54ACS373
AD15-AD8
A15-A8
UT80CXX196KD
multiplexing demultiplexing in microcontroller
80C196KD
F-100
UT54ACS373
|
MSI Logic
Abstract: cmos msi MSI IC UT54ACS02
Text: UTMC APPLICATION NOTE Operational Frequency versus Load Capacitance for UTMC’s RadHard MSI Product Family Introduction The following defines the operational frequency versus load capacitance for UTMC’s RadHard
|
Original
|
PDF
|
|
UT69151DXE5
Abstract: 1553 SUmmit AC01 JA01 UT63M147 UT69151DXE IJA01 358mA
Text: UTMC Application Note Calculation of Sµ µMMITTM DXE 5V Current Utilization The following describes the typical supply current consumed by the SµMMIT DXE protocol device (UT69151DXE5) during 1553 message processing. Within the DXE multi-chip module containing the JA01 protocol
|
Original
|
PDF
|
UT69151DXE5)
720mA
760mA
760mA)
UT69151DXE5
1553 SUmmit
AC01
JA01
UT63M147
UT69151DXE
IJA01
358mA
|
nand gate layout
Abstract: gating a signal using NAND gates ITN10 reset technique
Text: Semicustom Products DC Testing Guidelines for NON-JTAG Arrays Fact Sheet May 1997 INTRODUCTION As designs become more complex, testing DC threshold voltage levels for input buffers becomes more difficult. To ensure a complete and correct test is implemented, UTMC has specific
|
Original
|
PDF
|
DC-6-5-97
nand gate layout
gating a signal using NAND gates
ITN10
reset technique
|
UT63M14X
Abstract: MIL-STD-1553A
Text: UTMC ERRATA UT63M14X MIL-STD-1553A/B 5-VOLT TRANSCEIVER The following table has been amended to show updated ICC maximum numbers. Number in brackets indicates previous values.
|
Original
|
PDF
|
UT63M14X
MIL-STD-1553A/B
MIL-STD-1553A
|
MSI Logic
Abstract: Structure of D flip-flop UNITED TECHNOLOGIES MICROELECTRONICS CENTER "radhard" overview Upset
Text: Single Event Upset Design Techniques for UTMC’s RadHard MSI Logic Family Overview A Single Event Upset SEU is the result of an ion transitioning through a semiconductor structure and depositing charge on a critical circuit node within that structure. In a CMOS logic circuit,
|
Original
|
PDF
|
|
UT22VP10
Abstract: No abstract text available
Text: UTMC PRODUCT ADVISORY RADPALTM Power-On-Reset Performance at Cold Temperatures UTMC has identified the following anomaly in the power up behavior of the UT22VP10 RADPALTM . Anomaly: The anomaly was observed for power-up applications where the voltage applied to the VDD
|
Original
|
PDF
|
UT22VP10
UT22VP10
|
UP17L
Abstract: anomaly UT1553
Text: UTMC PRODUCT ADVISORY BCRT Family Bus Controller Anomaly UTMC identified the following anomaly in the production revision UP04L and UP17L, and UP11E of the UT1553 BCRT/BCRTM/BCRTMP: Background: A recent evaluation of the Bus Controller (BC) function has determined
|
Original
|
PDF
|
UP04L
UP17L,
UP11E)
UT1553
MIL-STD-1553B
100mS
UP17L
anomaly
|
25e5
Abstract: 10E6 UT63M14X
Text: UTMC APPLICATION NOTE UT63M14X 5 Volt Only Transceiver Total Dose Test Report Summary Twelve parts were tested during December 1995. Eight of the parts were nominally processed; four of the parts had process parameters pushed toward their process extremes. All twelve parts
|
Original
|
PDF
|
UT63M14X
25e5
10E6
|
vhdl
Abstract: utmc design ASIC CADENCE TOOL UTMC Microelectronic Systems
Text: Semicustom Products VHDL Design System Fact Sheet May 1997 Overview of the Design System Advantages The UTMC VHDL Design System provides VITAL• compliant sign-off quality libraries. You can use these libraries to verify an ASIC design you have created in a popular UNIXbased VHDL design environment.
|
Original
|
PDF
|
|
|
|
UT80CXX196KD
Abstract: No abstract text available
Text: UTMC Errata Sheet UT80CXX196KD JD02X NORML Instruction Operation Anomaly: There exists an anomaly with the “A,” “B,” and “C” revisions of the JD02 die (UT80CXX196KD) that the normalize
|
Original
|
PDF
|
UT80CXX196KD
JD02X)
UT80CXX196KD)
32-bit
UT80CXX196KD
|
UP17L
Abstract: self MIL-HDBK-1553 MIL-HDBK1553 anomaly commands UTMC UT1553
Text: UTMC PRODUCT ADVISORY BCRT Family Compliance to MIL-HDBK-1335 Section 5.2.2.1.3 UTMC identified the following anomaly in the production revision UP04L and UP17L of the UT1553 BCRT/BCRTM: Background:
|
Original
|
PDF
|
MIL-HDBK-1335
UP04L
UP17L)
UT1553
MIL-HDBK-1553
UP17L
self
MIL-HDBK-1553
MIL-HDBK1553
anomaly
commands
UTMC
|
Untitled
Abstract: No abstract text available
Text: UTMC APPLICATION NOTE BCRT/M RT-mode Transmission Error Message Recovery The following paragraphs discuss re-synchronization of the RT after a message error occurs. Re-synchronization of the remote terminal is required when the bus controller observes a message error, and the remote terminal has invoked
|
Original
|
PDF
|
|
UT80CXX196KD
Abstract: reset timer2 80C196KD JD02A
Text: UTMC Errata Sheet UT80CXX196KD JD02X External Timer2 Reset Functionality Anomaly: There exists an anomaly with the “A,” “B,” and “C” revisions of the JD02 die (UT80CXX196KD) where the external
|
Original
|
PDF
|
UT80CXX196KD
JD02X)
UT80CXX196KD)
80C196KD
UT80CXX196KD
UT80CXX196KD,
0000h
JD02A,
reset
timer2
JD02A
|
1000 "direct replacement"
Abstract: 5962-96891 8252 JORDAN utmc UTMC Microelectronic Systems
Text: August 1, 2002 Dear Customer: Aeroflex UTMC Microelectronic Systems Inc. UTMC appreciates your interest and use of our products, specifically the RadHard Family of PROMs. The purpose of this letter is to inform you that UTMC is migrating the 256K RadHard PROM, both 3 and 5 volt versions (Standard
|
Original
|
PDF
|
|
microcontroller radiation
Abstract: UT69RH051
Text: UTMC ERRATA Date: June 2. 1997 Document: UT69RH051 Radiation-Hardened MicroController The following table has been amended to show tne updated LET Threshold. The number in brackets indicates the previous maximum.
|
Original
|
PDF
|
UT69RH051
microcontroller radiation
|
ARINC 629 sim
Abstract: m38510/55501 AMP ARINC-629 SIM MT72038 smd cmos 4435 CQFP 240 arinc 629 controller P2X smd CERAMIC PIN GRID ARRAY CPGA lead frame arinc 629
Text: The Microelectronic Specialists Product SHORT FORM January 2001 AEROFLEX UTMC UT69151 SµMMIT DXE • UT69151 SµMMIT™ XTE ■ UT69151 SµMMIT™ RTE ■ 1760 ■ ■ ■ ■ ■ ■ ■ ■ 84,132 84 1.0E6* Q,V 5962-92118 ■ ■ ■ ■ ■ ■ ■
|
Original
|
PDF
|
UT69151
800-645-UTMC
800-THE-1553
800-THE-1553
ARINC 629 sim
m38510/55501
AMP ARINC-629 SIM
MT72038
smd cmos 4435
CQFP 240
arinc 629 controller
P2X smd
CERAMIC PIN GRID ARRAY CPGA lead frame
arinc 629
|
JORDAN
Abstract: UT8Q512 SRAM flatpack SRAM TTL UT7Q512 UT9Q512 UTXQ512
Text: UTXQ512 SRAM Product Overview Anthony Jordan Standard Product Line Manager UTMC Microelectronic Systems 719-594-8252, jordan@utmc.aeroflex.com www.utmc.com Updated January 2000 UTXQ512 SRAM • 4Mbit density – Organized 512K x 8 – 100ns X=7 and 25ns (X=8 or X=9) access time, asynchronous
|
Original
|
PDF
|
UTXQ512
100ns
100ns,
100ns
128MeV-cm2/mg
Co-60
JORDAN
UT8Q512
SRAM flatpack
SRAM TTL
UT7Q512
UT9Q512
|
UT67164
Abstract: No abstract text available
Text: UTMC ERRATA SHEET Updated Ordering Information as of 1/30/97 ORDERING INFORMATION 64K SRAM, 8K x 8 UT67164 * * * * Lead Finish: A = Solder (C) = Gold (X) = Optional Screening: (P) = Prototype (C) = Mil Temp Package Type: (P) = 28-pin DIP (W) = 28-pin Flatpack
|
Original
|
PDF
|
UT67164
28-pin
UT67164
|
UT131
Abstract: mil-std-1553 USART USART rs232 pc aeroflex sram ecc JORDAN UT80CRH196KD block diagram of telemetry RS 422 to PWM converter Pulse Code Modulation aeroflex antifuse
Text: Embedded Controller Card New Product Introduction Anthony Jordan Director - Standard Products Aeroflex UTMC 719 594-8252, jordan@utmc.aeroflex.com www.utmc.com Updated November 2001 Embedded Controller Card • General purpose system building block – System communication
|
Original
|
PDF
|
14-bit
RS-232
UT80CRH196
16MHz
RS-422
RS-485
8Kx16
UT131
UT-131
mil-std-1553 USART
USART rs232 pc
aeroflex sram ecc
JORDAN
UT80CRH196KD
block diagram of telemetry
RS 422 to PWM converter
Pulse Code Modulation
aeroflex antifuse
|
