Untitled
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
8/16-Bit
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Untitled
Abstract: No abstract text available
Text: TMS320TCI6482 www.ti.com SPRS246K – APRIL 2005 – REVISED MARCH 2012 TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246K
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x+
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
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CSR BC5
Abstract: TX01 TMS320C64x DSP Megamodule Reference Guide
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
CSR BC5
TX01
TMS320C64x DSP Megamodule Reference Guide
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SCR RC10
Abstract: tim02 a15 c15 106c 12p 02B07FFF 02C30000 fcbga package weight TMS320C6000 C6000 0257FFFF LOG RX2 0808
Text: SM320C6472-HiRel www.ti.com SPRS696B – SEPTEMBER 2010 – REVISED OCTOBER 2010 SM320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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SM320C6472-HiRel
SPRS696B
SM320C6472
8/16-Bit
SCR RC10
tim02
a15 c15 106c 12p
02B07FFF
02C30000
fcbga package weight
TMS320C6000
C6000
0257FFFF
LOG RX2 0808
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SPRM316
Abstract: C6000 DDR2-533 TCI6486 TMS320C6000 TMS320TCI6486 CSR BC5 TMS320TCI6486ZTZ 070CH
Text: TMS320TCI6486 www.ti.com SPRS300I – FEBRUARY 2006 – REVISED OCTOBER 2009 TMS320TCI6486 Communications Infrastructure Digital Signal Processor Check for Samples :TMS320TCI6486 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian
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TMS320TCI6486
SPRS300I
TMS320TCI6486
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
SPRM316
C6000
DDR2-533
TCI6486
TMS320C6000
CSR BC5
TMS320TCI6486ZTZ
070CH
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Untitled
Abstract: No abstract text available
Text: TMS320TCI6482 SPRS246J – APRIL 2005 – REVISED JULY 2011 www.ti.com TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246J
TMS320TCI6482
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x
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TNETV3020
Abstract: RGMII V1.3 SPRA839 1.5V RGMII SPRS300 SPRM316 MDIO controller TMS320TCI6486 SPRU811 SPRS612
Text: Application Report SPRAAQ4B – January 2008 – Revised October 2009 TMS320C6472/TMS320TCI6486 Hardware Design Guide Thomas Johnson . Digital Signal Processing Solutions ABSTRACT
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TMS320C6472/TMS320TCI6486
TMS320C6472/TMS320TCI6486
C6472/TCI6486)
C6472/TCI6486
TMS320TCI6486
SPRS300)
TMS320C6472
SPRS612)
TNETV3020
RGMII V1.3
SPRA839
1.5V RGMII
SPRS300
SPRM316
MDIO controller
SPRU811
SPRS612
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MDIO controller
Abstract: C6000 DDR2-533 TMS320C6000 TMS320C64x DSP Megamodule Reference Guide BED02
Text: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and
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TMS320C6472
SPRS612B
TMS320C6472
8/16-Bit
MDIO controller
C6000
DDR2-533
TMS320C6000
TMS320C64x DSP Megamodule Reference Guide
BED02
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 www.ti.com SPRS612D – JUNE 2009 – REVISED JULY 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612D
TMS320C6472
8/16-Bit
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viterbi algorithm
Abstract: No abstract text available
Text: TMS320TCI6482 Communications Infrastructure Digital Signal Processor www.ti.com SPRS246G – APRIL 2005 – REVISED APRIL 2009 1 Features • • • • • • • • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246G
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x
16-Bit)
TMS320C64x+
viterbi algorithm
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log tx 1044
Abstract: TR74 71011
Text: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and
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TMS320C6472
SPRS612B
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
log tx 1044
TR74
71011
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CSR 8811
Abstract: 8821P TMS320TCI6484
Text: TMS320TCI6484 Communications Infrastructure Digital Signal Processor Data Manual Literature Number: SPRS438E October 2009 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not
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TMS320TCI6484
SPRS438E
TMS320TCI6484
SPRS438E--October
CSR 8811
8821P
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d880 y
Abstract: transistor d880 SCR2000 SCR 2000 transistor A654 TMS320TCI6488 tms320tci6488cun TCI6487 TMS320TCI6487 ETB-2
Text: TMS320TCI6487 TMS320TCI6488 Communications Infrastructure Digital Signal Processor www.ti.com SPRS358H – APRIL 2007 – REVISED MAY 2009 • • • • • • • • • 1 High-Performance Communications Infrastructure DSP (TCI6487/8) – Instruction Cycle Time:
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TMS320TCI6487
TMS320TCI6488
SPRS358H
TCI6487/8)
25-ns
83-ns
TCI6487
800-MHz
d880 y
transistor d880
SCR2000
SCR 2000
transistor A654
TMS320TCI6488
tms320tci6488cun
TMS320TCI6487
ETB-2
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rake complex
Abstract: CDMA system implementation
Text: TMS320TCI6482 www.ti.com SPRS246K – APRIL 2005 – REVISED MARCH 2012 TMS320TCI6482 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6482 1 Features 12 • High-Performance Communications Infrastructure DSP TCI6482 – 1.17-, 1-, and 0.83-ns Instruction Cycle Time
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TMS320TCI6482
SPRS246K
TMS320TCI6482
TCI6482)
83-ns
850-MHz,
32-Bit
16-Bits)
TMS320C64x
rake complex
CDMA system implementation
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612G
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
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MT47H64M16BT-37E
Abstract: DDR2 pcb layout micron DDR2 pcb layout MT47H32M16CC-37E MT47H64M16* pcb DDR2 routing JESD-79A MT47H32M16BT-37E SPRU894 MT47H32M16
Text: Preliminary Application Report SPRAAA9B – June 2006 Implementing DDR2 PCB Layout on theTMS320TCI6482 Michael Shust . High Speed HW Productization ABSTRACT This application report contains implementation instructions for the DDR2 interface
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theTMS320TCI6482
TCI6482
MT47H64M16BT-37E
DDR2 pcb layout
micron DDR2 pcb layout
MT47H32M16CC-37E
MT47H64M16* pcb
DDR2 routing
JESD-79A
MT47H32M16BT-37E
SPRU894
MT47H32M16
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TCI6489
Abstract: Rake search accelerator CDMA system implementation Turbo Decoder wcdma viterbi
Text: TMS320TCI6489 SPRS626B – NOVEMBER 2009 – REVISED APRIL 2011 www.ti.com TMS320TCI6489 Communications Infrastructure Digital Signal Processor 1 Features • Key Features – High-Performance Communications Infrastructure DSP TCI6489 – 1.18-ns Instruction Cycle Time
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TMS320TCI6489
SPRS626B
TMS320TCI6489
TCI6489)
18-ns
850-MHz
TMS320C64x
16-/32-Bit
DDR2-667
64-Bit
TCI6489
Rake search accelerator
CDMA system implementation
Turbo Decoder wcdma viterbi
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112Bf
Abstract: SPRA387 0260F
Text: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and
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TMS320C6472
SPRS612B
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
112Bf
SPRA387
0260F
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BC5 CSR
Abstract: S128128
Text: TMS320C6472 www.ti.com SPRS612D – JUNE 2009 – REVISED JULY 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller
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TMS320C6472
SPRS612D
TMS320C6472
TMS320C64x+
32-Bit
16-Bits)
16-Bit)
256K-Bit
32K-Byte)
BC5 CSR
S128128
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ST1430
Abstract: tds-cdma transceiver C64X DDR2-667 C6000 TMS320C6000 TMS320TCI6489 SPRS626 sgmii specification ieee D880 y
Text: TMS320TCI6489 www.ti.com SPRS626 – NOVEMBER 2009 TMS320TCI6489 Communications Infrastructure Digital Signal Processor Check for Samples :TMS320TCI6489 1 Features • High-Performance Communications Infrastructure DSP TCI6489 – 1.18-ns Instruction Cycle Time
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TMS320TCI6489
SPRS626
TMS320TCI6489
TCI6489)
18-ns
850-MHz
32-Bit
TMS320C64x
16-Bit)
ST1430
tds-cdma transceiver
C64X
DDR2-667
C6000
TMS320C6000
SPRS626
sgmii specification ieee
D880 y
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TMS320TCI6488
Abstract: equivalent transistor A214 C6000 DDR2-667 TMS320C6000 TMS320TCI6487 2204 bts tds-cdma transceiver BTS 5010 TCI6488
Text: TMS320TCI6487 TMS320TCI6488 www.ti.com SPRS358J – APRIL 2007 – REVISED NOVEMBER 2009 TMS320TCI6487/8 Communications Infrastructure Digital Signal Processor Check for Samples: TMS320TCI6487 1 Features • High-Performance Communications Infrastructure DSP TCI6487/8
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TMS320TCI6487
TMS320TCI6488
SPRS358J
TMS320TCI6487/8
TCI6487/8)
25-ns
83-ns
800-MHz
TMS320TCI6488
equivalent transistor A214
C6000
DDR2-667
TMS320C6000
TMS320TCI6487
2204 bts
tds-cdma transceiver
BTS 5010
TCI6488
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Untitled
Abstract: No abstract text available
Text: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 1.1 www.ti.com CTZ/ZTZ BGA Package Bottom View The TMS320C6472 devices are designed for a package temperature range of 0°C to 85°C (commercial temperature range) or -40°C to 100°C (extended temperature range).
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TMS320C6472
SPRS612G
TMS320C6472
500-MHz
625-MHz
737-Pin
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TMS320TCI6484
Abstract: No abstract text available
Text: TMS320TCI6484 Communications Infrastructure Digital Signal Processor Data Manual Literature Number: SPRS438E October 2009 PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not
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TMS320TCI6484
SPRS438E
SPRS438Eâ
TMS320TCI6484
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