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    SN74AUC2G125DCUR Search Results

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    SN74AUC2G125DCUR Texas Instruments Dual Bus Buffer Gate with 3-State Outputs 8-VSSOP -40 to 85 Visit Texas Instruments Buy
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    IC BUFFER NON-INVERT 2.7V 8VSSOP
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    SN74AUC2G125DCUR Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN74AUC2G125DCUR Texas Instruments Dual Bus Buffer Gate with 3-State Outputs 8-US8 -40 to 85 Original PDF
    SN74AUC2G125DCUR Texas Instruments Dual Bus Buffer Gate with 3-State Outputs Original PDF
    SN74AUC2G125DCUR Texas Instruments SN74AUC2G125 - Dual Bus Buffer Gate with 3-State Outputs 8-US8 -40 to 85 Original PDF

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    SN74AUC2G125DCUR

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages


    Original
    PDF SN74AUC2G125 SCES532A 000-V A114-A) A115-A) SN74AUC2G125DCUR

    Untitled

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages


    Original
    PDF SN74AUC2G125 SCES532A 000-V A114-A) A115-A)

    A115-A

    Abstract: C101 SN74AUC2G125
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532A – DECEMBER 2003 – REVISED MARCH 2005 FEATURES • • • • • • • • • DCT OR DCU PACKAGE TOP VIEW Available in the Texas Instruments NanoStar and NanoFree™ Packages


    Original
    PDF SN74AUC2G125 SCES532A 000-V A114-A) A115-A) A115-A C101 SN74AUC2G125

    Untitled

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532B – DECEMBER 2003 – REVISED JUNE 2006 FEATURES • • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O


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    PDF SN74AUC2G125 SCES532B 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A)

    A115-A

    Abstract: C101 SN74AUC2G125 SN74AUC2G125DCUR
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A) A115-A C101 SN74AUC2G125 SN74AUC2G125DCUR

    A115-A

    Abstract: C101 SN74AUC2G125 SN74AUC2G125YEPR
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3ĆSTATE OUTPUTS SCES532A − DECEMBER 2003 − REVISED FEBRUARY 2004 D Available in the Texas Instruments D D D D D D D D DCT OR DCU PACKAGE TOP VIEW NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V


    Original
    PDF SN74AUC2G125 SCES532A 000-V A114-A) A115-A) A115-A C101 SN74AUC2G125 SN74AUC2G125YEPR

    Untitled

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532C – DECEMBER 2003 – REVISED JANUARY 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


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    PDF SN74AUC2G125 SCES532C 000-V A114-A) A115-A)

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original
    PDF P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS

    Untitled

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A)

    SN74AUC2G125DCUR

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A) SN74AUC2G125DCUR

    SN74AUC2G125DCUR

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A) SN74AUC2G125DCUR

    Untitled

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532B – DECEMBER 2003 – REVISED JUNE 2006 FEATURES • • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O


    Original
    PDF SN74AUC2G125 SCES532B 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


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    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A)

    Silego Technology

    Abstract: NL27WZ125USG NC7WZ125 SN74LVC2G125DCTR 74AUP2G125 74LVC2G125 NC7WP125 SN74AUC2G125 SN74AUP2G125 SN74LVC2G125
    Text: SLG74LB2G125 GreenLIBTM DUAL BUS BUFFER GATE WITH TRI-STATE OUTPUTS General Description Features The GreenLIB provides the dual bus buffer gate with tri-state • Pb-Free / RoHS Compliant outputs. The tri-state outputs are controlled by the output • Halogen-Free


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    PDF SLG74LB2G125 000-0074LB2G125-11 Silego Technology NL27WZ125USG NC7WZ125 SN74LVC2G125DCTR 74AUP2G125 74LVC2G125 NC7WP125 SN74AUC2G125 SN74AUP2G125 SN74LVC2G125

    A115-A

    Abstract: C101 SN74AUC2G125 SN74AUC2G125DCUR
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A) A115-A C101 SN74AUC2G125 SN74AUC2G125DCUR

    A115-A

    Abstract: C101 SN74AUC2G125 SN74AUC2G125YEPR
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3ĆSTATE OUTPUTS SCES532A − DECEMBER 2003 − REVISED FEBRUARY 2004 D Available in the Texas Instruments D D D D D D D D DCT OR DCU PACKAGE TOP VIEW NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V


    Original
    PDF SN74AUC2G125 SCES532A 000-V A114-A) A115-A) A115-A C101 SN74AUC2G125 SN74AUC2G125YEPR

    SN74AUC2G125DCUR

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A) SN74AUC2G125DCUR

    Untitled

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532B – DECEMBER 2003 – REVISED JUNE 2006 FEATURES • • • • • • • • Available in the Texas Instruments NanoStar and NanoFree™ Packages Optimized for 1.8-V Operation and Is 3.6-V I/O


    Original
    PDF SN74AUC2G125 SCES532B 000-V A114-A) A115-A)

    74ls74apc

    Abstract: HD74ls04p 74LVC1G04ady8 semiconductor AZ431BZ-AE1 HCF4060BE HEF4093BP datasheet free download ne5334 hd74hc132p dm74ls47n
    Text: Standard Linear and Logic Products Cross-Reference Introduction Notice This Standard Linear and Logic Products CrossReference will assist in finding a device made by Texas Instruments that is a drop-in or similar replacement to many of our competitors’ standard linear and logic products.


    Original
    PDF

    Untitled

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A)

    220v AC voltage stabilizer schematic diagram

    Abstract: LG color tv Circuit Diagram tda 9370 1000w inverter PURE SINE WAVE schematic diagram schematic diagram atx Power supply 500w TV SHARP IC TDA 9381 PS circuit diagram wireless spy camera 9744 mini mainboard v1.2 sony 279-87 transistor E 13005-2 superpro lx
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 AD9272 Analog Front End, iMEMS Accelerometers & Gyroscopes . . . . . . 782, 2583 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-528 Acceleration and Pressure Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . Page 2585


    Original
    PDF AD9272 P462-ND LNG295LFCP2U P463-ND LNG395MFTP5U 220v AC voltage stabilizer schematic diagram LG color tv Circuit Diagram tda 9370 1000w inverter PURE SINE WAVE schematic diagram schematic diagram atx Power supply 500w TV SHARP IC TDA 9381 PS circuit diagram wireless spy camera 9744 mini mainboard v1.2 sony 279-87 transistor E 13005-2 superpro lx

    A115-A

    Abstract: C101 SN74AUC2G125 SN74AUC2G125DCUR
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A) A115-A C101 SN74AUC2G125 SN74AUC2G125DCUR

    SN74AUC2G125DCUR

    Abstract: No abstract text available
    Text: SN74AUC2G125 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS www.ti.com SCES532D – DECEMBER 2003 – REVISED AUGUST 2007 FEATURES • • • • • Available in the Texas Instruments NanoFree Package Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal


    Original
    PDF SN74AUC2G125 SCES532D 000-V A114-A) A115-A) SN74AUC2G125DCUR