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    SN74ALVC32 Search Results

    SN74ALVC32 Result Highlights (5)

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    SN74ALVC32PW Texas Instruments Quadruple 2-Input Positive-OR Gate 14-TSSOP -40 to 85 Visit Texas Instruments Buy
    SN74ALVC32DGVR Texas Instruments Quadruple 2-Input Positive-OR Gate 14-TVSOP -40 to 85 Visit Texas Instruments Buy
    SN74ALVC32PWE4 Texas Instruments Quadruple 2-Input Positive-OR Gate 14-TSSOP -40 to 85 Visit Texas Instruments Buy
    SN74ALVC32NSR Texas Instruments Quadruple 2-Input Positive-OR Gate 14-SO -40 to 85 Visit Texas Instruments Buy
    SN74ALVC32D Texas Instruments Quadruple 2-Input Positive-OR Gate 14-SOIC -40 to 85 Visit Texas Instruments Buy
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    SN74ALVC32 Price and Stock

    Texas Instruments SN74ALVC32PWR

    IC GATE OR 4CH 2-INP 14TSSOP
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    Texas Instruments SN74ALVC32DR

    IC GATE OR 4CH 2-INP 14SOIC
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    Texas Instruments SN74ALVC32DGVR

    IC GATE OR 4CH 2-INP 14TVSOP
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    Texas Instruments SN74ALVC32NSR

    IC GATE OR 4CH 2-INP 14SO
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    Texas Instruments SN74ALVC32D

    IC GATE OR 4CH 2-INP 14SOIC
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    SN74ALVC32 Datasheets (55)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN74ALVC32 Texas Instruments Quadruple 2-Input Positive-OR Gate Original PDF
    SN74ALVC32D Texas Instruments SN74ALVC32 - Quadruple 2-Input Positive-OR Gate 14-SOIC -40 to 85 Original PDF
    SN74ALVC32D Texas Instruments QUADRUPLE 2-INPUT POSITIVE-OR GATE Original PDF
    SN74ALVC32D Texas Instruments Quadruple 2-Input Positive-OR Gate 14-SOIC -40 to 85 Original PDF
    SN74ALVC32D Texas Instruments Quadruple 2-Input Positive-OR Gate Original PDF
    SN74ALVC32DE4 Texas Instruments SN74ALVC32 - Quadruple 2-Input Positive-OR Gate 14-SOIC -40 to 85 Original PDF
    SN74ALVC32DE4 Texas Instruments Quadruple 2-Input Positive-OR Gate 14-SOIC -40 to 85 Original PDF
    SN74ALVC32DE4 Texas Instruments Quadruple 2-Input Positive-OR Gate Original PDF
    SN74ALVC32DG4 Texas Instruments SN74ALVC32 - Quadruple 2-Input Positive-OR Gate 14-SOIC -40 to 85 Original PDF
    SN74ALVC32DG4 Texas Instruments Quadruple 2-Input Positive-OR Gate 14-SOIC -40 to 85 Original PDF
    SN74ALVC32DGV Texas Instruments QUADRUPLE 2-INPUT POSITIVE-OR GATE Original PDF
    SN74ALVC32DGV Texas Instruments Quadruple 2-Input Positive-OR Gate Original PDF
    SN74ALVC32DGVR Texas Instruments SN74ALVC32 - Quadruple 2-Input Positive-OR Gate 14-TVSOP -40 to 85 Original PDF
    SN74ALVC32DGVR Texas Instruments Quadruple 2-Input Positive-OR Gate 14-TVSOP -40 to 85 Original PDF
    SN74ALVC32DGVR Texas Instruments Quadruple 2-Input Positive-OR Gate Original PDF
    SN74ALVC32DGVRE4 Texas Instruments Quadruple 2-Input Positive-OR Gate Original PDF
    SN74ALVC32DGVRE4 Texas Instruments SN74ALVC32 - Quadruple 2-Input Positive-OR Gate 14-TVSOP -40 to 85 Original PDF
    SN74ALVC32DGVRE4 Texas Instruments Quadruple 2-Input Positive-OR Gate 14-TVSOP -40 to 85 Original PDF
    SN74ALVC32DGVRG4 Texas Instruments Quadruple 2-Input Positive-OR Gate 14-TVSOP -40 to 85 Original PDF
    SN74ALVC32DGVRG4 Texas Instruments SN74ALVC32 - Quadruple 2-Input Positive-OR Gate 14-TVSOP -40 to 85 Original PDF

    SN74ALVC32 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    va32

    Abstract: A115-A C101 SN74ALVC32 SN74ALVC32D
    Text: SN74ALVC32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATE SCES108F − JULY 1997 − REVISED AUGUST 2003 D D D D D D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V Latch-Up Performance Exceeds 250 mA Per


    Original
    PDF SN74ALVC32 SCES108F 24-mA 000-V A114-A) A115-A) SN74ALVC32 va32 A115-A C101 SN74ALVC32D

    A115-A

    Abstract: C101 SN74ALVC32 SN74ALVC32D
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) SN74ALVC32 A115-A C101 SN74ALVC32D

    A115-A

    Abstract: C101 SN74ALVC32 SN74ALVC32D VA32
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) SN74ALVC32 A115-A C101 SN74ALVC32D VA32

    Untitled

    Abstract: No abstract text available
    Text: Contents Page ALVC Gates/Octals SN74ALVC00 SN74ALVC04 SN74ALVC08 SN74ALVC10 SN74ALVC14 SN74ALVC32 SN74ALVC74 SN74ALVC125 SN74ALVC126 SN74ALVC244 SN74ALVCH244 SN74ALVC245 SN74ALVCH245 SN74ALVCH373 SN74ALVCH374 2–2 Quadruple 2-Input Positive-NAND Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


    Original
    PDF SN74ALVC00 SN74ALVC04 SN74ALVC08 SN74ALVC10 SN74ALVC14 SN74ALVC32 SN74ALVC74 SN74ALVC125 SN74ALVC126 SN74ALVC244

    Untitled

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCES108D – JULY 1997 – REVISED AUGUST 1998 D EPIC Enhanced-Performance Implanted D D D D, DGV, OR PW PACKAGE (TOP VIEW CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V


    Original
    PDF SN74ALVC32 SCES108D MIL-STD-883,

    VA32

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) VA32

    Untitled

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) SN74ALVC32 scem245

    apr 8910

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCES108E – JULY 1997 – REVISED MARCH 2000 D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)


    Original
    PDF SN74ALVC32 SCES108E MIL-STD-883, SN74ALVC32PWR SN74ALVC32 SCEM245, apr 8910

    va32

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) MTSS001C 4040064/F va32

    ALVC32

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) SN74ALVti ALVC32

    Untitled

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) SN74ALVC3

    Untitled

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A)

    MO-194

    Abstract: MPDS006C SN74ALVC32
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCES108E – JULY 1997 – REVISED MARCH 2000 D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)


    Original
    PDF SN74ALVC32 SCES108E MIL-STD-883, MO-194 MPDS006C SN74ALVC32

    A115-A

    Abstract: C101 SN74ALVC32 SN74ALVC32D
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) SN74ALVC32 A115-A C101 SN74ALVC32D

    Untitled

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) MTSS001C 4040064/F

    SN74ALVC32

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCES108D – JULY 1997 – REVISED AUGUST 1998 D D D D EPIC  Enhanced-Performance Implanted CMOS Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)


    Original
    PDF SN74ALVC32 SCES108D MIL-STD-883, SN74ALVC32

    Untitled

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A)

    A115-A

    Abstract: C101 SN74ALVC32 SN74ALVC32D
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE www.ti.com SCES108G – JULY 1997 – REVISED NOVEMBER 2004 FEATURES • • • • • D, DGV, NS, OR PW PACKAGE TOP VIEW Operates From 1.65 V to 3.6 V Max tpd of 2.8 ns at 3.3 V ±24-mA Output Drive at 3.3 V


    Original
    PDF SN74ALVC32 SCES108G 24-mA 000-V A114-A) A115-A) SN74ALVC32 4073251/E MO-153 A115-A C101 SN74ALVC32D

    DFSDM

    Abstract: SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20
    Text: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static


    Original
    PDF ARM926EJ-STM 64-KByte 6355C 19-Apr-11 DFSDM SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20

    ATMEL 234

    Abstract: how to derive sim 900 ARM926EJ-S AT91SAM ISO7816
    Text: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16-Kbyte Data Cache, 16-Kbyte Instruction Cache, Write Buffer


    Original
    PDF ARM926EJ-STM 16-Kbyte 16-bits 6462B 6-Sep-11 ATMEL 234 how to derive sim 900 ARM926EJ-S AT91SAM ISO7816

    TTL 74-series IC LIST

    Abstract: 74 Series Logic ICs TTL 74-series IC PO74G74 PO74G04 list cmos ics 49fct32805 49FCT3807 Potato Semiconductor 49FCT3805
    Text: 04/18/07 Pin to Pin & Package to Package Compatible IC List Standard 1.65V -3.6 V TTL / CMOS Clock Buffer PotatoSemi PO49FCT3802A 1GHz 1 to 5 PO49FCT3803B 700MHz 1 to 7 PO49FCT3804 800MHz 2X1 to 4 PO49FCT3805B 800MHz 2X1 to 5 PO49FCT3806 750MHz 2X1 to 5 PO49FCT3807B


    Original
    PDF PO49FCT3802A PO49FCT3803B 700MHz PO49FCT3804 800MHz PO49FCT3805B PO49FCT3806 750MHz PO49FCT3807B TTL 74-series IC LIST 74 Series Logic ICs TTL 74-series IC PO74G74 PO74G04 list cmos ics 49fct32805 49FCT3807 Potato Semiconductor 49FCT3805

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


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    PDF SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N

    ARM7TDMI System Peripherals

    Abstract: program key lock ic 4013 154WA SAM7SE512 at91sam7sexx
    Text: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support


    Original
    PDF 32-bit 16-bit SAM7SE512) SAM7SE256) SAM7SE32) 6222H 25-Jan-12 SAM7SE512/256/32 ARM7TDMI System Peripherals program key lock ic 4013 154WA SAM7SE512 at91sam7sexx

    Untitled

    Abstract: No abstract text available
    Text: SN74ALVC32 QUADRUPLE 2-INPUT POSITIVE-OR GATE SCES108D - JULY 1997 - REVISED AUGUST 1998 • EPIC Enhanced-Performance Implanted CMOS Submicron Process • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)


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    PDF SN74ALVC32 SCES108D MIL-STD-883, JESD17