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    SN54LS112 Search Results

    SN54LS112 Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    SN54LS112AJ Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125 Visit Texas Instruments
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    SN54LS112 Price and Stock

    Rochester Electronics LLC SN54LS112AJ

    J-K FLIP-FLOP
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    DigiKey SN54LS112AJ Bulk 30
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    Texas Instruments SN54LS112AJ

    Flip Flop JK-Type Neg-Edge 2-Element 16-Pin CDIP Tube
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    Verical SN54LS112AJ 143 32
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    Arrow Electronics SN54LS112AJ 200 12 Weeks 25
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    Quest Components SN54LS112AJ 409
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    SN54LS112AJ 16
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    SN54LS112AJ 4
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    Rochester Electronics SN54LS112AJ 143 1
    • 1 $9.82
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    Motorola Semiconductor Products SN54LS112AJ

    IC,FLIP-FLOP,DUAL,J/K TYPE,LS-TTL,DIP,16PIN,CERAMIC
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    Quest Components SN54LS112AJ 298
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    SN54LS112AJ 55
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    Component Electronics, Inc SN54LS112AJ 1
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    Texas Instruments SN54LS112AFD

    54LS112AFD
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    Quest Components SN54LS112AFD 11
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    Motorola Semiconductor Products SN54LS112J

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    Quest Components SN54LS112J 2
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    Find more SN54LS112 price and stock on Findchips.com

    SN54LS112 Datasheets (22)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN54LS112 Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Original PDF
    SN54LS112A Motorola DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP Original PDF
    SN54LS112A Texas Instruments DUAL J-K NEGATIVE EDGE TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Original PDF
    SN54LS112A Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WIITH PRESET AND CLEAR Original PDF
    SN54LS112AFK Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flop with Preset and Clear Original PDF
    SN54LS112AFK Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Scan PDF
    SN54LS112AJ Motorola Dual JK negative edge-triggered flip-flop Original PDF
    SN54LS112AJ Motorola Dual Negative Edge Triggered JK Flip-Flop with Preset and Clear Original PDF
    SN54LS112AJ Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125 Original PDF
    SN54LS112AJ Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flop with Preset and Clear Original PDF
    SN54LS112AJ Texas Instruments SN54LS112 - Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125 Original PDF
    SN54LS112AJ Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    SN54LS112AJ Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    SN54LS112AJ Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Scan PDF
    SN54LS112AW Texas Instruments Dual J-K Negative-Edge-Triggered Flip-Flop with Preset and Clear Original PDF
    SN54LS112AW Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Scan PDF
    SN54LS112FK Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Original PDF
    SN54LS112J Motorola DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP Original PDF
    SN54LS112J Texas Instruments DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR Original PDF
    SN54LS112J Unknown TTL Data Book 1980 Scan PDF

    SN54LS112 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    MC68B21CP

    Abstract: xcm916x1cth16 transistor marking code 12W SOT-23 sg379 MC68B54P XC68HC805P18CDW mc68b50cp MC2830 NE555N CHN NE555N
    Text: SG379/D REV 7 Semiconductor Products Sector NORTH AMERICA SALES AND DISTRIBUTION PRICE LIST THIS BOOK IS IN COMPUTER SORT PRODUCT CLASSIFICATION – Please see General Information Section 1.3 EFFECTIVE DATE: JANUARY 10, 1998 General Information 1 Cross References


    Original     		PDF SG379/D 1N965BRL ZEN15V 1N751AS 1N967BRL ZEN18V 1N751ASRL 1N968BRL ZEN20V MC68B21CP xcm916x1cth16 transistor marking code 12W SOT-23 sg379 MC68B54P XC68HC805P18CDW mc68b50cp MC2830 NE555N CHN NE555N

    transistor mosfet buv18a

    Abstract: M143206EVK MMBF4856 lm358 IC 68hc05sc24 telephone line interface circuit bc517 MC68B54 XC68HC705P9 MPX100ap BUV18A
    Text: Device Index and Subject Index In Brief . . . Page Device Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.1–1 General Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.2–1 Subject Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.2–9


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: PACKAGE OPTION ADDENDUM www.ti.com 20-Aug-2011 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type JM38510/07102BFA ACTIVE


    Original     		PDF 20-Aug-2011 JM38510/07102BEA JM38510/07102BFA JM38510/30103B2A JM38510/30103BEA JM38510/30103BFA SN54LS112AJ SN54S112J SN74LS112AD SN74LS112ADE4

    Untitled

    Abstract: No abstract text available
    Text: PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2012 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type JM38510/07102BFA ACTIVE


    Original     		PDF 25-Jan-2012 JM38510/07102BEA JM38510/07102BFA JM38510/30103B2A JM38510/30103BEA JM38510/30103BFA M38510/07102BEA M38510/07102BFA M38510/30103B2A M38510/30103BEA

    Untitled

    Abstract: No abstract text available
    Text: PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) JM38510/07102BEA ACTIVE CDIP


    Original     		PDF 10-Jun-2014 JM38510/07102BEA JM38510/07102B JM38510/07102BFA JM38510/ 07102BFA JM38510/30103B2A 30103B2A JM38510/30103BEA

    Untitled

    Abstract: No abstract text available
    Text: IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold


    Original     		PDF SN74LS112ADR SN74LS112AN SN74LS112AN3 SN74LS112ANSR

    sn74ls151 multiplexer vhdl code

    Abstract: MC14500B MC667 MC14000B MC672 equivalent MC661 MC672 MC660 bounce eliminator mc12073
    Text: Logic: Standard, Special and Programmable In Brief . . . Page Motorola Programmable Arrays MPA . . . . . . . . . . . . 3.1–1 Selection by Function Logic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1–8 Device Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1–36


    Original     		PDF

    Untitled

    Abstract: No abstract text available
    Text: PACKAGE OPTION ADDENDUM www.ti.com 29-Jun-2006 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type Package Drawing


    Original     		PDF 29-Jun-2006 JM38510/07102BEA JM38510/07102BFA JM38510/30103B2A JM38510/30103BEA JM38510/30103BFA SN54LS112AJ SN54S112J SN74LS112AD SN74LS112ADE4

    Untitled

    Abstract: No abstract text available
    Text: PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) JM38510/07102BEA ACTIVE CDIP


    Original     		PDF 11-Apr-2013 JM38510/07102BEA JM38510/07102B JM38510/07102BFA JM38510/ 07102BFA JM38510/30103B2A 30103B2A JM38510/30103BEA

    Untitled

    Abstract: No abstract text available
    Text: PACKAGE OPTION ADDENDUM www.ti.com 11-Nov-2009 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type Package Drawing Pins Package Eco Plan (2)


    Original     		PDF 11-Nov-2009 JM38510/07102BEA JM38510/07102BFA JM38510/30103B2A JM38510/30103BEA JM38510/30103BFA SN54LS112AJ SN54S112J SN74LS112AD SN74LS112ADE4

    Untitled

    Abstract: No abstract text available
    Text: PACKAGE OPTION ADDENDUM www.ti.com 4-Jun-2007 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD A42 SNPB N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type Package Drawing Pins Package Eco Plan (2)


    Original     		PDF 4-Jun-2007 JM38510/07102BEA JM38510/07102BFA JM38510/30103B2A JM38510/30103BEA JM38510/30103BFA SN54LS112AJ SN54S112J SN74LS112AD SN74LS112ADE4

    Untitled

    Abstract: No abstract text available
    Text: PACKAGE OPTION ADDENDUM www.ti.com 26-Sep-2005 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD Call TI Level-NC-NC-NC JM38510/07102BFA ACTIVE CFP W 16 1 TBD Call TI Level-NC-NC-NC Package Drawing Pins Package Eco Plan (2)


    Original     		PDF 26-Sep-2005 JM38510/07102BEA JM38510/07102BFA JM38510/30103B2A JM38510/30103BEA JM38510/30103BFA SN54LS112AJ SN54S112J SN74LS112AD SN74LS112ADE4

    Untitled

    Abstract: No abstract text available
    Text: PACKAGE OPTION ADDENDUM www.ti.com 12-Jan-2006 PACKAGING INFORMATION Orderable Device Status 1 Package Type JM38510/07102BEA ACTIVE CDIP J 16 1 TBD Call TI N / A for Pkg Type JM38510/07102BFA ACTIVE CFP W 16 1 TBD Call TI N / A for Pkg Type Package Drawing


    Original     		PDF 12-Jan-2006 JM38510/07102BEA JM38510/07102BFA JM38510/30103B2A JM38510/30103BEA JM38510/30103BFA SN54LS112AJ SN54S112J SN74LS112AD SN74LS112ADE4

    54s112

    Abstract: 74LS112A 74S112
    Text: SN54LS112A, SN54S112, SN74LS112A. SN74S112A DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR _ Fully Buffered to Offer Maximum Isolation from External Disturbance • D 2 6 6 1 . A P R IL 1 9 8 2 - R E V I S E D M A R C H 1 9 8 8


    OCR Scan     		PDF SN54LS112A, SN54S112, SN74LS112A. SN74S112A 54S112, 54s112 74LS112A 74S112

    Untitled

    Abstract: No abstract text available
    Text: M M O T O R O L A SN54LS112A SN74LS112A D E S C R IP T IO N — The S N 5 4 L S /7 4 L S 1 12 A dual JK flip -flo p features individual J, K, clock, and asynchronous set and clear inputs to each flip -flo p . W hen the clock goes HIGH, the inputs are enabled and data


    OCR Scan     		PDF SN54LS112A SN74LS112A

    SN74S112

    Abstract: LS112A S112 SN54LS112A SN54S112 SN74 SN74LS112A CU12B
    Text: TYPES SN54LS112A, SN54S112, SN74LS112A, SN74S112 DUAL J -K NEG ATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR ^ _ Fully Buffered to O ffer M a xim u m Isolation from External Disturbance • R E V IS E D D E C E M B E R 1 9 8 3 S N 5 4 L S 1 1 2 A , S N 5 4 S 1 1 2 . . . J OR W P AC KA G E


    OCR Scan     		PDF SN54LS112A, SN54S112, SN74LS112A, SN74S112 LS112A S112 SN54LS112A SN54S112 SN74 SN74LS112A CU12B

    Untitled

    Abstract: No abstract text available
    Text: TYPES SN54LS112A, SN54S112, SN74LS112A, SN74S112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR REVISED DECEMBER 1983 Fully Buffered to Offer Maximum Isolation from External Disturbance S N 5 4 L S 11 2 A , S N 5 4 S 1 1 2 . . . J OR W PACKAG E


    OCR Scan     		PDF SN54LS112A, SN54S112, SN74LS112A, SN74S112

    Untitled

    Abstract: No abstract text available
    Text: TYPES SN74LS112A, SN74S112A, SN54LS112A, SN54S112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR R E V IS E D D E C E M B E R 1986 Fully Buffered to Offer Maximum Isolation from External Disturbance Package Options Include Standard Plastic


    OCR Scan     		PDF SN74LS112A, SN74S112A, SN54LS112A, SN54S112A 300-m

    Untitled

    Abstract: No abstract text available
    Text: SN 54LS112A , S N 54S 112, SN 74LS112A , S N 74S 112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP FLOPS W ITH PRESET AND CLEAR D 2 6 6 1 . APRIL 1 9 8 2 - REVISED M A R C H 1 9 8 8 Fully Buffered to Offer Maximum Isolation from External Disturbance r a a SN 54LS 112A , SN 54S 112 . . . J OR W PACKAGE


    OCR Scan     		PDF 54LS112A 74LS112A

    SN74ALS123

    Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
    Text: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS


    OCR Scan     		PDF MIL-M-38510 SN74ALS123 SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138

    LG color tv Circuit Diagram schematics

    Abstract: texas ttl YJ 162A Texas Instruments TTL integrated circuits catalog SN74180 AC digital voltmeter using 7107 Sii 9024 MC3123 sn74ls860 SN7490AJ sn74243
    Text: IN D EXES Alphanumeric • Functional/Selection Guide IN T E R C H A N G E A B ILIT Y GUIDE G E N E R A L INFORM ATION O RD ERIN G IN STRUCTIO N S AND M ECH A N ICA L D A TA 5 4 /7 4 FA M ILIE S OF CO M PATIBLE T T L C IR C U ITS 54/74 F A M IL Y SSI C IR C U ITS


    OCR Scan     		PDF MIL-M-38510 38510/MACH 3186J Z501201 Z012510 Z011510 D022110 D022130 D021110 D021130 LG color tv Circuit Diagram schematics texas ttl YJ 162A Texas Instruments TTL integrated circuits catalog SN74180 AC digital voltmeter using 7107 Sii 9024 MC3123 sn74ls860 SN7490AJ sn74243

    SN7401

    Abstract: sn29601 SN7449 SN74298 SN74265 MC3021 SN54367 sn74142 signetics 8223 9370c
    Text: INDEX PAGE TTL Integrated Circuits Mechanical Data 1 TTL Interchangeability Guide 6 Functional Selection Guide 19 Explanation of Function Tables 38 54/74 Families of Compatible TTL Circuits 40 TTL INTEGRATED CIRCUITS MECHANICAL DATA J ceramic dual-in-line package


    OCR Scan     		PDF 24-lead SN74S474 SN54S475 SN74S475 SN54S482 SN74S482 LCC4270 SN54490 SN74490 SN54LS490 SN7401 sn29601 SN7449 SN74298 SN74265 MC3021 SN54367 sn74142 signetics 8223 9370c

    54S38

    Abstract: SN74298 SN74265 54175 NES 1004 naval specification 74L95 Transistor AF 138 07802-1 SN7437 SN54LS195A
    Text: m - G EN ER A L IN F O R M A TIO N INDEXES Numerical • Functional/Selection Guide O R D E R IN G INSTRUCTIO NS A N D M E C H A N IC A L D ATA 1 1 5 4/74 F A M IL Y SSI C IR CU ITS 2 I 54/74 F A M IL Y M S I/LSI C IR C U ITS 3 S E R IE S 29000 S S I C IR C U IT S


    OCR Scan     		PDF 38510/M D012510 D011520 D011510 54S38 SN74298 SN74265 54175 NES 1004 naval specification 74L95 Transistor AF 138 07802-1 SN7437 SN54LS195A

    LS112A

    Abstract: SN54LS112 SN54LS112A SN54S112 SN74 SN74LS112A SN74S112A
    Text: SN5 4 L S 112A, SN5 4 S 112, SN7 4 L S 112A, SN7 4 S 112A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP FLOPS WITH PRESET AND CLEAR D 2 6 6 1 . A P R IL 1 9 8 2 - R E V IS E D M A R C H 1 9 8 8 Fully Buffered to Offer Maximum Isolation from External Disturbance S N 5 4 L S 1 1 2 A . S N 5 4 S 1 1 2 . . . J OR W P A C K A G E


    OCR Scan     		PDF SN54LS112A, SN54S112, SN74LS112A, SN74S112A LS112A SN54LS112 SN54LS112A SN54S112 SN74 SN74LS112A