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Catalog Datasheet	MFG & Type	Document Tags	PDF
SN54ALVTH16721 Abstract: SN74ALVTH16721 Text: SN54ALVTH16721, SN74ALVTH16721 2.5-V/3.3-V 20-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCES139A – JULY 1998 – REVISED JANUARY 1999 D D D D D D D D D D State-of-the-Art Advanced BiCMOS Technology ABT Widebus  Design for 2.5-V and 3.3-V Operation and Low Static	Original	SN54ALVTH16721, SN74ALVTH16721 20-BIT SCES139A SN54ALVTH16721 SN74ALVTH16721	PDF
FT 4013 d dual flip flop Abstract: FT 4013 D flip flop 74HC octal bidirectional latch 74HCT 4013 DATASHEET 4511 pin configuration SN7432 fairchild CMOS TTL Logic Family Specifications 7805 acv Datasheet of decade counter CD 4017 sn74154 Text: T H E W O R L D L E A D E R I N L O G I C P R O D U C T S Logic Selection Guide February 2000 1999 EEProduct News PRODUCTS OF THE YEAR AWARD New products for prototype design AVC Advanced Very-Low-Voltage CMOS Logic See Section 4 LOGIC OVERVIEW 1 FUNCTIONAL INDEX	Original		PDF
T flip flop IC Abstract: pin designation for CD40110B IC 74LS series logic gates 3 input or gate FT 4013 d dual flip flop ic cmos 4011 CD4001* using NAND gates IC CD 4033 pin configuration Quad 2 input nand gate cd 4093 FT 4013 D flip flop 74HCT 4013 DATASHEET Text: T H E W O R L D L E A D E R I N L O G I C P R O D U C T S Logic Selection Guide February 2000 1999 EEProduct News PRODUCTS OF THE YEAR AWARD New products for prototype design AVC Advanced Very-Low-Voltage CMOS Logic See Section 4 LOGIC OVERVIEW 1 FUNCTIONAL INDEX	Original		PDF
Untitled Abstract: No abstract text available Text: SN54ALVTH16721, SN74ALVTH16721 2.5-V/3.3-V 20-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCES139A - JULY 1998 - REVISED JANUARY 1999 SN54ALVTH16721 . . . W D PACKAGE SN74ALVTH16721 . . . DGG, DGV, OR DL PACKAGE TOP VIEW Support Mixed-Mode Signal Operation (5-V	OCR Scan	SN54ALVTH16721, SN74ALVTH16721 20-BIT SCES139A	PDF