Datasheet Archive: LH521002AK25 datasheets

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Sharp Microelectronics of the Americas LH521002AK-25 256K X 4 STANDARD SRAM, 25 ns, PDSO28
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LH521002AK25 Datasheets (1)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
LH521002AK-25		Sharp	SRAM GP Single Port		Original	PDF

LH521002AK25 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
LH521002AK25 Abstract: No abstract text available Text: LH521002A CMOS 256K x 4 Static RAM • Low Power Standby when Deselected High frequency design techniques should be employed to obtain the best performance from this device. Solid, low impedance power and ground planes, with high frequency decoupling capacitors, are desirable. Series	Original	PDF	LH521002A LH521002A 28SOJ SOJ28-P-400) 28SOJ400 28-pin, 400-mil LH521002AK25
Untitled Abstract: No abstract text available Text: LH521002A CMOS 256K x 4 Static RAM • Low Power Standby when Deselected High frequency design techniques should be em ployed to obtain the best performance from this device. Solid, low impedance power and ground planes, with high frequency decoupling capacitors, are desirable. Series	OCR Scan	PDF	LH521002A 28-pin, 400-mil 28SOJ SOJ28-P-400) LH521002A ---------------------------------28-pin,
BNK-17 Abstract: No abstract text available Text: MEMORIES ★Under development • S ta tic RA M s Process Capacity Configuration words X bits Modal No. 2k X 8 Full CMOS 64k 8k X 8 256k 32k X 8 64k 8k X 8 64k X 4 256k 32k X 8 64k X 8 CMOS periphery 100 40/0.001 5 ± 10% O to 70 100 40/0.001 5 ± 10% - 4 0 to 85	OCR Scan	PDF	LH5116/NA/D-10 LH5116H/HN/HD-10 LH5116SN 24SOP 28SOJ 400mil) LH521002BK/BNK-17/L LH521002BK/BNK-20/L LH521002BK/BNK-2S/L LH521007AK-20 BNK-17

Catalog Datasheet

MFG & Type

PDF

Document Tags

LH521002AK25

Abstract: No abstract text available
Text: LH521002A CMOS 256K x 4 Static RAM • Low Power Standby when Deselected High frequency design techniques should be employed to obtain the best performance from this device. Solid, low impedance power and ground planes, with high frequency decoupling capacitors, are desirable. Series

Original

PDF

LH521002A LH521002A 28SOJ SOJ28-P-400) 28SOJ400 28-pin, 400-mil LH521002AK25

Untitled

Abstract: No abstract text available
Text: LH521002A CMOS 256K x 4 Static RAM • Low Power Standby when Deselected High frequency design techniques should be em ployed to obtain the best performance from this device. Solid, low impedance power and ground planes, with high frequency decoupling capacitors, are desirable. Series

OCR Scan

PDF

LH521002A 28-pin, 400-mil 28SOJ SOJ28-P-400) LH521002A ---------------------------------28-pin,

BNK-17

Abstract: No abstract text available
Text: MEMORIES ★Under development • S ta tic RA M s Process Capacity Configuration words X bits Modal No. 2k X 8 Full CMOS 64k 8k X 8 256k 32k X 8 64k 8k X 8 64k X 4 256k 32k X 8 64k X 8 CMOS periphery 100 40/0.001 5 ± 10% O to 70 100 40/0.001 5 ± 10% - 4 0 to 85

OCR Scan

PDF

LH5116/NA/D-10 LH5116H/HN/HD-10 LH5116SN 24SOP 28SOJ 400mil) LH521002BK/BNK-17/L LH521002BK/BNK-20/L LH521002BK/BNK-2S/L LH521007AK-20 BNK-17

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