DDR400
Abstract: EDD1232AAFA-5C-E
Text: PRELIMINARY DATA SHEET 128M bits DDR SDRAM EDD1232AAFA-5 4M words x 32 bits, DDR400 Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AAFA-5
DDR400)
EDD1232AA
100-pin
400Mbps
M01E0107
E0401E30
DDR400
EDD1232AAFA-5C-E
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PDF
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DDR400
Abstract: EDD1232AABH-5C-E
Text: PRELIMINARY DATA SHEET 128M bits DDR SDRAM EDD1232AABH-5 4M words x 32 bits, DDR400 Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AABH-5
DDR400)
EDD1232AA
144-ball
400Mbps
M01E0107
E0532E20
DDR400
EDD1232AABH-5C-E
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PDF
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Untitled
Abstract: No abstract text available
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AAFA 4M words x 32 bits Description Features The EDD1232AAFA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AAFA
EDD1232AAFA
100-pin
333Mbps/266Mbps
M01E0107
E0432E40
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET 128M bits DDR SDRAM EDD1232AABH-5 4M words x 32 bits, DDR400 Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AABH-5
DDR400)
EDD1232AA
144-ball
400Mbps
M01E0107
E0532E10
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PDF
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DDR266A
Abstract: DDR333B EDD1232AAFA-6B-E EDD1232AAFA-7A-E
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AAFA 4M words x 32 bits Specifications Features • Density: 128M bits • Organization ⎯ 1M words × 32 bits × 4 banks • Package: 100-pin plastic LQFP ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 2.5V ± 0.2V
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Original
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EDD1232AAFA
100-pin
333Mbps/266Mbps
cycles/32ms
M01E0107
E0432E60
DDR266A
DDR333B
EDD1232AAFA-6B-E
EDD1232AAFA-7A-E
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PDF
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DDR266A
Abstract: DDR333B EDD1232AABH-6B-E EDD1232AABH-7A-E
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AABH 4M words x 32 bits Description Features The EDD1232AABH is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AABH
EDD1232AABH
144-ball
333Mbps/266Mbps
M01E0107
E0533E50
DDR266A
DDR333B
EDD1232AABH-6B-E
EDD1232AABH-7A-E
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PDF
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Untitled
Abstract: No abstract text available
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AAFA-5 4M words x 32 bits, DDR400 Description Features The EDD1232AAFA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AAFA-5
DDR400)
EDD1232AAFA
100-pin
400Mbps
M01E0107
E0401E40
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AABH-5 4M words x 32 bits, DDR400 Description Features The EDD1232AABH is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AABH-5
DDR400)
EDD1232AABH
144-ball
400Mbps
M01E0107
E0532E40
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AABH 4M words x 32 bits Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AABH
EDD1232AA
144-ball
333Mbps/266Mbps
M01E0107
E0533E30
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AABH-5 4M words x 32 bits, DDR400 Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AABH-5
DDR400)
EDD1232AA
144-ball
400Mbps
M01E0107
E0532E30
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AAFA 4M words x 32 bits Description Features The EDD1232AAFA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AAFA
EDD1232AAFA
100-pin
333Mbps/266Mbps
M01E0107
E0432E30
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AABH 4M words x 32 bits Description Features The EDD1232AABH is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AABH
EDD1232AABH
144-ball
333Mbps/266Mbps
M01E0107
E0533E40
|
PDF
|
Untitled
Abstract: No abstract text available
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AABH 4M words x 32 bits Specifications Features • Density: 128M bits • Organization ⎯ 1M words × 32 bits × 4 banks • Package: 144-ball FBGA ⎯ Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 2.5V ± 0.2V
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Original
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EDD1232AABH
144-ball
333Mbps/266Mbps
M01E0107
E0533E60
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET 128M bits DDR SDRAM EDD1232AAFA 4M words x 32 bits Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AAFA
EDD1232AA
100-pin
333Mbps/266Mbps
M01E0107
E0432E10
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PDF
|
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DDR266A
Abstract: DDR266B DDR333B EDD1232AABH-6B-E EDD1232AABH-7A-E EDD1232AABH-7B-E
Text: PRELIMINARY DATA SHEET 128M bits DDR SDRAM EDD1232AABH 4M words x 32 bits Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AABH
EDD1232AA
144-ball
333Mbps/266Mbps
M01E0107
E0533E20
DDR266A
DDR266B
DDR333B
EDD1232AABH-6B-E
EDD1232AABH-7A-E
EDD1232AABH-7B-E
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PDF
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DDR266A
Abstract: DDR266B DDR333B EDD1232AAFA-6B-E EDD1232AAFA-7A-E EDD1232AAFA-7B-E
Text: PRELIMINARY DATA SHEET 128M bits DDR SDRAM EDD1232AAFA 4M words x 32 bits Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AAFA
EDD1232AA
100-pin
333Mbps/266Mbps
M01E0107
E0432E20
DDR266A
DDR266B
DDR333B
EDD1232AAFA-6B-E
EDD1232AAFA-7A-E
EDD1232AAFA-7B-E
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PDF
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DDR266A
Abstract: DDR333B EDD1232AAFA-6B-E EDD1232AAFA-7A-E
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AAFA 4M words x 32 bits Description Features The EDD1232AAFA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AAFA
EDD1232AAFA
100-pin
333Mbps/266Mbps
M01E0107
E0432E50
DDR266A
DDR333B
EDD1232AAFA-6B-E
EDD1232AAFA-7A-E
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PDF
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET 128M bits DDR SDRAM EDD1232AAFA-5 4M words x 32 bits, DDR400 Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AAFA-5
DDR400)
EDD1232AA
100-pin
400Mbps
M01E0107
E0401E20
|
PDF
|
Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET 128M bits DDR SDRAM EDD1232AABH 4M words x 32 bits Description Features The EDD1232AA is a 128M bits DDR SDRAM organized as 1,048,576 words × 32 bits × 4 banks. Read and write operations are performed at the cross points of the CK and the /CK. This high-speed data
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Original
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EDD1232AABH
EDD1232AA
144-ball
333Mbps/266Mbps
M01E0107
E0533E10
|
PDF
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DDR266A
Abstract: DDR333B EDD1232AABH-6B-E EDD1232AABH-7A-E
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AABH 4M words x 32 bits Features • Density: 128M bits • Organization 1M words × 32 bits × 4 banks • Package: 144-ball FBGA Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 2.5V ± 0.2V • Data rate: 333Mbps/266Mbps (max.)
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Original
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EDD1232AABH
144-ball
333Mbps/266Mbps
M01E0107
E0533E60
DDR266A
DDR333B
EDD1232AABH-6B-E
EDD1232AABH-7A-E
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PDF
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DDR266A
Abstract: DDR333B EDD1232AAFA-6B-E EDD1232AAFA-7A-E
Text: DATA SHEET 128M bits DDR SDRAM EDD1232AAFA 4M words x 32 bits Features • Density: 128M bits • Organization 1M words × 32 bits × 4 banks • Package: 100-pin plastic LQFP Lead-free (RoHS compliant) • Power supply: VDD, VDDQ = 2.5V ± 0.2V
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Original
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EDD1232AAFA
100-pin
333Mbps/266Mbps
cycles/32ms
M01E0107
E0432E60
DDR266A
DDR333B
EDD1232AAFA-6B-E
EDD1232AAFA-7A-E
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PDF
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pc2-5300
Abstract: elpida 1gb pc2 ECL120ACECN ELPIDA DDR2 PC2-3200 ELPIDA 68-FBGA Elpida DDR2 SDRAM component EDE1104ABSE EDE1108AASE
Text: SELECTION GUIDE DRAM Selection Guide Document No. E0853E70 Ver.7.0 Date Published July 2006 (K) Japan Printed in Japan URL: http://www.elpida.com Elpida Memory, Inc. 2006 DRAM Selection Guide CONTENTS 1. DDR2
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Original
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E0853E70
240-pin
200-pin
M01E0107
pc2-5300
elpida 1gb pc2
ECL120ACECN
ELPIDA DDR2
PC2-3200
ELPIDA
68-FBGA
Elpida DDR2 SDRAM component
EDE1104ABSE
EDE1108AASE
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PDF
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