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    CD54HC10 Search Results

    CD54HC10 Result Highlights (4)

    Part ECAD Model Manufacturer Description Download Buy
    CD54HC10F Texas Instruments High Speed CMOS Logic Triple 3-Input NAND Gates 14-CDIP -55 to 125 Visit Texas Instruments
    CD54HC10F3A Texas Instruments High Speed CMOS Logic Triple 3-Input NAND Gates 14-CDIP -55 to 125 Visit Texas Instruments Buy
    CD54HC109F3A Texas Instruments High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset 16-CDIP -55 to 125 Visit Texas Instruments Buy
    CD54HC107F3A Texas Instruments High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset 14-CDIP -55 to 125 Visit Texas Instruments Buy
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    CD54HC10 Price and Stock

    Rochester Electronics LLC CD54HC10F

    CD54HC10 HIGH SPEED CMOS LOGIC T
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    DigiKey CD54HC10F Bulk 55
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    Rochester Electronics LLC CD54HC10F3A

    CD54HC10 HIGH SPEED CMOS LOGIC T
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    DigiKey CD54HC10F3A Bulk 32
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    Rochester Electronics LLC CD54HC109F3A

    J-K FLIP-FLOP
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    DigiKey CD54HC109F3A Bulk 31
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    Texas Instruments CD54HC107F3A

    HIGH SPEED CMOS LOGIC DUAL NEGAT
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    DigiKey CD54HC107F3A Tube
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    Texas Instruments CD54HC109F3A

    Flip Flop JK# -Type Pos-Edge 2-Element 16-Pin CDIP Tube
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    Verical CD54HC109F3A 143 33
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    Arrow Electronics CD54HC109F3A 150 18 Weeks 25
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    • 100 $7.925
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    Quest Components CD54HC109F3A 23
    • 1 $31.0536
    • 10 $29.5009
    • 100 $27.9482
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    Rochester Electronics CD54HC109F3A 143 1
    • 1 $9.43
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    • 100 $8.86
    • 1000 $8.02
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    Find more CD54HC10 price and stock on Findchips.com

    CD54HC10 Datasheets (37)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CD54HC10 Texas Instruments High Speed CMOS LogicTriple 3-Input NAND Gate Original PDF
    CD54HC10 Texas Instruments High-Speed CMOS Logic Triple 3-Input NAND Gate Original PDF
    CD54HC10/3A Harris Semiconductor Triple 3-Input NAND Gate Original PDF
    CD54HC10/3A RCA Solid State Triple 3-lnput NAND Gate Scan PDF
    CD54HC107 Texas Instruments Dual J-K Flip-Flop with ResetNegative-Edge Trigger Original PDF
    CD54HC107/3A Harris Semiconductor Dual J-K Flip-Flop with Reset Original PDF
    CD54HC107/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HC107/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HC107F3A Texas Instruments Dual J-K Flip-Flop with Reset Negative-Edge Trigger Original PDF
    CD54HC107F3A Texas Instruments Dual J-K Flip-Flop with Reset Negative-Edge Trigger Original PDF
    CD54HC107F3A Texas Instruments High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset 14-CDIP -55 to 125 Original PDF
    CD54HC107F3A Texas Instruments CD54HC107 - High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with Reset 14-CDIP -55 to 125 Original PDF
    CD54HC107F3A96 Texas Instruments Dual J-K Flip-Flop with Reset Negative-Edge Trigger Original PDF
    CD54HC109 Texas Instruments High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and Reset Original PDF
    CD54HC109 Texas Instruments Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger Original PDF
    CD54HC109/3A Harris Semiconductor Dual J-K Flip-Flop with Set and Reset Original PDF
    CD54HC109/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HC109/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HC109/3A RCA Solid State High-Reliability High-Speed CMOS Logic ICs Scan PDF
    CD54HC109F3A Texas Instruments HIGH SPEED CMOS LOGIC DUAL POSITIVE-EDGE TRIGGER J-K FLIP-FLOPS WITH SET AND RESET Original PDF

    CD54HC10 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    HC10

    Abstract: CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HCT10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original     		PDF HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 HC10 CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140C Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised May 2003


    Original     		PDF CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140C HC109 HCT109 CD74H CT109)

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original     		PDF CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 HCT10

    HCT10

    Abstract: CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original     		PDF HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10

    54LS

    Abstract: CD54HC10
    Text: CD54HC10/3A CD54HCT10/3A S E M I C O N D U C T O R COMPLETE DATA SHEET COMING SOON! June 1997 Description Triple 3-Input NAND Gate Functional Diagram The CD54HC10/3A and CD54HCT10/3A logic gates utilize silicon-gate CMOS technology to achieve operating speeds


    Original     		PDF CD54HC10/3A CD54HCT10/3A CD54HC10/3A CD54HCT10/3A CD54HCT 1000ns 500ns 400ns CD54HC 54LS CD54HC10

    CD54HC107

    Abstract: CD54HC107F3A CD74HC107 CD74HC107E CD74HC107M CD74HCT107 HC107 HCT10
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54HC107, CD74HC107, CD74HCT107 Data sheet acquired from Harris Semiconductor SCHS139D Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF HC107 HCT10 CD54HC107, CD74HC107, CD74HCT107 SCHS139D HC107 CD74HCT107 CD54HC107 CD54HC107F3A CD74HC107 CD74HC107E CD74HC107M HCT10

    CD54HC10

    Abstract: CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10 HCT10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original     		PDF HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54HC107, CD74HC107, CD74HCT107 Data sheet acquired from Harris Semiconductor SCHS139D Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF CD54HC107, CD74HC107, CD74HCT107 SCHS139D HC107 CD74HCT107 HC/HCT73

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 CD74H CT109)

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF CD74H CT109) CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109

    "J-K Flip flop"

    Abstract: CD54HC107F3A HC107 T flip flop IC CD54HC107 CD74HC107 CD74HC107E CD74HC107M CD74HCT107 HCT10
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54HC107, CD74HC107, CD74HCT107 Data sheet acquired from Harris Semiconductor SCHS139D Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF HC107 HCT10 CD54HC107, CD74HC107, CD74HCT107 SCHS139D HC107 CD74HCT107 "J-K Flip flop" CD54HC107F3A T flip flop IC CD54HC107 CD74HC107 CD74HC107E CD74HC107M HCT10

    HC107

    Abstract: CD54HC107 CD54HC107F3A CD74HC107 CD74HC107E CD74HC107M CD74HCT107 HCT10
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54HC107, CD74HC107, CD74HCT107 Data sheet acquired from Harris Semiconductor SCHS139C Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised May 2003


    Original     		PDF HC107 HCT10 CD54HC107, CD74HC107, CD74HCT107 SCHS139C HC107 CD74HCT107 CD54HC107 CD54HC107F3A CD74HC107 CD74HC107E CD74HC107M HCT10

    CD54HC10

    Abstract: CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10 HCT10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original     		PDF HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128B HCT10 CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HC10E CD74HCT10 HC10

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54HC107, CD74HC107, CD74HCT107 Data sheet acquired from Harris Semiconductor SCHS139D Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF CD54HC107, CD74HC107, CD74HCT107 SCHS139D HC107 CD74HCT107 HC/HCT73

    C109

    Abstract: CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109 HC109
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF CD74H CT109) CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 C109 CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109

    C109

    Abstract: CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109 HC109
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140D Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised July 2003


    Original     		PDF CD74H CT109) CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140D HC109 HCT109 C109 CD54HC109 CD54HC109F3A CD54HCT109 CD74HC109 CD74HCT109

    CD74HC10E

    Abstract: CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HCT10 HC10 HCT10
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original     		PDF HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 CD74HC10E CD54HC10 CD54HC10F3A CD54HCT10 CD54HCT10F3A CD74HC10 CD74HCT10 HC10

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF CD74H CT109) CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 CD74H CT109)

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74H C109, CD74H CT109 /Subject (Dual JK FlipFlop with Set and Reset CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Data sheet acquired from Harris Semiconductor SCHS140E Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger March 1998 - Revised October 2003


    Original     		PDF CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 SCHS140E HC109 HCT109 CD74H CT109)

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original     		PDF HCT10 CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54HC10, CD74HC10, CD54HCT10, CD74HCT10


    Original     		PDF CD54HC10, CD74HC10, CD54HCT10, CD74HCT10 SCHS128C HCT10 HCT10

    Untitled

    Abstract: No abstract text available
    Text: Semiconductor \COMPLETE DATA SHEET I COMING SOGNI I CD54HC107F3A, CD54HCT107F3A June 1997 Dual J-K Flip-Flop with Reset File Number 3772 Functional Diagram The CD54HC107F3A and CD54HCT107F3A utilize silicongate CMOS technology to achieve operating speeds similar


    OCR Scan     		PDF CD54HC107F3A, CD54HCT107F3A CD54HC107F3A CD54HCT107F3A HC73/3A CD54HCT 1000ns 500ns 400ns

    Untitled

    Abstract: No abstract text available
    Text: High-Reliability High-Speed CMOS Logic ICs CD54HC107/3A CD54HCT107/3A Burn-ln Test-Circuit Connections Static OPEN CD54HC/HCT107 2,3,5,6 Dynamic GROUND OPEN CD54HC/HCT107 Use Static II for /3A burn-in and Dynamic for Life Test. STATIC BURN-IN I Vcc(6V) GROUND


    OCR Scan     		PDF CD54HC107/3A CD54HCT107/3A CD54HC/HCT107 2k-47k CD54HC109/3A CD54HCT109/3A RCA-CD54HC109 CD54HCT109 CD54HC112/3A