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    S19202

    Abstract: amcc CDR S3455 STS-192
    Text: S3455 Product Brief SONET/SDH/ATM OC-48 4-Bit Transceiver with CDR S34 PB2022_v1.01_08/23/05 The low jitter LVDS interface is compliant with the bit-error rate requirements of the Bellcore and ITU-T standards. The S3455 is packaged in a 196 Pin PBGA, offering designers a small package


    Original     		S3455 OC-48 PB2022 S3455 OC-48 S19202 amcc CDR STS-192 PDF