Untitled
Abstract: No abstract text available
Text: 16 PIN ECL 10K 3-BIT PROGRAMMABLE 81A SERIES FEATURES • • • • 16-PIN PACKAGE. ECL INPUT AND OUTPUT LEVEL. INHERENT DELAY To :3ns TYP. FAN-OUT 70 ECL CAPACITY. ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current :265uA max INPUT PULSE TEST CONDITION
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16-PIN
265uA
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81A-010
Abstract: 81A08 81A05
Text: Yuan Dean Scientific CO.,LTD 81A SERIES 16 PIN ECL 10K 3-BIT PROGRAMMABLE FEATURES • • • • 16-PIN PACKAGE. ECL INPUT AND OUTPUT LEVEL. INHERENT DELAY To :3ns TYP. FAN-OUT 70 ECL CAPACITY. ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current :265uA max
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16-PIN
265uA
81A-010
81A08
81A05
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Untitled
Abstract: No abstract text available
Text: LM74 www.ti.com SNIS107J – MAY 2004 – REVISED MARCH 2011 LM74 SPI/Microwire12-Bit Plus Sign Temperature Sensor Check for Samples: LM74 FEATURES DESCRIPTION • • The LM74 is a temperature sensor, Delta-Sigma analog-to-digital converter with an SPI and
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SNIS107J
SPI/Microwire12-Bit
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D10 SMD CODE MARKING
Abstract: LM74 LM74CIM-3 LM74CIM-5 LM74CIMX-3 LM74CIMX-5 LM74CITP-3 M08A MO-211 LM74-5
Text: LM74 SPI/MICROWIRE 12-Bit Plus Sign Temperature Sensor General Description Features The LM74 is a temperature sensor, Delta-Sigma analog-todigital converter with an SPI and MICROWIRE compatible interface. The host can query the LM74 at any time to read
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12-Bit
D10 SMD CODE MARKING
LM74
LM74CIM-3
LM74CIM-5
LM74CIMX-3
LM74CIMX-5
LM74CITP-3
M08A
MO-211
LM74-5
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Untitled
Abstract: No abstract text available
Text: ECL Noise Filter Module The ECL Noise Filter Modules manufactured by Engineered Components Company are designed to filter or suppress input pulses below a specified suppress pulse width and to pass pulses above a specified pass pulse width. The operation of this module will eliminate unwanted shorter positive pulses from an input data
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MIL-HDBK-217,
50VDC
98VDC
265uA
63VDC
96VDC
65VDC
ECLNFM-50
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cf 455
Abstract: MDT10P23
Text: MDT10P23 CF 1. General Description This EPROM-Based 8-bit micro-controller uses a fully static CMOS design technology to achieve high speed, small size, low power and high noise immunity. On chip memory includes 2K words EPROM and80 bytes static RAM. Four comparator inputs with external Vref
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MDT10P23
and80
14-bit
MDT10P23
cf 455
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Untitled
Abstract: No abstract text available
Text: 91A SERIES 32 PIN ECL 10K 4-BIT PROGRAMMABLE FEATURES • • • • INHERENT DELAY To :6ns TYPICAL 32-PIN DIP PACKAGE. ECL INPUT AND OUTPUT LEVEL. FAN-OUT 70 ECL CAPACITY. ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current IIL Logic”0” Input Current
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32-PIN
265uA
175mA
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83A300
Abstract: No abstract text available
Text: 16 PIN DUAL –IN-LINE ECL 10K DIGTAL DELAY LINE 83A SERIES FEATURES • STANDARD 16-PIN PACKAGE. • 5 EQUALLY SPACED DELAY TAPS. • ECL 10K INTERFACED. • DELAYS FROM 10ns-500ns • POWER DISSIPATIPN:200mW TYP. NO LOAD ELECTRICAL CHARACTERISTICS IIH Logic”1” Input Current
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16-PIN
10ns-500ns
200mW
265uA
3A-010
3A-020
3A-025
3A-050
3A-075
3A-100
83A300
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Programmable
Abstract: No abstract text available
Text: 4-Bit Programmable 10K ECL Logic Delay Line The 4-Bit Programmable 10K ECL Logic Delay Lines manufactured by Engineered Components Company are designed to provide output waveforms that reproduce the input waveform after a set amount of delay time has elapsed. The final delay of the output waveform can be
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MIL-HDBK-217,
50VDC
130mA
98VDC
265uA
63VDC
96VDC
65VDC
Programmable
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Untitled
Abstract: No abstract text available
Text: 10K ECL Square Wave Generator Module The 10K ECL Square Wave Generator Modules manufactured by Engineered Components Company are designed to provide a square wave output at a given frequency. These generators are both keyable and synchronizable, producing a continuous output train as long as a TTL “low” is applied to the input. With a TTL “high” applied
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98VDC
265uA
63VDC
96VDC
65VDC
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200H
Abstract: MDT10P22 1k BIT WORD STATIC RAM
Text: MDT10P22 DF 1. General Description This EPROM-Based 8-bit micro-controller uses a fully static CMOS design technology to achieve high speed, small size, low power and high noise immunity. On chip memory includes 1K words EPROM and80 bytes static RAM. Four comparator inputs with external Vref
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MDT10P22
and80
14-bit
MDT10P22
200H
1k BIT WORD STATIC RAM
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lm749
Abstract: No abstract text available
Text: LM74 www.ti.com SNIS107K – MAY 2000 – REVISED MARCH 2013 LM74 SPI/Microwire12-Bit Plus Sign Temperature Sensor Check for Samples: LM74 FEATURES DESCRIPTION • • The LM74 is a temperature sensor, Delta-Sigma analog-to-digital converter with an SPI and
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SNIS107K
SPI/Microwire12-Bit
12-bit
lm749
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SNIS107J
Abstract: lm749
Text: LM74 www.ti.com SNIS107J – MAY 2004 – REVISED MARCH 2011 LM74 SPI/Microwire12-Bit Plus Sign Temperature Sensor Check for Samples: LM74 FEATURES DESCRIPTION • • The LM74 is a temperature sensor, Delta-Sigma analog-to-digital converter with an SPI and
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SNIS107J
SPI/Microwire12-Bit
12-bit
SNIS107J
lm749
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National smd sop 4 pin
Abstract: SPI MICROWIRE communication controller spi lm74 How to read marking code of smd IC
Text: LM74 LM74 SPI/ MICROWIRE 12-Bit Plus Sign Temperature Sensor Literature Number: SNIS107J LM74 SPI/MICROWIRE 12-Bit Plus Sign Temperature Sensor General Description Features The LM74 is a temperature sensor, Delta-Sigma analog-todigital converter with an SPI and MICROWIRE compatible
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12-Bit
SNIS107J
National smd sop 4 pin
SPI MICROWIRE communication controller
spi lm74
How to read marking code of smd IC
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Untitled
Abstract: No abstract text available
Text: lowprofile ECL COMPATIBLE LOGIC NOISE FILTER MODULE # # # # # ECL in p u t and o u tp u t Pulse W idth Detection stable and precise 16-pin DIP package .250 high Available in pulse widths fro m 5ns to 500ns 70 ECL DC fan-out capacity T he E C L N F M is o ffe re d in 24 pulse w id th s fro m 5ns to 500ns,
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16-pin
500ns
500ns,
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Untitled
Abstract: No abstract text available
Text: Lneprûjile ECL COMPATIBLE MULTI-LOGIC DELAY LINE # ECL inputs and outputs The M E C L D L is offered in 36 delays from 5 to 100ns. % Delays stable and precise Delay tolerances and rise times are maintained as shown in the accom # 16-pin DIP package .250 high
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100ns.
16-pin
100ns--
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PECLDL
Abstract: delay line 400ns
Text: lowprofile ECL COMPATIBLE 4-BIT RAMMABLE DELAY LINE # ECL input and output levels # Delays stable and precise # 32-pin DIP package .250 high # Available in delays up to 760ns The Logic Delay Lines are digitally programmable by the presence of either a " 1 " or a " 0 " at each of the programming
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32-pin
760ns
/030180R
PECLDL
delay line 400ns
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Untitled
Abstract: No abstract text available
Text: lowprofile ECL COMPATIBLE LOGIC DELAY LINE # # # # # # ECL input and outputs Delay stable and precise 16-pin DIP package .250 high Available in delays from 2 to 1000ns Output isolated and with 70 ECL DC fan-out capacity Fast rise time on all outputs The E C L D L is o ffe re d in 56 delays fro m 2 to 1000ns.
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16-pin
1000ns
1000ns.
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delay line 400ns
Abstract: No abstract text available
Text: lowprofile ECL COMPATIBL 8-BIT PROGRAMMABLE LOGIC DELAY LINE ECL input and output levels Delays stable and precise 64-pin D IP package .2 5 0 high Available in delays up to 1287ns Available in 5 delay steps w ith resolution from 1ns to 5ns Propagation delays fu lly compensated
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64-pin
1287ns
delay line 400ns
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Untitled
Abstract: No abstract text available
Text: lowprofile ECL COMPATIBLE 6-BIT PROGRAMMABLE LOGIC DELAY LINE # ECL input and output levels # Delays stable-and precise # 48-pin DIP package .2 5 0 high # Available in delays up to 323ns # Available in 5 delay steps with resolution from 1 to 5ns # Propagation delays fully compensated
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48-pin
323ns
C/031580R
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ECLPGM-10
Abstract: ECLPGM-15 ECLPGM-20 ECLPGM-25 ECLPGM-30 ECLPGM-40 ECLPGM-45 ECLPGM-50
Text: DESIGN NOTES continued OPERATING SPECIFICATIONS M a rkin g c o n s is ts o f m a n u fa c tu re r's na m e, lo g o (E C ^), p a rt nu m b e r, te rm in a l id e n tific a tio n and d a te c o d e o f m a n u fa c tu re . S u p p ly V o l t a g e : .- 5 .2 V ±5% to Vee (Can be
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MIL-STD-130,
MIL-STD-202,
265ua
ECLPGM-10
ECLPGM-15
ECLPGM-20
ECLPGM-25
ECLPGM-30
ECLPGM-35
ECLPGM-40
ECLPGM-45
ECLPGM-50
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005-5246
Abstract: No abstract text available
Text: M E C H A N IC A L D E T A I L IS SHOWN BELO W BLO C K D IA G R A M IS SHOWN BELOW Vcc 10% 30% 50% 32 31 30 29 Vcc 60% 80% OUT 24 23 22 21 1.600 rV 1 3 O Q O Q 1 .400 MAX. + V n 5 |V 6 8 OUT DECLDM- _ 2 4 IN Ve|V 7 9 Vf D ELAY LINE WITH ECL 10,000 PICK OFF
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110ma
265ua
C/010480R
005-5246
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ECLDM-10
Abstract: No abstract text available
Text: ànrprofili' ECL COMFATIBLE LOGIC DELAY MODULE ECL in p u t and o u tp u ts Delays stable and precise 1 6 -pin DIP package .250 high A vailable in delays fro m 6 to 1000ns 20% taps-each isolated and w ith 70 ECL DC. fa n -o u t capacity Fast rise tim e on all o u tp u ts
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16-pin
1000ns
C/021580R
ECLDM-10
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265ua
Abstract: No abstract text available
Text: lawprofile ECL COMPATIBLE PULSE GENERATOR MODULE # # # # ECL input and outputs Pulse widths stable and precise 16-pin DIP package .260 high Available in pulse widths from 5 to 100ns design notes The "D IP series" Pulse Generator Modules developed by Engineered Components Company have been designed to
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16-pin
100ns
100ns.
C/021880R1
265ua
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