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    00Q01

    Abstract: ZQ50A BWRO
    Text: PRELIMINARY Y7C1337 32K x 32 Synchronous-Pipelined Cache RAM Features • Low 660 |xW standby power (f=0, L version) • Supports 117-MHz bus operations with zero wait states • Fully registered Inputs and outputs for pipelined oper­ ation • 32K x 32 common I/O architecture


    OCR Scan     		CY7C1337 117-MHz 100-MHz 100TQFP 00Q01 ZQ50A BWRO PDF