full subtractor circuit using xor and nand gates
Abstract: full subtractor circuit using nor gates 4-bit full adder using nand gates and 3*8 decoder 2 bit magnitude comparator using 2 xor gates 4-bit bcd subtractor 8 bit bcd adder subtractor BCD adder and subtractor half adder using x-OR and NAND gate bcd subtractor full adder circuit using xor and nand gates
Text: pASIC Macro Library HIGHLIGHTS More than 350 Architecturally Optimized Macros Includes Simple Gates and Advanced Soft Macros Includes Over 100 7400-Series TTL Building Blocks SpDE Packs as Many as 4 Macros Into a Single Logic Cell SpDE's Logic Optimize maps many simple gates into a single logic cell
|
Original
|
PDF
|
7400-Series
10-bit
TTL244q
TTL259
TTL261
TTL268q
full subtractor circuit using xor and nand gates
full subtractor circuit using nor gates
4-bit full adder using nand gates and 3*8 decoder
2 bit magnitude comparator using 2 xor gates
4-bit bcd subtractor
8 bit bcd adder subtractor
BCD adder and subtractor
half adder using x-OR and NAND gate
bcd subtractor
full adder circuit using xor and nand gates
|
GAL20RA10
Abstract: node B 3206 20RA10 GAL20RA10B-10LJ GAL20RA10B-10LP GAL20RA10B-15LJ GAL20RA10B-15LP GAL20RA10B-7LJ PAL20RA10
Text: GAL20RA10 High-Speed Asynchronous E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 83.3 MHz — 9 ns Maximum from Clock Input to Data Output — TTL Compatible 8 mA Outputs
|
Original
|
PDF
|
GAL20RA10
Tested/100%
GAL20RA10
node B 3206
20RA10
GAL20RA10B-10LJ
GAL20RA10B-10LP
GAL20RA10B-15LJ
GAL20RA10B-15LP
GAL20RA10B-7LJ
PAL20RA10
|
GAL20RA10
Abstract: GAL 16 v 8 D 20RA10 GAL20RA10B-10LJ GAL20RA10B-10LP GAL20RA10B-15LJ GAL20RA10B-15LP GAL20RA10B-7LJ PAL20RA10
Text: GAL20RA10 High-Speed Asynchronous E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 83.3 MHz — 9 ns Maximum from Clock Input to Data Output — TTL Compatible 8 mA Outputs
|
Original
|
PDF
|
GAL20RA10
Tested/100%
GAL20RA10
GAL 16 v 8 D
20RA10
GAL20RA10B-10LJ
GAL20RA10B-10LP
GAL20RA10B-15LJ
GAL20RA10B-15LP
GAL20RA10B-7LJ
PAL20RA10
|
20XV10
Abstract: 20L10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10
Text: GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs
|
Original
|
PDF
|
GAL20XV10
Tested/100%
20XV10
20L10
GAL20XV10
GAL20XV10B-10LJ
GAL20XV10B-10LP
PAL12L10
|
GAL20XV10B-10LP
Abstract: GAL20XV10B-15LP 20L10 20XV10 GAL20XV10 GAL20XV10B-10LJ PAL12L10 ROCHESTER ELECTRONICS
Text: GAL20XV10 Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs — UltraMOS® Advanced CMOS Technology
|
Original
|
PDF
|
GAL20XV10
Tested/100%
GAL20XV10B-10LP
GAL20XV10B-15LP
20L10
20XV10
GAL20XV10
GAL20XV10B-10LJ
PAL12L10
ROCHESTER ELECTRONICS
|
20xv10
Abstract: 20L10 GAL20XV10 GAL20XV10B-10LJ GAL20XV10B-10LP PAL12L10
Text: GAL20XV10 High-Speed E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 10 ns Maximum Propagation Delay — Fmax = 100 MHz — 7 ns Maximum from Clock Input to Data Output — TTL Compatible 16 mA Outputs
|
Original
|
PDF
|
GAL20XV10
Tested/100%
20xv10
20L10
GAL20XV10
GAL20XV10B-10LJ
GAL20XV10B-10LP
PAL12L10
|
V7402
Abstract: V74138 V74161 TTL7482 V74169 V74273 V74157 V74163 V7410 V7442
Text: VANTIS Soft Macro Reference Manual TTL Function Macros 1999 Vantis Application Center 1 TABLE OF CONTENTS Macro Name V7400 V7402 V7408 V7410 V7411 V7420 V7421 V7427 V7430 V7432 V7442 V7449 V7451 V7482 V7483 V7485 V7486 V74133 V74138 V74139 V74148 V74150 V74151
|
Original
|
PDF
|
V7400
V7402
V7408
V7410
V7411
V7420
V7421
V7427
V7430
V7432
V7402
V74138
V74161
TTL7482
V74169
V74273
V74157
V74163
V7410
V7442
|
49C466
Abstract: IDT49C466 IDT49C466A MD54 LK 1623
Text: IDT49C466, IDT49C466A 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT COMMERCIAL TEMPERATURE RANGE 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT DESCRIPTION: FEATURES: − − − − − − − − − − IDT49C466 IDT49C466A 64-bit wide Flow-thruEDC
|
Original
|
PDF
|
IDT49C466,
IDT49C466A
64-BIT
IDT49C466
16-deep
49C466
IDT49C466
IDT49C466A
MD54
LK 1623
|
12v relay drive with microcontroller
Abstract: No abstract text available
Text: FAN3240 / FAN3241 Smart Dual-Coil Relay Drivers Features • 8-V to 60-V Operation Range for use with 12-V, 24-V or 48-V Relays • Strong DC Current to Break through Welded Contacts without using External Switches Integrated Linear Regulator for Isolated or
|
Original
|
PDF
|
FAN3240
FAN3241
FAN324x
FAN3241
12v relay drive with microcontroller
|
FAN3241
Abstract: No abstract text available
Text: FAN3240 / FAN3241 Smart Dual-Coil Relay Drivers Features • • 10-V to 60-V Operation for Unregulated Supply Line Integrated Linear Regulator for Isolated or Non-Isolated Meter Power Designs Accurate Input Qualification Time with Output Pulse Width Limit Factory Adjustable
|
Original
|
PDF
|
FAN3240,
FAN3241
FAN3240
FAN324x
FAN3241
|
Untitled
Abstract: No abstract text available
Text: FAN3240 / FAN3241 Smart Dual-Coil Relay Drivers Features • 8-V to 60-V Operation Range for use with 12-V, 24-V or 48-V Relays • Strong DC Current to Break through Welded Contacts without using External Switches Integrated Linear Regulator for Isolated or
|
Original
|
PDF
|
FAN3240
FAN3241
dwg/PKG-M08A
|
SM370
Abstract: SiCOM SM37030 QPSK Modulator block diagram SM7060 N-16 low cost qpsk modulator EN-300-421 rf module with qpsk modulation
Text: SM7060 Programmable Digital Modulator ASIC Description SiCOM’s SM7060 is a programmable digital modulator ASIC which supports continuous-wave, and burst modes of operation with QPSK, 8PSK, and nQAM n=16, 32, 64, 128, 256 modulation formats. The SM7060 accepts byte-wide TTL data at clock rates up
|
Original
|
PDF
|
SM7060
SM7060
16-bit
SM37030
16QAM
SM370
SiCOM
SM37030
QPSK Modulator block diagram
N-16
low cost qpsk modulator
EN-300-421
rf module with qpsk modulation
|
RAS 2415
Abstract: hamming code mc74f MC74F2960A
Text: Order this data sheet by MC74F2960/D M MOTOROLA MC74F2960/ Am2960 MC74F2960A SEM ICO N D U CTO RS P.O BO X 20912 • P H O EN IX , A R IZ O N A 85036 A d v an ce In fo rm atio n E R R O R D ET EC T IO N A N D C O R R E C T IO N C IR C U IT E R R O R D E T E C T IO N A N D C O R R E C T I O N C IR C U I T
|
OCR Scan
|
PDF
|
MC74F2960/D
MC74F2960/
Am2960
MC74F2960A
C74F2960
74F2960A
C6460B
RAS 2415
hamming code
mc74f
MC74F2960A
|
VP16V8
Abstract: VP20V8 VP20V8E-25 VP16V8E VP20V8E-35 ST 6395 BI VP16V8E-25 VP20V8E 16H8 gal programming algorithm
Text: VP16V8E • VP20V8E € GENERIC ARRAY LOGIC FEATURES • VP16V8E replaces most 20-pin bipolar PAL devices • Power-on reset for all registers • High-speed programming algorithm • VP20V8E replaces most 24-pin bipolar PAL devices • JEDEC approved TTL compatible
|
OCR Scan
|
PDF
|
VP16V8E
VP20V8E
VP16V8E
20-pin
VP20V8E
24-pin
8100-046-a-23-036
VP16V8
VP20V8
VP20V8E-25
VP20V8E-35
ST 6395 BI
VP16V8E-25
16H8
gal programming algorithm
|
|
Triquint PA LTE
Abstract: X01V
Text: Drive ESCON With HOTLink™ Introduction T h e IBM E S C O N E n te rp ris e System C O N n ec tio n in te rfac e is p re sen tly e x p erien c in g rap id g row th. O riginally d esig n ed as a re p la c e m e n t for the o ld e r block-m ux c h an n e l, it is also finding use as
|
OCR Scan
|
PDF
|
|
K 2961
Abstract: u2960 T6058
Text: S ig n e tic s 2960 Error Detection and Correction EDC Unit Product Specification Logic Products FEATURES • Boosts Memory Reliability — Corrects all single-bit errors. Detects all double and some triple-bit errors. Reliability of dynamic RAM systems is
|
OCR Scan
|
PDF
|
60-fold.
L003750S
64-Bit
LD03760S
K 2961
u2960
T6058
|
MT27
Abstract: No abstract text available
Text: S ig n e tic s 2960 Error Detection and Correction EDC Unit Product Specification Logic Products FEATURES • Boosts Memory Reliability — Corrects all single-bit errors. Detects all double and some triple-bit errors. Reliability of dynamic RAM systems is
|
OCR Scan
|
PDF
|
60-fold.
DATA63-48
DATA15
LD03750S
64-Bit
LD03760S
MT27
|
Untitled
Abstract: No abstract text available
Text: 3 2 -B IT C M O S E R R O R D E T E C T IO N A N D C O R R E C T IO N U N IT i d t 49C460 b DESCRIPTION: FEATURES: • Fast Detect Correct — IDT49C460B 25ns max. 30ns (max.) — IDT49C460A 30ns (max.) 40ns (max.) 36ns (max.) — IDT49C460 IDT49C460 The IDT49C460S are high-speed, low-power, 32-blt Error De
|
OCR Scan
|
PDF
|
49C460
IDT49C460B
IDT49C460A
IDT49C460S
32-blt
32-bit
32-bit
|
74F2960
Abstract: bit slice processors C3263 MC68000 f2960 AM2960 "hamming code"
Text: AA MOTOROLA MC74F2960/ Am2960 MC74F2960A A d v a n c e In fo rm atio n E R R O R D E T E C T IO N A N D C O R R E C T IO N C IR C U IT E R R O R D E T E C T IO N A N D C O R R E C T IO N C IR C U IT A D V A N C E D LO W P O W ER S C H O T T K Y T h e M C 7 4 F 2 9 6 0 w ilt be d ual m a rk e d w ith the A M D p a rt n u m b e r
|
OCR Scan
|
PDF
|
MC74F2960
Am2960
MC74F2960A
16-bit
74F2960
bit slice processors
C3263
MC68000
f2960
"hamming code"
|
74F2960
Abstract: No abstract text available
Text: MC74F2960/ Am2960 MC74F2960A Advance Information E R R O R D E T E C T IO N A N D C O R R E C T IO N C IR C U IT E R R O R D E T E C T IO N A N D C O R R E C T IO N C IR C U IT A D V A N C E D LOW POW ER SCH O TTK Y The MC74F2960 w ill be dual m arked w ith th e A M D p art num ber
|
OCR Scan
|
PDF
|
MC74F2960/
Am2960
MC74F2960A
MC74F2960
MC74F2960A
74F2960
|
49C466
Abstract: No abstract text available
Text: 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT jd j/ IDT49C466 IDT49C466A PRELIMINARY Integrated Dev ce Technology, Inc. FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • S eparate System and M em ory D ata Input/Output Buses • — Error Detect Tim e: 10ns
|
OCR Scan
|
PDF
|
64-BIT
IDT49C466
IDT49C466A
16-deep
208-pin
4A25771
IDT49C466/A
49C466
MIL-STD-883,
|
TDA 2038
Abstract: Z8613RS Z8613 PCODE Z8612-12 z8 4k xrom z8612
Text: Z8 Z8611 Z8 Z8612 Z8 Z8613 Product Specification Zilog M arch 1985 Z8611 Single-Chip Microcomputer with 4K ROM Z8612 Development Device with Memory Interface Z8613 Prototyping Device with EPROM Interface • C om plete m icrocom puter, 4K bytes of ROM, 128 bytes of RAM, 32 I/O lines, a n d u p to
|
OCR Scan
|
PDF
|
Z8611
Z8612
Z8613
144-byte
40-pin
Z8611-12
TDA 2038
Z8613RS
Z8613
PCODE
Z8612-12
z8 4k xrom
|
Untitled
Abstract: No abstract text available
Text: FUJITSU MICROELECTRONICS 17 F U J IT S U Ï Ë J 3 7 ^ 7^2 DOQMbST S ~~J~ T-45-/7 LS-TTL’ERROR CHECKING AND % CORRECTION CIRCUIT MB 1412 A May 1981 FUJITSU MB 1412A EIGHT-BIT S L IC E ECC LSI The MB 1412A is an 8-bit slice Error Checking and Correction ECC monolithic
|
OCR Scan
|
PDF
|
T-45-/7
64-pin
D004fc
64-LEAD
PGA-64C-M01)
|
ut 803A
Abstract: SM803 b 803a SM805 SM803A
Text: SM 803/SM 803A/SM 805/SM 805A CMOS 8-Bit Single Chip Microcomuputer SM803/SM803A SM805/SM805A • CMOS 8-Bit Single Chip Microcomuputers Description Pin Connections T he S M 8 0 3 /A , S M 8 0 5 /A are CMOS 8 -b it sin gle chip m icrocom puters which have 4K bytes and
|
OCR Scan
|
PDF
|
803/SM
03A/SM
805/SM
SM803/SM803A
SM805/SM805A
ut 803A
SM803
b 803a
SM805
SM803A
|