tms 3755
Abstract: MACH110 MACH111SP MACH211SP MACHpro cpld manual
Text: MACH 1 & 2 FAMILIES 1 MACH 1 & 2 Families MACH 1 and 2 Families High-Performance, Low Cost EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ High-performance, low-cost, electrically-erasable CMOS PLD families ◆ 32 to 128 macrocells 1250 to 5000 PLD gates
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5/6/7/10/12/15-ns
7/10/12/14/18-ns
PQL100
100-Pin
16-038-PQT-2
tms 3755
MACH110
MACH111SP
MACH211SP
MACHpro
cpld manual
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MACH4 cpld amd
Abstract: mach 1 family amd HP3070
Text: MACH 4 FAMILY 1 MACH 4 Family High Performance EE CMOS Programmable Logic With Maximum Ease Of Use DISTINCTIVE CHARACTERISTICS ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ ◆ MACH 4 Family ◆ High-performance, EE CMOS CPLD family SpeedLocking for guaranteed fixed timing -7/10/12/15 ns tPD
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16-038-PQR-1
PRH208
MACH4 cpld amd
mach 1 family amd
HP3070
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HP3070
Abstract: mach 1 family amd MACH4 cpld amd
Text: MACH 4 FAMILY 1 MACH 4 Family High Performance EE CMOS Programmable Logic With Maximum Ease Of Use DISTINCTIVE CHARACTERISTICS ◆ High-performance, EE CMOS CPLD family ◆ SpeedLocking for guaranteed fixed timing -7/10/12/15 ns tPD ◆ High density
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16-038-PQR-1
PRH208
HP3070
mach 1 family amd
MACH4 cpld amd
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mach 1 family amd
Abstract: HP3070 MACH4 cpld amd Single T-Type Flip-Flop mach131 mach 3 family
Text: MACH 4 FAMILY 1 Back MACH 4 Family High Performance EE CMOS Programmable Logic With Maximum Ease Of Use DISTINCTIVE CHARACTERISTICS ◆ High-performance, EE CMOS CPLD family ◆ SpeedLocking for guaranteed fixed timing -7/10/12/15 ns tPD ◆ High density
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16-038-PQR-1
PRH208
mach 1 family amd
HP3070
MACH4 cpld amd
Single T-Type Flip-Flop
mach131
mach 3 family
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sine to square
Abstract: light activated switch National Semiconductor AN-140 pulse stretcher CMOS Transmission gate Specifications 12-pulse inverter AN-140 AN-140 national MM74C04 MM74C10
Text: ANALYZING THE CMOS SCHMITT The input of the Schmitt trigger goes through a standard input protection and is tied to the gates of four stacked de- vices The upper two are P-channel and the lower two are N-channel Transistors P3 and N3 are operating in the source follower mode and introduce hysteresis by feeding
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VTXP-12
Abstract: TranSwitch Corporation TXC-06950 98822 TXC-06950AIOG
Text: TM VTXP-12 Device STM-4/STS-12 SDH/SONET TU/VT Processor and Cross Connect TXC-06950 DATA SHEET PRELIMINARY TXC-06950-MB, Ed. 6 March 2006 FEATURES • Supports one line and one auxiliary port using the standard byte wide 77.76 MHz Telecom Bus • Four independently configurable tributary add and drop standard byte wide Telecom
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VTXP-12
STM-4/STS-12
TXC-06950
TXC-06950-MB,
STS-12
TU-11/TU-12/TU-3/
TranSwitch Corporation
TXC-06950
98822
TXC-06950AIOG
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ML675050
Abstract: RSA ARM
Text: ML675050 32-Bit ARM7TDMITM Based Application Specific Microcontroller DESCRIPTION The Oki ML675050 32-Bit ARM7TDMITM Based Application Specific Microcontroller optimized for IC card reader/writers, which supports the ISO-7816 T=0/T=1 protocol complying IC card interface, a variety of serial
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ML675050
32-Bit
ML675050
ISO-7816
RSA ARM
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me520B
Abstract: TXC-04252AIOG tni4 TSC04 bd7116 TXC-04252 ad4155 ad6157 Z700
Text: QE1M Device Quad E1 Mapper TXC-04252 FEATURES DESCRIPTION • Add/drop four 2.048 Mbit/s signals from STM-1/VC-4, STS-3/AU-3 or STS-1 buses • Independent add and drop bus timing modes • Selectable HDB3 positive/negative rail or NRZ E1 interface. Performance counter provided for coding violations.
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TXC-04252
TXC-04252-MB
me520B
TXC-04252AIOG
tni4
TSC04
bd7116
TXC-04252
ad4155
ad6157
Z700
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TXC-04252AIPQ
Abstract: No abstract text available
Text: QE1M Device Quad E1 Mapper TXC-04252 FEATURES DESCRIPTION • Add/drop four 2.048 Mbit/s signals from STM-1/VC-4, STS-3/AU-3 or STS-1 buses • Independent add and drop bus timing modes • Selectable HDB3 positive/negative rail or NRZ E1 interface. Performance counter provided for coding violations.
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TXC-04252
TXC-04252-MB
TXC-04252AIPQ
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MOSFET marking smd 4425
Abstract: DVB-T Schematic set top box TOKO marking P4 tua60* TSSOP-38 DVB-T Schematic infineon tuner IC MOSFET SAW MARKING CODE TSSOP-38 TUA6034 TUA6034-T
Text: S pe c if icat io n , V 2. 5 , A pr il 20 0 4 TUA6034, TUA6036 3- Ban d Di g i tal T V / S et- T op -B ox Tu ne r IC TA IF UN Ver s i on 2 .5 W i re l e s s C o m mu n i c a t i o n N e v e r s t o p t h i n k i n g . Edition 2004-04-28 Published by Infineon Technologies AG,
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TUA6034,
TUA6036
TSSOP-38
TSSOP-38
VQFN-48
MOSFET marking smd 4425
DVB-T Schematic set top box
TOKO marking P4
tua60* TSSOP-38
DVB-T Schematic
infineon tuner IC
MOSFET SAW MARKING CODE
TUA6034
TUA6034-T
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VT1613
Abstract: Philips Components, quartz crystal devices 4322
Text: INTEGRATED CIRCUITS DATA SHEET TSA5059 2.7 GHz I2C-bus controlled low phase noise frequency synthesizer Product specification Supersedes data of 2000 Jun 08 File under Integrated Circuits, IC02 2000 Jul 11 Philips Semiconductors Product specification 2.7 GHz I2C-bus controlled low phase
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TSA5059
753504/03/pp24
VT1613
Philips Components, quartz crystal devices 4322
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TPI20
Abstract: TXC-03114 TPI13
Text: TEMx28 Device 28 Channel Dual Bus High Density Mapper TXC-04222 DATA SHEET • Add/drop up to 28 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses • Add bus and drop bus timing modes • Cross mapping applications DS1 mapped to/from
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TEMx28
TXC-04222
VT2/TU-12s)
TXC-04222-MB
TPI20
TXC-03114
TPI13
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tag 8713
Abstract: fi1236 ADB 444 Philips Analog TV tuner FI1236 3139 147 tuner 3139 147 tuner 3139 147 13251 FI1236MK2 4020 divider datasheet philips tv tuner 3139 147
Text: BU TUNERS DATA SHEET FI1236MK2 Desktop video tuner system RTMA M/N Preliminary specification File under BU Tuners, DC03 1996 Mar 19 Philips Components Preliminary specification Desktop video tuner system RTMA M/N FI1236MK2 FEATURES • System RTMA M and N
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FI1236MK2
FI1236MK2/HM/PH
FI1236MK2/HM/F
COD04
tag 8713
fi1236
ADB 444
Philips Analog TV tuner FI1236
3139 147
tuner 3139 147
tuner 3139 147 13251
FI1236MK2
4020 divider datasheet
philips tv tuner 3139 147
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tpi22
Abstract: No abstract text available
Text: TEMx28 Device 28 Channel Dual Bus High Density Mapper TXC-04222 DATA SHEET PRODUCT PREVIEW • Add/drop up to 28 E1, DS1, or VT/TU payloads from two add and two drop STM-1/VC4, STS-3 buses • Add bus and drop bus timing modes • Cross mapping applications DS1 mapped to/from
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TEMx28
TXC-04222
VT2/TU-12s)
TXC-04222-MB
tpi22
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b24 b03
Abstract: SLmf BIP-2
Text: DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating VT1.5 byte-synchronous mapping for use
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TXC-04201B
TU-11
5/TU-11
TXC-04201B-MB
b24 b03
SLmf
BIP-2
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Untitled
Abstract: No abstract text available
Text: M Series Data Sheet 50 Watt DC-DC and AC-DC Converters Features • Extremly wide operating input voltage ranges from 8 to 385 VDC and 85 to 264 VAC, 47 to 440 Hz • RoHS lead-solder exemption compliant • Class I equipment • Input over- and undervoltage lockout
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HZZ00619]
BCD20018-G
09-Jan-2013
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1587H
Abstract: No abstract text available
Text: PM8315 TEMUX PRELIMINARY DATASHEET PMC-981125 ISSUE 4 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX PM8315 TEMUX HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MULTIPLEXER DATASHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY
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PMC-981125
PM8315
PM8315
PMC-981125
PMC-971268
1587H
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transistor kt 326
Abstract: transistor KT 3107 Belcanto ST 3010 transistor BU 5027 J 5027-R atakassette SANYO CTP 4360 transistor kt 925 Transstereo 2401.00 transistor KT 816
Text: SERVICE-MITTEILUNGEN V E B IN D U S T R IE V E R T R IE B R U N D F U N K U N O F E R N S E H E N ir .f -t j | R A P io -teievlslon JUNI/JULI 1960 6/7 SKITB 1-8 Mitteilung aus dem VEB Fernsehgerätewerke Staßfurt Informationen für den Fernsehgeräteservice
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018h
Abstract: au3a
Text: QE1M Device Quad E1 Mapper TXC-04252 DATA SHEET FEATURES DESCRIPTION = • Add/drop four 2.048 Mbit/s signals from STM-1/VC-4, STS-3/AU-3 or STS-1 buses • Independent add and drop bus timing modes The Quad E1 Mapper device is designed for add/drop multiplexer, terminal multiplexer, and dual and single
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TXC-04252
Unit-12
TU-12)
TXG-04252-M
018h
au3a
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tundra scv64
Abstract: CA91C078 SCH 298 SCV64 D854 btb 137 SCV-64
Text: Backplane Interface Components - SCV64 User Manual 4 Signals and DC Characteristics 4.1 Terminology The input and output types have all been abbreviated with a letter code. For example, the VDATA31-00 signals are shown as input type CTTL which are CMOS inputs with normal
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SCV64
VDATA31-00
SCV64
304-Pin
000M753
CA91C078
tundra scv64
CA91C078
SCH 298
D854
btb 137
SCV-64
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Untitled
Abstract: No abstract text available
Text: QE1M Device Quad E1 Mapper TXC-04252 DATA SHEET FEATURES DESCRIPTION = The Quad E1 Mapper device is designed for add/drop multiplexer, terminal multiplexer, and dual and single unidirectional ring applications. Four E1 2.048 Mbit/s signals are mapped to and from asynchronous Tributary
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TXC-04252
Unit-12
TU-12)
TXC-04252-M
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Untitled
Abstract: No abstract text available
Text: TO SHIBA TA1297AFN TOSHIBA BIPOLAR LINEAR INTEGRATED CIRCUIT T A SILICON MONOLITHIC 1 2 9 7 A F N RF M ODULATOR FOR VCR The TA1297AFN is a PLL RF modulator for the UHF frequency range. The multi system can easily make the lineup development. FEATURES • Phase locked loop frequency synthesizer for RF carrier and
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TA1297AFN
TA1297AFN
SSOP24-P-300-0
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BIM G18 Y1
Abstract: No abstract text available
Text: Backplane Interface Components - SCV64 User Manual 4 Signals and DC Characteristics 4.1 Terminology The input and output types have all been abbreviated with a letter code. For example, the VDATA31-00 signals are shown as input type CTTL which are CMOS inputs with normal
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SCV64
VDATA31-00
SCV64
304-Pin
CA91C078
BIM G18 Y1
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gi 08d
Abstract: No abstract text available
Text: QE1M D evice Quad E1 Mapper TXC-04252 DATA SHEET PRODUCT PREVIEW F FEATURES DESCRIPTION • Add/drop four 2.048 Mbit/s signals from an STM-1 VC-4, STS-3/AU-3, or an STS-1 • Independent add and drop bus timing modes • Selectable HDB3 positive/negative rail or NRZ
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TXC-04252
Unit-12s
TU-12s)
TXC-04252-M
gi 08d
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