100-BT
Abstract: No abstract text available
Text: TLK100 www.ti.com SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009 Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver Check for Samples: TLK100 1 Introduction 1.1 Features 1 • • • • • • • • • • • • Temperature From –40°C to 85°C
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TLK100
SLLS931B
200mW
10BASE-T
100BASE-TX
IEEE1588
100-BT
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IEEE1588
Abstract: VD11
Text: TLK100 www.ti.com SLLS931B – AUGUST 2009 – REVISED DECEMBER 2009 Industrial Temp, Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver Check for Samples: TLK100 1 Introduction 1.1 Features 1 • • • • • • • • • • • • Temperature From –40°C to 85°C
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TLK100
SLLS931B
200mW
10BASE-T
IEEE1588
VD11
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Untitled
Abstract: No abstract text available
Text: Component Development Environment CDE User Guide Revised: 17 January 2013 Freescale, the Freescale logo, CodeWarrior, ColdFire, ColdFire+, Kinetis, Processor Expert, and Qorivva are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. All other product or service names are the property
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HV633
Abstract: HV633PG HV633PG-G
Text: HV633 32-Channel, 128-Level Amplitude Gray-Shade Display Column Driver Features General Description ► ► ► ► ► ► ► ► ► The HV633 is a 32-channel driver IC for gray shade display use. It is designed to produce varying output voltages between
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HV633
32-Channel,
128-Level
HV633
32-channel
24MHz
DSFP-HV633
A062209
HV633PG
HV633PG-G
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Untitled
Abstract: No abstract text available
Text: EM78P210N 8-Bit Microcontroller with OTP ROM Product Specification DOC. VERSION 1.3 ELAN MICROELECTRONICS CORP. April 2013 Trademark Acknowledgments: IBM is a registered trademark and PS/2 is a trademark of IBM. Windows is a trademark of Microsoft Corporation.
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EM78P210N
16MHz,
EM78P210N-V
EM78P210N-U
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9LPRS501
Abstract: CK505 72 pin 9LPRS501SGLF ck505
Text: Datasheet ICS9LPRS501 64-PIN CK505 W/FULLY INTEGRATED VOLTAGE REGULATOR + INTEGRATED SERIES RESISTOR Recommended Application: Key Specifications: CK505 compliant clock with fully integrated voltage regulator and Internal series resistor on differential outputs,
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64-PIN
CK505
ICS9LPRS501
125ps
250ps
100ppm
33MHz
199707558G
9LPRS501
CK505 72 pin
9LPRS501SGLF
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ph82
Abstract: ph84 PL83 EM78P350N EM78P350NK EM78P350NM EM78P350NP PH67
Text: EM78P350N 8-Bit Microprocessor with OTP ROM Product Specification DOC. VERSION 1.0 ELAN MICROELECTRONICS CORP. September 2006 Trademark Acknowledgments: IBM is a registered trademark and PS/2 is a trademark of IBM. Windows is a trademark of Microsoft Corporation.
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EM78P350N
ph82
ph84
PL83
EM78P350N
EM78P350NK
EM78P350NM
EM78P350NP
PH67
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transistor bl p89
Abstract: bl p74 transistor J955 XC4000 XC4000A XC4000D XC4000E XC4000EX XC4000H p180 g8
Text: book XC4000E and XC4000X Series Field Programmable Gate Arrays R January 29, 1999 Version 1.5 6* XC4000E and XC4000X Series Features Note: XC4000 Series devices described in this data sheet include the XC4000E family and XC4000X Series. XC4000X Series devices described in this data sheet
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XC4000E
XC4000X
XC4000
XC4000EX
XC4000XL
transistor bl p89
bl p74 transistor
J955
XC4000A
XC4000D
XC4000H
p180 g8
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sigma sc30
Abstract: STMicroelectronics supressor ST75C530 ST75C530FP-A ST75C540 ST75C540FP-A T104 TQFP80 wiring diagram echo microphone schematics analog satellite receiver
Text: ST75C530 ST75C540 SUPER INTEGRATED DEVICES WITH DSP, AFE & MEMORIES FOR TELEPHONY, MODEM, FAX OVER INTERNET & POTS LINES SUMMARIZED FEATURES for detailed features, see page 4 . . . . . . . . SINGLE CHIP FAX Up to 14.4Kbps (V.17) FULL DUPLEX DATA MODEM UP TO
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ST75C530
ST75C540
32Bis)
16Kbps
650mW
ST75C530xpress
sigma sc30
STMicroelectronics supressor
ST75C530
ST75C530FP-A
ST75C540
ST75C540FP-A
T104
TQFP80
wiring diagram echo microphone
schematics analog satellite receiver
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4046 FSK
Abstract: BELL212A ST18933 ST7544 ST75C502 TQFP44 TQFP80 tdt7 ST TX01
Text: ST75C502 V.32bis/V.17 HIGH SPEED MODEM DATA PUMP . . . . . . . . . . . . 2 CHIP DATA PUMP ST75C502, ST7544 V.32BIS, V.17, V.33, V.32, V.29, V.27ter, V.22BIS, V.22, V.21, V.23, BELL212A, 103 (SHORT TRAIN INCLUDING V.29/T104) GROUP 3 FAX AT 14400, 12000, 9600, 7200,
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ST75C502
32bis/V
ST75C502,
ST7544)
32BIS,
27ter,
22BIS,
BELL212A,
29/T104)
2400BPS
4046 FSK
BELL212A
ST18933
ST7544
ST75C502
TQFP44
TQFP80
tdt7
ST TX01
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VG-4231CA
Abstract: No abstract text available
Text: Product Configuration System Oscillators - VCXO VG 4231CA VG‐4231CA 75.0000M
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VG4231CA
4231CA
0000M
0000MHz
1000pcs/reel
250pcs/reel
/35ppm
/50ppm
VG-4231CA
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window alarm 323H
Abstract: B772 031 B765 TCA 365H b772 p B788 AW 136H E1 HDB3 128-PIN PQFP 38Dh
Text: PM7344 S/UNI-MPH DATA SHEET PMC-950449 ISSUE 6 MULTI-PHY USER NETWORK INTERFACE PM7344 TM S/UNI- MPH S/UNI-MPH SATURN QUAD T1/E1 MULTI-PHY USER NETWORK INTERFACE DEVICE DATA SHEET ISSUE 6: JUNE 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PM7344
PMC-950449
PM7344
PMC-940873,
PMC-940873
window alarm 323H
B772 031
B765
TCA 365H
b772 p
B788
AW 136H
E1 HDB3
128-PIN PQFP
38Dh
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LC 21 B
Abstract: No abstract text available
Text: HV633 HV633 Preliminary 32-Channel 128-Level Amplitude Gray-Shade Display Column Driver Features General Description ❏ 5V CMOS inputs The HV633 is a 32-channel driver IC for gray shade display use. It is designed to produce varying output voltages between 3 and
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HV633
32-Channel
128-Level
24MHz
64-lead
HV633
08/08/03rev
LC 21 B
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pec 730
Abstract: 9LP525BF-2LF desktop board crb
Text: DATASHEET 56-pin CK505 for Intel Desktop Systems Recommended Application: CK505 clock, 56-pin Intel Yellow Cover part Output Features: • 2 - CPU differential low power push-pull pairs • 7- SRC differential low power push-pull pairs • 1 - CPU/SRC selectable differential low power push-pull pair
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56-pin
CK505
33MHz
33MHz
48MHz
318MHz
125ps
250ps
pec 730
9LP525BF-2LF
desktop board crb
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Untitled
Abstract: No abstract text available
Text: 1CT i 1CT J1 J2 J3 J4 J5 J6 J7 J8 TD+ TDRCT rd- P 6 ch a s s is g n d (P 8 lOOOpF, 2KV RX- NDTES 1.0 CDMPLIES WITH THE EURDPEAN D IR E C T IV E 2 0 0 2 / 9 5 / E C , CALLING FDR THE ELIMINATION DF LEAD AND EITHER HAZARDOUS SUBSTANCES FRDM ELECTRONIC PRDDUCTS,
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350uH
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Untitled
Abstract: No abstract text available
Text: 1CT : 1CT J1 J2 J3 J4 J5 J6 J7 J8 TD+ TDRCT TX + TXRX+ RX- lOOOpF, 2 K V NDTES 1,0 PINS WITHDUT E L E C T R I C A L CDNNECTIDN ARE DMITTED, ELECTRICAL SPECIFICATIONS: OPERATING TEMPERATURE RANGE: -40'C TO + 8 5 ’ C 1.0 TURNS RATIO: P 4 - P 5 - P 6 : (J 3 - J 6 )
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350uH
100KHz,
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Untitled
Abstract: No abstract text available
Text: 1CT i 1CT J1 J2 J3 J4 J5 J6 J7 J8 TD+ TDRCT rd- P 6 ch a s s is g n d (P 8 lOOOpF, 2KV RX- NDTES 1.0 CDMPLIES WITH THE EURDPEAN D I R E C T I V E 2 0 0 2 / 9 5 / E C , CALLING FDR THE ELIMINATION DF LEAD AND EITHER HAZARDOUS SU BSTANCES FRDM ELECTRONIC PRDDUCTS,
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350uH
SI-5021
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Untitled
Abstract: No abstract text available
Text: 1CT i 1CT J1 J2 J3 J4 J5 J6 J7 J8 TD+ TDRCT rd- P 6 c h a s s is g n d ( P 8 lOOOpF, 2 K V 1.0 CDMPLIES WITH THE EURDPEAN D I R E C T I V E 2 0 0 2 / 9 5 / E C , CALLING FDR THE ELIMINATION DF LEAD AND EITHER HAZARDOUS SU BSTANCES FRDM ELECTRONIC PRDDUCTS,
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350uH
100KHz,
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50087
Abstract: 708117
Text: 1CT : 1CT J1 J2 J3 J4 J5 J6 J7 J8 TD+ TDRCT rd- P 6 CHASSIS GN d ( P 8 ) - TX+ TXRX+ RX- lOOOpF, 2 K V NDTES ELECTRICAL SPECIFICATIONS: 1,0 PINS WITHDUT E L E C T R I C A L CDNNECTIDN ARE DMITTED, 1.0 TURNS RATIO ( P 4 - P 5 - P 6 ) : ( J 3 - J 6 ) (P 3 -P 2 -P 1 ) : (J 1 -J 2 )
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350uH
100KHz,
ct720034x1
50087
708117
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56531
Abstract: No abstract text available
Text: DG485 Octal Analog Switch Array Features Benefits Applications • • • • • • • Low Signal Distortion • Devices Can Be Chained for System Expansion • Reduced Board Space • Reduced Switch Errors • Reduced Power Supply Requirements • Simple Interfacing
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DG485
DG485
S-56531--Rev.
29-Dec-97
56531
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ttl 7492
Abstract: 74912 7490 pin diagram 7490 mod 16 chip 7490 TTL 7490 data 7492 pin out diagram C108H
Text: PRELIMINARY CYM7490 CYM7491 CYM7492 i486 Level II Cache Module Family Features Functional Description • Cache sizes of 64 KB, 256 KB, or 1 MB • Tag width of 8 bits • Independent dirty bit • Operates with 33-MHz Intel ¡486 processors • Zero-wait-state operation
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CYM7490
CYM7491
CYM7492
33-MHz
64-position
128-signal)
i486-based
32-bit-wide
of8Kx32
ttl 7492
74912
7490 pin diagram
7490 mod 16
chip 7490
TTL 7490 data
7492 pin out diagram
C108H
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GG1Q
Abstract: No abstract text available
Text: 1.0 Product Description 1.1 Introduction Figure 1-1 is a detailed block diagram o f the Bt8222. For transmission from the host system, octet-wide data is input from the UTOPIA or FIFO ports. The host data is assembled into ATM cells and then formatted for serial line transmission
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Bt8222.
GG1Q
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Untitled
Abstract: No abstract text available
Text: ¿ 7 7 * J Æ , S C S -T H O M S O N ST75C52 l i! S O g lB i ll l i® ¥ l s ! ® H B @ § HIGH SPEED FAX MODEM DATA PUMP • ITU-T V.17, V.29, V.27ter, V.21 WITH FAX SUPPORT ■ ITU-T V.23, V.21, BELL 103 ■ V.17, V.29 (T104 , V.27ter SHORT TRAINS ■ V.33 HALF-DUPLEX
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ST75C52
27ter,
27ter
14400bps.
1800Hz
1700Hz
500mW
10OnF
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Untitled
Abstract: No abstract text available
Text: r = J S G S -T tfO M S O N ST5451 ISDN HDLC AND GCI CONTROLLER A D V A N C E DATA . • ■ ■ ■ . . ■ MONOLITHIC ISDN ORIENTED HDLC AND GCI CONTROLLER. GCI AND |iW/DSI COMPATIBLE. FULLY CONTROLLING GCI AND GCI-SCIT M & C/I CHANNELS MANAGEMENT. FULLY SUPPORTING LAPB AND LAPD
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ST5451
64bytes
ST5451
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