RGB666
Abstract: 800X480 DS90C124
Text: DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90C241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with
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DS90C241/DS90C124
5-35MHz
24-Bit
DS90C241/124
RGB666
800X480
DS90C124
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DS90C124
Abstract: VBC48A AEC-Q100 AN-1108 AN-1217 DS90C241 ISO10605 RGB666
Text: DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90C241/DS90C124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream
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DS90C241/DS90C124
5-35MHz
24-Bit
DS90C241/DS90C124
DS90C124
VBC48A
AEC-Q100
AN-1108
AN-1217
DS90C241
ISO10605
RGB666
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DS90C124
Abstract: No abstract text available
Text: DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90C241/DS90C124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream
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DS90C241/DS90C124
5-35MHz
24-Bit
DS90C124
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DS90C124
Abstract: AEC-Q100 AN-1108 AN-1217 DS90C241 ISO10605 RGB666
Text: DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90C241/DS90C124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream
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DS90C241/DS90C124
5-35MHz
24-Bit
DS90C241/DS90C124
DS90C124
AEC-Q100
AN-1108
AN-1217
DS90C241
ISO10605
RGB666
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DS90C124
Abstract: AEC-Q100 AN-1108 AN-1217 DS90C241 ISO10605 RGB666
Text: DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90C241/DS90C124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream
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DS90C241/DS90C124
5-35MHz
24-Bit
DS90C241/DS90C124
DS90C124
AEC-Q100
AN-1108
AN-1217
DS90C241
ISO10605
RGB666
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DS90C124
Abstract: AEC-Q100 AN-1108 AN-1217 DS90C241 ISO10605 RGB666 DS90C241IVS48
Text: DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90C241/DS90C124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream
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DS90C241/DS90C124
5-35MHz
24-Bit
DS90C241/DS90C124
DS90C124
AEC-Q100
AN-1108
AN-1217
DS90C241
ISO10605
RGB666
DS90C241IVS48
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DS90C124
Abstract: No abstract text available
Text: DS90UR241/DS90UR124 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with
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DS90UR241/DS90UR124
24-Bit
DS90UR241/124
DS90C124
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DS90C124
Abstract: No abstract text available
Text: DS90UR241/DS90UR124 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with
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DS90UR241/DS90UR124
24-Bit
DS90UR241/124
DS90C124
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RGB666
Abstract: LVDS connector 40 pins DS90C124 DS90UR124 giga media converter LVDS 30 pin connector cable LVDS connector 40 pins NAME SDI SERIALIZER SWITCHING NOISE SUPPRESSION OF LVDS SERIALIZER AEC-Q100
Text: DS90UR241/DS90UR124 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with
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DS90UR241/DS90UR124
24-Bit
DS90UR241/124
RGB666
LVDS connector 40 pins
DS90C124
DS90UR124
giga media converter
LVDS 30 pin connector cable
LVDS connector 40 pins NAME
SDI SERIALIZER
SWITCHING NOISE SUPPRESSION OF LVDS SERIALIZER
AEC-Q100
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DS90UR241IVS
Abstract: DS90UR241QVS DS90UR241QVSX RGB666 AEC-Q100 DS90C124
Text: September 4, 2009 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset General Description The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock information. This chipset is ideally suited for driving graphical data to displays requiring 18bit color depth - RGB666 + HS, VS, DE + 3 additional general
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24-Bit
DS90UR241/124
18bit
RGB666
DS90UR241/1ational
DS90UR241IVS
DS90UR241QVS
DS90UR241QVSX
RGB666
AEC-Q100
DS90C124
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second order low pass filter
Abstract: RGB666 DS90C124
Text: DS90UR241/DS90UR124 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with
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DS90UR241/DS90UR124
24-Bit
DS90UR241/124
second order low pass filter
RGB666
DS90C124
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AEC-Q100
Abstract: DS90UR241IVS DS90UR241QVS DS90UR241QVSX RGB666 DS90C124
Text: October 5, 2011 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset General Description The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control FPD-Link II LVDS serial stream with embedded clock information. This chipset is ideally suited for driving graphical data to displays requiring 18bit color depth - RGB666 + HS, VS, DE + 3 additional general
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24-Bit
DS90UR241/124
18bit
RGB666
DS90UR241/124ational
AEC-Q100
DS90UR241IVS
DS90UR241QVS
DS90UR241QVSX
RGB666
DS90C124
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DS90C124
Abstract: AEC-Q100 AN-1217 DS90UR124 DS90UR241 ISO10605
Text: DS90UR241/DS90UR124 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with
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DS90UR241/DS90UR124
24-Bit
DS90UR241/124
DS90C124
AEC-Q100
AN-1217
DS90UR124
DS90UR241
ISO10605
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DS90C124
Abstract: AEC-Q100 AN-1217 DS90C241 DS90UR124 DS90UR241 ISO10605
Text: DS90UR241/DS90UR124 5-43 MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description • User selectable clock edge for parallel data on both The DS90UR241/124 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with
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DS90UR241/DS90UR124
24-Bit
DS90UR241/124
DS90C124
AEC-Q100
AN-1217
DS90C241
DS90UR124
DS90UR241
ISO10605
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DS90C124
Abstract: No abstract text available
Text: DS90UR124,DS90UR241 DS90UR241Q DS90UR124Q 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset Literature Number: SNLS231M October 5, 2011 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset General Description
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DS90UR124
DS90UR241
DS90UR241Q
DS90UR124Q
24-Bit
SNLS231M
DS90UR241Q/DS90UR124Q
DS90UR124Q
DS90C124
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DS90C124
Abstract: No abstract text available
Text: DS90C124, DS90C241 www.ti.com SNLS209K – NOVEMBER 2005 – REVISED SEPTEMBER 2011 DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Check for Samples: DS90C124, DS90C241 FEATURES 1 • 23 • • • • • 5 MHz–35 MHz clock embedded and DCBalancing 24:1 and 1:24 data transmissions
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DS90C124,
DS90C241
SNLS209K
DS90C241/DS90C124
5-35MHz
24-Bit
DS90C124
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DS90C124-Q1
Abstract: DS90C124
Text: DS90C124, DS90C241 www.ti.com SNLS209L – NOVEMBER 2005 – REVISED APRIL 2013 DS90C241 and DS90C124 5-MHz to 35-MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Check for Samples: DS90C124, DS90C241 FEATURES DESCRIPTION • The DS90C241 and DS90C124 chipset translates a
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DS90C124,
DS90C241
SNLS209L
DS90C241
DS90C124
35-MHz
24-Bit
DS90C124-Q1
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Untitled
Abstract: No abstract text available
Text: ADS5281 ADS5282 www.ti.com SBAS397I – DECEMBER 2006 – REVISED JUNE 2012 12-Bit Octal-Channel ADC Family Up to 65MSPS Check for Samples: ADS5281, ADS5282 LCLKN 12x ADCLK PLL ADCLKP 1x ADCLK ADCLKN PowerDown Channels 2 to 7 OUT8P OUT8N Drive Current ADC
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ADS5281
ADS5282
SBAS397I
12-Bit
65MSPS
ADS5281,
12-Bit
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SBAS397I
Abstract: AZ5281 ADS528x 1000w audio crossover circuit diagram
Text: ADS5281 ADS5282 www.ti.com SBAS397I – DECEMBER 2006 – REVISED JUNE 2012 12-Bit Octal-Channel ADC Family Up to 65MSPS Check for Samples: ADS5281, ADS5282 LCLKN 12x ADCLK PLL ADCLKP 1x ADCLK ADCLKN PowerDown Channels 2 to 7 OUT8P OUT8N Drive Current ADC
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ADS5281
ADS5282
SBAS397I
12-Bit
65MSPS
ADS5281,
ADS528x
HTQFP-80
SBAS397I
AZ5281
1000w audio crossover circuit diagram
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Untitled
Abstract: No abstract text available
Text: ADS5281 ADS5282 www.ti.com SBAS397I – DECEMBER 2006 – REVISED JUNE 2012 12-Bit Octal-Channel ADC Family Up to 65MSPS Check for Samples: ADS5281, ADS5282 LCLKN 12x ADCLK PLL ADCLKP 1x ADCLK ADCLKN PowerDown Channels 2 to 7 OUT8P OUT8N Drive Current ADC
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ADS5281
ADS5282
SBAS397I
12-Bit
65MSPS
ADS5281,
12-Bit
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Untitled
Abstract: No abstract text available
Text: ADS5281 ADS5282 www.ti.com SBAS397I – DECEMBER 2006 – REVISED JUNE 2012 12-Bit Octal-Channel ADC Family Up to 65MSPS Check for Samples: ADS5281, ADS5282 LCLKN 12x ADCLK PLL ADCLKP 1x ADCLK ADCLKN PowerDown Channels 2 to 7 OUT8P OUT8N Drive Current ADC
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ADS5281
ADS5282
SBAS397I
12-Bit
65MSPS
ADS5281,
12-Bit
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xapp
Abstract: No abstract text available
Text: ADS5281 ADS5282 www.ti.com SBAS397I – DECEMBER 2006 – REVISED JUNE 2012 12-Bit Octal-Channel ADC Family Up to 65MSPS Check for Samples: ADS5281, ADS5282 LCLKN 12x ADCLK PLL ADCLKP 1x ADCLK ADCLKN PowerDown Channels 2 to 7 OUT8P OUT8N Drive Current ADC
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ADS5281
ADS5282
SBAS397I
12-Bit
65MSPS
ADS5281,
ADS528x
HTQFP-80
xapp
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Untitled
Abstract: No abstract text available
Text: DS90UR124Q, DS90UR241Q www.ti.com SNLS231N – SEPTEMBER 2006 – REVISED MARCH 2013 DS90UR124Q DS90UR241Q 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset Check for Samples: DS90UR124Q, DS90UR241Q FEATURES APPLICATIONS • • •
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DS90UR124Q,
DS90UR241Q
SNLS231N
DS90UR124Q
DS90UR241Q
24-Bit
18-bit
43MHz
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Untitled
Abstract: No abstract text available
Text: DS90UR124, DS90UR241 www.ti.com SNLS231M – SEPTEMBER 2006 – REVISED OCTOBER 2011 DS90UR241Q DS90UR124Q 5-43 MHz DC-Balanced 24-Bit FPD-Link II Serializer and Deserializer Chipset Check for Samples: DS90UR124, DS90UR241 FEATURES 1 • • • 23 • •
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DS90UR124,
DS90UR241
SNLS231M
DS90UR241Q
DS90UR124Q
24-Bit
18-bit
43MHz
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