JTAG MODULE SPI
Abstract: spi flash parallel port TSOP 28 SPI memory Package flash 88P8341
Text: SPI EXCHANGE SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
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BH820-1)
88P8341
drw38
JTAG MODULE SPI
spi flash parallel port
TSOP 28 SPI memory Package flash
88P8341
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IDT88P8344
Abstract: 88P8344
Text: SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
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BH820-1)
88P8344
IDT88P8344
88P8344
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TSOP 48 thermal resistance type1
Abstract: IDT88P8342 drw22
Text: SPI EXCHANGE 2 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors
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BH820-1)
88P8342
TSOP 48 thermal resistance type1
IDT88P8342
drw22
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Untitled
Abstract: No abstract text available
Text: 0.1 MPC8XX I2C/SPI MICROCODE PACKAGE SPECIFICATIONS The modified I2C/SPI programming model allows concurrent operation of Ethernet and I2C or SPI by solving the parameter ram conflict caused by the fact that some of the Ethernet parameters overlay the I2C/SPI parameters. This is done by mapping the I2C/SPI parameters to other dual ported RAM area relocatable parameter ram .
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0x2202000
0x22021ff)
0x2202f00
0x2202fff)
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Tresos
Abstract: UM0565 SPI105 automotive ecu manual SPC563M SPI156 SPI DRIVER autosar autosar can driver
Text: UM0565 User manual SPC563M SPI driver Introduction This user manual describes the AUTOSAR serial peripheral interface SPI driver. AUTOSAR SPI driver configuration parameters and deviations from the specification are described in SPI driver chapter. AUTOSAR SPI driver requirements and APIs are described
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UM0565
SPC563M
Tresos
UM0565
SPI105
automotive ecu manual
SPI156
SPI DRIVER
autosar
autosar can driver
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Untitled
Abstract: No abstract text available
Text: ispLever CORE TM Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide October 2005 ipug29_02.0 Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide Lattice Semiconductor Introduction Lattice’s Quad SPI-3 System Packet Interface Level 3 to SPI-4 (System Packet Interface Level 4) Bridge is an IP
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ipug29
BS-2FE1036C.
SPI-324L-O4-N1.
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AN-300
Abstract: FM25040 FM25160
Text: AN-300 SPI Bus Compatibility FM25160 16Kb SPI FRAM Overview The FM25160 uses an industry standard SPI interface. When comparing the FM25160 with 16Kb SPI EEPROMs, users may notice two minor operating differences. First, the SPI bus protocol includes 4 modes which may be selected by the
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AN-300
FM25160
FM25040
16-bit
AN-300
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EDGE22
Abstract: FM25040 FM25160
Text: Application Note SPI Bus Compatibility FM25160 16Kb SPI FRAM Overview The FM25160 uses an industry standard SPI interface. When comparing the FM25160 with 16Kb SPI EEPROMs, users may notice two minor operating differences. First, the SPI bus protocol includes 4 modes which may be selected by the
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FM25160
FM25040
16-bit
EDGE22
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0123F POWER SUPPLY
Abstract: 0880E 0830B mcu 08300 0080D 0847f fcbg AA23 AC25 IDT7172604
Text: IDT88K8483 SPI-4 Exchange Document Issue 1.0 Description Features Functionality – Multiplexes logical ports LPs from SPI-4A and SPI-4B to SPI4M – Optionally converts between interleaved packet transfers and whole packet transfers per logical port – Data redirection per LP between SPI-4A, SPI-4B and 10G
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IDT88K8483
IDT88K8483BRI
IDT88K8483
IDT88K8483BLI
IDT88K8484
0123F POWER SUPPLY
0880E
0830B
mcu 08300
0080D
0847f
fcbg
AA23
AC25
IDT7172604
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TSX 07 software
Abstract: DPRAM Quad SPI MPC860 ORSPI4-2FE1036C SPI-324P-O4-N1 OIF-SPI4-02
Text: Quad SPI-3 to SPI-4 PHY Layer Bridge Core April 2004 IP Data Sheet Features – Configurable through the MicroProcessor Interface MPI ORCA 4 System Bus – Programmable parity type on SPI-3 bus • Complete Quad SPI-3 to SPI-4 PHY Layer Bridge Solution Based on the ORCA
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OIF-SPI3-01
ORSPI4-2FE1036C
SPI-324P-O4-N1.
TSX 07 software
DPRAM
Quad SPI
MPC860
SPI-324P-O4-N1
OIF-SPI4-02
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sck 082
Abstract: AN802 APP802 MAX5154 MAX7651 MAX7652 CAN protocol basics mosi CS 8-02
Text: Maxim > App Notes > A/D and D/A CONVERSION/SAMPLING CIRCUITS INTERFACE CIRCUITS Keywords: SPI, SPI interface, SCK, MOSI, MISO, CS, I/O ports, bit banging, SPI peripheral. Sep 17, 2001 APPLICATION NOTE 802 Interfacing SPI Peripherals to the MAX7651 Processor
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MAX7651
MAX7651,
12-bit
125KHz)
MAX7651
12MHz
com/an802
MAX5154:
MAX7651:
sck 082
AN802
APP802
MAX5154
MAX7652
CAN protocol basics
mosi
CS 8-02
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Untitled
Abstract: No abstract text available
Text: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay
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UCC5680
SLUS313D
Ultra3/Ultra160
Ultra320
EIA485)
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Untitled
Abstract: No abstract text available
Text: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay
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UCC5680
SLUS313D
Ultra3/Ultra160
Ultra320
EIA485)
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TSSOP-28
Abstract: UCC5680 UCC5680PW24 UCC5680PW28
Text: UCC5680 9ĆLINE LVD ONLY SCSI TERMINATOR WITH INTEGRATED SPIĆ3 DELAYS ą SLUS313D − MARCH 1999 - REVISED NOVEMBER 2003 D D D D D Standards Supported: SPI-2, SPI-3, SPI-4, LVD-Only Active Termination 2.7 V to 5.25 V Operation Differential Failsafe Bias Built-In SPI-3 Mode Change Filter/Delay
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UCC5680
SLUS313D
Ultra3/Ultra160
Ultra320
UCC5680
TSSOP-28
UCC5680PW24
UCC5680PW28
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xc6vlx130t-ff1156
Abstract: XILINX ipic axi
Text: LogiCORE IP AXI Serial Peripheral Interface AXI SPI (v1.02.a) DS742 January 18, 2012 Product Specification Introduction LogiCORE IP Facts The AXI Serial Peripheral Interface (SPI) connects to the Advanced eXtensible Interface (AXI4). This core provides a serial interface to SPI devices such as SPI
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DS742
M68HC11
32-bit
xc6vlx130t-ff1156
XILINX ipic axi
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AC324
Abstract: I2C Peripherals Serial communication I2C in AGLP125V2-CS289 Actel igloo
Text: Application Note AC324 SPI-to-I2C Interface Design Example Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I2C and SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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AC324
AC324
I2C Peripherals
Serial communication I2C in
AGLP125V2-CS289
Actel igloo
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25LC160
Abstract: DS464 M68HC11 MPC8260 M68HC11 reference manual ml300 ucf
Text: OPB Serial Peripheral Interface SPI (v1.00e) DS464 July 21, 2006 Product Specification 0 0 Introduction LogiCORE Facts The Xilinx OPB Serial Peripheral Interface (SPI) connects to the OPB and provides the controller interface to any SPI device such as SPI EEPROMs. It is
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DS464
M68HC11
M68HC11-Rev.
MPC8260
25LC160
M68HC11 reference manual
ml300 ucf
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AVR1309: Using the XMEGA SPI
Abstract: AVR1309 xmega MOSI MEANING spi operation xmega usb
Text: AVR1309: Using the XMEGA SPI Features • Introduction to SPI and the XMEGA SPI module • Setup and use of the XMEGA SPI module • Implementation of module drivers Polled master Interrupt controlled master Polled slave Interrupt controlled slave • Code examples for interrupt controlled and polled drivers
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AVR1309:
057A-AVR-02/08
AVR1309: Using the XMEGA SPI
AVR1309
xmega
MOSI MEANING
spi operation
xmega usb
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verilog code for 8 bit fifo register
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.21 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 18 Mbps* General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
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16-bit
verilog code for 8 bit fifo register
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Untitled
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.20 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 9 Mbps1 General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
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psoc full projects
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.30 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 18 Mbps* General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
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psoc full projects
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cypress flash 370
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.40 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 18 Mbps* General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
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cypress flash 370
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aardvark i2c
Abstract: 0x2228 BUFFER FIFO 0x2222 0x2227 aardvark spi verilog code for I2C MASTER slave
Text: PSoC Creator Component Data Sheet Serial Peripheral Interface SPI Slave 2.0 Features • 2 to 16-bit data width • 4 SPI modes • Data rates to 33 Mb/s General Description The SPI Slave provides an industry-standard 4-wire slave SPI interface and 3-wire (or
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16-bit
aardvark i2c
0x2228
BUFFER FIFO
0x2222
0x2227
aardvark spi
verilog code for I2C MASTER slave
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0x1113
Abstract: No abstract text available
Text: PSoC Creator Component Data Sheet Serial Peripheral Interface SPI Master 2.0 Features • 2- to 16-bit data width • 4 SPI operating modes • Data rates to 33 Mb/s General Description The SPI Master component provides an industry-standard 4-wire master SPI interface, as well
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0x1113
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