CY7C197BN
Abstract: CY7C197BN-12VC CY7C197BN-15VC CY7C197BN-25PC TAA 691
Text: CY7C197BN 256 Kb 256K x 1 Static RAM General Description [1] Features • • • • • Fast access time: 12 ns Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) CMOS for optimum speed and power TTL compatible inputs and outputs Available in 24-lead DIP and 24-lead SOJ
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CY7C197BN
24-lead
CY7C197BN
CY7C197BN-12VC
CY7C197BN-15VC
CY7C197BN-25PC
TAA 691
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1709 013
Abstract: CY7C197BN CY7C197BN-12VC CY7C197BN-15VC CY7C197BN-25PC
Text: CY7C197BN 256 Kb 256K x 1 Static RAM General Description [1] Features • • • • • Fast access time: 12 ns Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) CMOS for optimum speed and power TTL compatible inputs and outputs Available in 24-lead DIP and 24-lead SOJ
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CY7C197BN
24-lead
CY7C197BN
1709 013
CY7C197BN-12VC
CY7C197BN-15VC
CY7C197BN-25PC
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SOJ-24
Abstract: SOJ24-P-300-1 HE1324
Text: 24P0J Plastic 24pin 300mil SOJ EIAJ Package Code SOJ24-P-300-1.27 Weight g 0.68 JEDEC Code – Lead Material Alloy 42 e b2 e1 e1 E HE 13 24 I1 I2 c D Recommended Mount Pad 1 Symbol 12 L A A1 b1 e y b SEATING PLANE A A1 b b1 c D E e e1 HE L y b2 I1 I2 Dimension in Millimeters
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24P0J
24pin
300mil
SOJ24-P-300-1
SOJ-24
HE1324
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h 033
Abstract: P24LA-50A-2
Text: Mounting Pad 24 pin SOJ 300 mil 13 1 12 C 24 F D B U H T I G J E P Q K M N M NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition. ITEM MILLIMETERS INCHES B 16.13 +0.2 –0.35 0.635 +0.008
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P24LA-50A-2
SC-631-A*
h 033
P24LA-50A-2
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TSOP 173 g
Abstract: CY7C199C-20VXC CY7C199CL-15VC CY7C199C CY7C199C-15PXC 15VXI
Text: CY7C199C 256K 32K x 8 Static RAM Features General Description • Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns • Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) • CMOS for optimum speed/power • TTL–compatible Inputs and Outputs • Available in 28 DIP, 28 SOJ, and 28 TSOP I packages
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CY7C199C
CY7C199C
TSOP 173 g
CY7C199C-20VXC
CY7C199CL-15VC
CY7C199C-15PXC
15VXI
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CY7C199CNL-15VXI
Abstract: No abstract text available
Text: CY7C199CN 256K 32K x 8 Static RAM Features General Description • Fast access time: 12 ns, 15 ns, 20 ns and 25 ns • Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) • CMOS for optimum speed/power • TTL-compatible Inputs and Outputs • Available in 28 DIP, 28 SOJ, and 28 TSOP I packages
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CY7C199CN
CY7C199CN
CY7C199CNL-15VXI
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LGA 1156 PIN OUT diagram
Abstract: QSJ-44403 LGA 1150 Socket PIN diagram LGA 1155 Socket PIN diagram IC107-26035-20-G LGA 1151 PIN diagram REFLOW lga socket 1155 IC107-3204-G TB 2929 H alternative LGA 1155 pin diagram
Text: DIP8-P-300-2.54 5 Package material Lead frame material Pin treatment Package weight g Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5µm) 0.46 TYP. 2/Dec. 11, 1996 DIP14-P-300-2.54 5 Package material Lead frame material Pin treatment Package weight (g)
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DIP8-P-300-2
DIP14-P-300-2
DIP16-P-300-2
DIP18-P-300-2
MIL-M-38510
MIL-STD-883
LGA 1156 PIN OUT diagram
QSJ-44403
LGA 1150 Socket PIN diagram
LGA 1155 Socket PIN diagram
IC107-26035-20-G
LGA 1151 PIN diagram
REFLOW lga socket 1155
IC107-3204-G
TB 2929 H alternative
LGA 1155 pin diagram
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12VXA
Abstract: No abstract text available
Text: CY7C199CN 256K 32K x 8 Static RAM General Description[1] Features • • • • • • • • • Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) CMOS for optimum speed and power TTL-compatible inputs and outputs
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CY7C199CN
CY7C199CN
CY7C199CN,
12VXA
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85031
Abstract: CY7C199CN cy7c199cn-15pxc
Text: CY7C199CN 256K 32K x 8 Static RAM General Description [1] Features • • • • • • • • Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) CMOS for optimum speed and power TTL-compatible inputs and outputs
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CY7C199CN
28-pin
CY7C199CN
CY7C199CN,
85031
cy7c199cn-15pxc
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CY7C199CN
Abstract: TSOP 173 g
Text: CY7C199CN 256K 32K x 8 Static RAM General Description [1] Features • • • • • • • • Fast access time: 12 ns, 15 ns, 20 ns, and 25 ns Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) CMOS for optimum speed and power TTL-compatible inputs and outputs
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CY7C199CN
28-pin
CY7C199CN
CY7C199CN,
TSOP 173 g
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CY7C199C-15PXC
Abstract: CY7C199C-15VXC CY7C199C-15ZXC CY7C199C-20ZXI CY7C199C CY7C199C-12VXC
Text: CY7C199C 256K 32K x 8 Static RAM Features General Description • Fast access time: 12 ns The CY7C199C is a high-performance CMOS Asynchronous SRAM organized as 32K by 8 bits that supports an asynchronous memory interface. The device features an automatic power-down feature that significantly reduces
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CY7C199C
CY7C199C
28-pin
300-Mil)
CY7C199C-15PXC
CY7C199C-15VXC
CY7C199C-15ZXC
CY7C199C-20ZXI
CY7C199C-12VXC
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CY7C199C
Abstract: No abstract text available
Text: CY7C199C 256K 32K x 8 Static RAM Features General Description • Fast access time: 12 ns The CY7C199C is a high-performance CMOS Asynchronous SRAM organized as 32K by 8 bits that supports an asynchronous memory interface. The device features an automatic power-down feature that significantly reduces
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CY7C199C
CY7C199C
28-pin
300-Mil)
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TAA 691
Abstract: CY7C197B CY7C197D
Text: CY7C197D PRELIMINARY 256K 256K x 1 Static RAM Functional Description[1] Features • Pin- and function-compatible with CY7C197B The CY7C197D is a high-performance CMOS static RAM organized as 256K words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state
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CY7C197D
CY7C197B
CY7C197D
28-LCC
TAA 691
CY7C197B
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CY7C197B
Abstract: CY7C197D
Text: CY7C197D PRELIMINARY 256K 256K x 1 Static RAM Functional Description[1] Features • Pin- and function-compatible with CY7C197B The CY7C197D is a high-performance CMOS static RAM organized as 256K words by 1 bit. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state
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CY7C197D
CY7C197B
CY7C197D
28-LCC
CY7C197B
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NEC A39A
Abstract: NEC A39A 240 SOP28 330 mil land pattern NEC A39A 8 PIN mjh 106 120-PIN 282 185 01 smd TRANSISTOR code b6 ED-7500 transistor a39a SIP 400B
Text: IC PACKAGE MANUAL 1991, 1992, 1994, 1996 Document No. C10943XJ6V0IF00 Previous No. IEI-635, IEI-1213 Date Published January 1996 P Printed in Japan CHAPTER 1 PACKAGE OUTLINES AND EXPLANATION CHAPTER 2 CHAPTER 3 1 THROUGH HOLE PACKAGES 2 SURFACE MOUNT PACKAGES
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C10943XJ6V0IF00
IEI-635,
IEI-1213)
ED-7411
NEC A39A
NEC A39A 240
SOP28 330 mil land pattern
NEC A39A 8 PIN
mjh 106
120-PIN 282 185 01
smd TRANSISTOR code b6
ED-7500
transistor a39a
SIP 400B
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CY7C425
Abstract: CY7C419 CY7C421 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202
Text: CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • Asynchronous first-in first-out FIFO buffer memories • 256 x 9 (CY7C419) • 512 x 9 (CY7C421) • 1K x 9 (CY7C425) • 2K x 9 (CY7C429)
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CY7C419/21/25/29/33256/512/1K/2K/4K
CY7C419/21/25/29/33
256/512/1K/2K/4K
CY7C419)
CY7C421)
CY7C425)
CY7C429)
CY7C433)
300-mil
600-mil
CY7C425
CY7C419
CY7C421
CY7C429
CY7C433
IDT7200
IDT7201
IDT7202
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CY7C185D-15
Abstract: CY7C185D-10PXC CY7C185D-12 CY7C185 CY7C185D CY7C185D-10
Text: PRELIMINARY CY7C185D 64K 8K x 8 Static RAM Functional Description[1] Features • Pin- and function-compatible with CY7C185 The CY7C185D is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE1), an active
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CY7C185D
CY7C185
CY7C185D
CY7C185D-15
CY7C185D-10PXC
CY7C185D-12
CY7C185
CY7C185D-10
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MMA6
Abstract: MO088
Text: CY7C194BN 256 Kb 64K x 4 Static RAM General Description [1] Features • Fast access time: 15 ns and 25 ns • Wide voltage range: 5.0V ± 10% (4.5V to 5.5V) • CMOS for optimum speed/power • TTL-compatible inputs and outputs • CY7C194BN is available in 24 DIP, 24 SOJ packages.
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CY7C194BN
CY7C194BN
MMA6
MO088
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DATASHEET AM7202
Abstract: CY7C429-20JC 330 j65 CY7C433-30JI CY7C425 CY7C433-30JC CY7C429-15JI CY7C419 CY7C421 CY7C429
Text: CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • Asynchronous first-in first-out FIFO buffer memories • 256 x 9 (CY7C419) • 512 x 9 (CY7C421) • 1K x 9 (CY7C425) • 2K x 9 (CY7C429)
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CY7C419/21/25/29/33256/512/1K/2K/4K
CY7C419/21/25/29/33
256/512/1K/2K/4K
CY7C419)
CY7C421)
CY7C425)
CY7C429)
CY7C433)
300-mil
600-mil
DATASHEET AM7202
CY7C429-20JC
330 j65
CY7C433-30JI
CY7C425
CY7C433-30JC
CY7C429-15JI
CY7C419
CY7C421
CY7C429
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CY7C185
Abstract: CY7C185D CY7C185D-10 CY7C185D-10PXC CY7C185D-12 CY7C185D-15 28-pin SOJ SRAM
Text: PRELIMINARY CY7C185D 64K 8K x 8 Static RAM Functional Description[1] Features • Pin- and function-compatible with CY7C185 The CY7C185D is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE1), an active
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CY7C185D
CY7C185
CY7C185D
CY7C185
CY7C185D-10
CY7C185D-10PXC
CY7C185D-12
CY7C185D-15
28-pin SOJ SRAM
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TAA 691
Abstract: CY7C128A-20VXC C128A CY7C128A CY7C128A-15PC CY7C128A-15VC CY7C128A-15VXC CY7C128A-35VC CY7C128A-45PC
Text: CY7C128A 2K x 8 Static RAM Features Functional Description • Automatic power-down when deselected The CY7C128A is a high-performance CMOS static RAM organized as 2048 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable CE , and active
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CY7C128A
CY7C128A
TAA 691
CY7C128A-20VXC
C128A
CY7C128A-15PC
CY7C128A-15VC
CY7C128A-15VXC
CY7C128A-35VC
CY7C128A-45PC
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CY7C185-15VC
Abstract: CY7C185 CY7C185-15VI CY7C185-20PC CY7C185-20PXC CY7C185-20VC CY7C185-25PC CY7C185-25VC CY7C185-35PC 28-pin SOJ SRAM
Text: 1bCY7C185 CY7C185 8K x 8 Static RAM Functional Description[1] Features • High speed The CY7C185 is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable CE1 , an active HIGH chip enable (CE2), and active LOW output enable (OE)
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1bCY7C185
CY7C185
CY7C185
300-mil-wide
220mW
CY7C185-15VC
CY7C185-15VI
CY7C185-20PC
CY7C185-20PXC
CY7C185-20VC
CY7C185-25PC
CY7C185-25VC
CY7C185-35PC
28-pin SOJ SRAM
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CY7C185-20PXC
Abstract: BUT14 CY7C185-15VC CY7C185-25VC 1709 013 CY7C185 CY7C185-15VI CY7C185-20PC CY7C185-20VC CY7C185-25PC
Text: 1bCY7C185 CY7C185 8K x 8 Static RAM Functional Description[1] Features • High speed The CY7C185 is a high-performance CMOS static RAM organized as 8192 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable CE1 , an active HIGH chip enable (CE2), and active LOW output enable (OE)
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1bCY7C185
CY7C185
CY7C185
300-mil-wide
220mW
CY7C185-20PXC
BUT14
CY7C185-15VC
CY7C185-25VC
1709 013
CY7C185-15VI
CY7C185-20PC
CY7C185-20VC
CY7C185-25PC
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lead frame QFP
Abstract: SDIP30P-400
Text: O K I Semiconductor Packaging Packaging Unit, mm DtP40-P-600-2.54 5 1 .9 8 * 0 .3 Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5um or more 6.10 TYP. DIP42-P-600-2.54 UUUUUUAUAA&
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DtP40-P-600-2
DIP42-P-600-2
SDIP30-P-400-1
lead frame QFP
SDIP30P-400
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