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    SN74LV165ADBR Texas Instruments Parallel-Load 8-Bit Shift Registers 16-SSOP -40 to 125 Visit Texas Instruments Buy
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    Texas Instruments SN74LV165ADBR

    IC REGISTR PAR-LOAD 8BIT 16SSOP
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    SN74LV165ADBR Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN74LV165ADBR Texas Instruments SN74LV165 - Parallel-Load 8-Bit Shift Registers 16-SSOP -40 to 125 Original PDF
    SN74LV165ADBR Texas Instruments Parallel-Load 8 Bit Shift Register Original PDF
    SN74LV165ADBR Texas Instruments Parallel-Load 8-Bit Shift Registers 16-SSOP -40 to 85 Original PDF
    SN74LV165ADBR Texas Instruments PARALLEL-LOAD 8-BIT SHIFT REGISTERS Original PDF
    SN74LV165ADBRE4 Texas Instruments SN74LV165 - Parallel-Load 8-Bit Shift Registers 16-SSOP -40 to 125 Original PDF
    SN74LV165ADBRE4 Texas Instruments Parallel-Load 8-Bit Shift Registers Original PDF
    SN74LV165ADBRE4 Texas Instruments Parallel-Load 8-Bit Shift Registers 16-SSOP -40 to 85 Original PDF
    SN74LV165ADBRG4 Texas Instruments SN74LV165 - Parallel-Load 8-Bit Shift Registers 16-SSOP -40 to 125 Original PDF
    SN74LV165ADBRG4 Texas Instruments Parallel-Load 8-Bit Shift Registers 16-SSOP -40 to 85 Original PDF

    SN74LV165ADBR Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402C – APRIL 1998 – REVISED MAY 2000 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Latch-Up Performance Exceeds 250 mA Per


    Original
    PDF SN54LV165A, SN74LV165A SCLS402C LV165A CopyrighU001B, SDYU001N, SCET004, SCAU001A, SCEM132,

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402C – APRIL 1998 – REVISED MAY 2000 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Latch-Up Performance Exceeds 250 mA Per


    Original
    PDF SN54LV165A, SN74LV165A SCLS402C LV165A SZZU001B, SDYU001M, SCAU001A, SN74LV165A, ////roarer/root/data13/imaging/BIT.

    A115-A

    Abstract: C101 LV165A SN54LV165A SN74LV165A SN74LV165APWRG3
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402M − APRIL 1998 − REVISED DECEMBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A


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    PDF SN54LV165A, SN74LV165A SCLS402M 000-V A114-A) A115-A) SN54LV165A A115-A C101 LV165A SN54LV165A SN74LV165A SN74LV165APWRG3

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402C – APRIL 1998 – REVISED MAY 2000 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Latch-Up Performance Exceeds 250 mA Per


    Original
    PDF SN54LV165A, SN74LV165A SCLS402C LV165A SN74LV165AD SN74LV165ADBR SN74LV165ADGVR SN74LV165ADR SN74LV165APWR

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


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    PDF SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402L − APRIL 1998 − REVISED MAY 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A


    Original
    PDF SN54LV165A, SN74LV165A SCLS402L 000-V A114-A) A115-A) SN54LV165A

    lv165a

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A www.ti.com SCLS402N – APRIL 1998 – REVISED JULY 2013 PARALLEL-LOAD 8-BIT SHIFT REGISTERS Check for Samples: SN54LV165A, SN74LV165A FEATURES DESCRIPTION • • • The ’LV165A devices are parallel-load, 8-bit shift registers designed for 2-V to 5.5-V VCC operation.


    Original
    PDF SN54LV165A, SN74LV165A SCLS402N LV165A 000-V A114-A) A115-A)

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode


    Original
    PDF SN54LV165A, SN74LV165A SCLS402K 000-V A114-A) A115-A) SN54LV165A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode


    Original
    PDF SN54LV165A, SN74LV165A SCLS402K 000-V A114-A) A115-A) SN54LV165A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402M − APRIL 1998 − REVISED DECEMBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A


    Original
    PDF SN54LV165A, SN74LV165A SCLS402M 000-V A114-A) A115-A) SN54LV165A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode


    Original
    PDF SN54LV165A, SN74LV165A SCLS402K 000-V A114-A) A115-A) SN54LV165A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode Operation


    Original
    PDF SN54LV165A, SN74LV165A SCLS402K 000-V A114-A) A115-A) SN54LV165A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402M − APRIL 1998 − REVISED DECEMBER 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on JESD 17 D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A


    Original
    PDF SN54LV165A, SN74LV165A SCLS402M 000-V A114-A) A115-A) SN54LV165A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402H – APRIL 1998 – REVISED JANUARY 2003 SN54LV165A . . . J OR W PACKAGE SN74LV165A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 3 14 4 13 5 12 6 11 7 10 8 9 VCC CLK INH D C B A SER QH CLK


    Original
    PDF SN54LV165A, SN74LV165A SCLS402H 000-V A114-A) A115-A) SN54LV165A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A www.ti.com SCLS402N – APRIL 1998 – REVISED JULY 2013 PARALLEL-LOAD 8-BIT SHIFT REGISTERS Check for Samples: SN54LV165A, SN74LV165A FEATURES DESCRIPTION • • • The ’LV165A devices are parallel-load, 8-bit shift registers designed for 2-V to 5.5-V VCC operation.


    Original
    PDF SN54LV165A, SN74LV165A SCLS402N 000-V A114-A) A115-A) LV165A

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode


    Original
    PDF SN54LV165A, SN74LV165A SCLS402K 000-V A114-A) A115-A) SN54LV165A

    74lv165a

    Abstract: lv165a A115-A C101 SN54LV165A SN74LV165A SN74LV165ARGYR LV165
    Text: SN54LV165A, SN74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode


    Original
    PDF SN54LV165A, SN74LV165A SCLS402K SN54LV165A 74lv165a lv165a A115-A C101 SN54LV165A SN74LV165A SN74LV165ARGYR LV165

    A115-A

    Abstract: C101 SN54LV165A SN74LV165A SN74LV165ARGYR
    Text: SN54LV165A, SN74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode


    Original
    PDF SN54LV165A, SN74LV165A SCLS402K SN54LV165A A115-A C101 SN54LV165A SN74LV165A SN74LV165ARGYR

    A115-A

    Abstract: C101 SN54LV165A SN74LV165A SN74LV165ARGYR
    Text: SN54LV165A, SN74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode


    Original
    PDF SN54LV165A, SN74LV165A SCLS402K SN54LV165A A115-A C101 SN54LV165A SN74LV165A SN74LV165ARGYR

    lv165a

    Abstract: SN54LV165A SN74LV165A SN74LV165ARGYR A115-A C101
    Text: SN54LV165A, SN74LV165A PARALLELĆLOAD 8ĆBIT SHIFT REGISTERS SCLS402K − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Support Mixed-Mode Voltage Operation on D All Ports Ioff Supports Partial-Power-Down Mode


    Original
    PDF SN54LV165A, SN74LV165A SCLS402K SN54LV165A lv165a SN54LV165A SN74LV165A SN74LV165ARGYR A115-A C101

    CD4558

    Abstract: NC7S125 MC74F138N HCF4541 Motorola MC74HC251N 74ACT161 DHVQFN-20 74V1G08 SOT323/5 HCF4017 SN74ACT14DR
    Text: Logic Cross-Reference Introduction This Logic Cross-Reference for Buyers, Distribution Specialists and others with an interest in Logic will assist in finding a device made by Texas Instruments that is identical or similar to many of our competitors’ Logic products.


    Original
    PDF 74ABT16244 A010203 53001cov SCYB017 CD4558 NC7S125 MC74F138N HCF4541 Motorola MC74HC251N 74ACT161 DHVQFN-20 74V1G08 SOT323/5 HCF4017 SN74ACT14DR

    A115-A

    Abstract: C101 SN54LV165A SN74LV165A SN74LV165ARGYR
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402I – APRIL 1998 – REVISED JULY 2003 SN54LV165A . . . J OR W PACKAGE SN74LV165A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 3 14 4 13 5 12 6 11 7 10 8 9 VCC CLK INH D C B A SER QH CLK E


    Original
    PDF SN54LV165A, SN74LV165A SCLS402I SN54LV165A A115-A C101 SN54LV165A SN74LV165A SN74LV165ARGYR

    Untitled

    Abstract: No abstract text available
    Text: SN54LV165A, SN74LV165A www.ti.com SCLS402N – APRIL 1998 – REVISED JULY 2013 PARALLEL-LOAD 8-BIT SHIFT REGISTERS Check for Samples: SN54LV165A, SN74LV165A FEATURES DESCRIPTION • • • The ’LV165A devices are parallel-load, 8-bit shift registers designed for 2-V to 5.5-V VCC operation.


    Original
    PDF SN54LV165A, SN74LV165A SCLS402N LV165A 000-V A114-A) A115-A)

    A115-A

    Abstract: C101 LV165A SN54LV165A SN74LV165A
    Text: SN54LV165A, SN74LV165A PARALLEL-LOAD 8-BIT SHIFT REGISTERS SCLS402D – APRIL 1998 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Support Mixed-Mode Voltage Operation on All Ports Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22


    Original
    PDF SN54LV165A, SN74LV165A SCLS402D 000-V A114-A) A115-A) SN54LV165A A115-A C101 LV165A SN54LV165A SN74LV165A