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    SLAVE Search Results

    SLAVE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    7M145S90C Renesas Electronics Corporation 128K(16KX8)DUALPORT SLAVE Visit Renesas Electronics Corporation
    7M145S60C Renesas Electronics Corporation 128K(16KX8)DUALPORT SLAVE Visit Renesas Electronics Corporation
    7M145S70C Renesas Electronics Corporation 128K(16KX8)DUALPORT SLAVE Visit Renesas Electronics Corporation
    7M145S90CB Renesas Electronics Corporation 128K(16KX8)DUALPORT SLAVE Visit Renesas Electronics Corporation
    7M145S70CB Renesas Electronics Corporation 128K(16KX8)DUALPORT SLAVE Visit Renesas Electronics Corporation
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    SLAVE Price and Stock

    Dialight RFCCSLAVE

    LED DRIVER CC AC/DC 3-24V 350MA
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    PEPPERL+FUCHS GmbH AIR17-S-SLAVE

    PHOTOELECTRIC (DOORS, GATES, ELE
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    DigiKey AIR17-S-SLAVE Box 1
    • 1 $275.97
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    Texas Instruments MULTI-CAL-SLAVEKIT

    KIT BOARD MULTI-CAL-SLAVE SYST
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    DigiKey MULTI-CAL-SLAVEKIT Box 1
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    Mouser Electronics MULTI-CAL-SLAVEKIT
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    PEPPERL+FUCHS GmbH AIR17-S SLAVE

    Photoelectric (Doors, Gates, Elevators) |Pepperl+Fuchs AIR17-S SLAVE
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    Newark AIR17-S SLAVE Bulk 1
    • 1 $331.54
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    RS AIR17-S SLAVE Bulk 1
    • 1 $331.54
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    Pilz International PMC EXPANSION CARD PROFIBUS DP SLAVE (ALTERNATE: 8176280)

    Card can be used in PMCtendo DD5 & PMCprotego. | Pilz PMC EXPANSION CARD PROFIBUS DP SLAVE
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    RS PMC EXPANSION CARD PROFIBUS DP SLAVE (ALTERNATE: 8176280) Bulk 4 Weeks 1
    • 1 $1462.8
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    SLAVE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Cypress VMEbus Interface Handbook

    Abstract: Cypress Applications Handbook 64 pin CERAMIC QUAD FLATPACK 64-pin CERAMIC QUAD FLATPACK CY7C964-ASC G68 Package CY7C960 CY7C961 CY7C964 VIC068A
    Text: 64 CY7C964 Bus Interface Logic Circuit Features • Comparators, counters, latches, and drivers minimize logic requirements for a variety of multiplexed and non-multiplexed buses • Directly drives VMEbus address and data signals • 8-bit comparator for slave address decoding


    Original     		PDF CY7C964 64-pin 68-pin CY7C964 Cypress VMEbus Interface Handbook Cypress Applications Handbook 64 pin CERAMIC QUAD FLATPACK 64-pin CERAMIC QUAD FLATPACK CY7C964-ASC G68 Package CY7C960 CY7C961 VIC068A

    PXO 660

    Abstract: DRIVER COUNTER IC 7224 IEC60747-1 J2602 SM40 SM41 SM72 SM73 UJA1023 UJA1023T
    Text: UJA1023 LIN-I/O slave Rev. 04 — 5 July 2006 Product data sheet 1. General description The UJA1023 is a stand-alone Local Interconnect Network LIN I/O slave that replaces basic components commonly used in electronic control units for input and output handling.


    Original     		PDF UJA1023 UJA1023 J2602 PXO 660 DRIVER COUNTER IC 7224 IEC60747-1 SM40 SM41 SM72 SM73 UJA1023T

    delta plc program sample

    Abstract: WM8739 WM8739EFL WM8739LEDS WM8739LEFL XWM8739EDS
    Text: WM8739 / WM8739L Stereo Audio ADC DESCRIPTION FEATURES • • 90dB SNR ‘A’ weighted @ 48kHz ADC Low Power Stereo line-level audio inputs are provided, along with a mute and volume function, and master or slave mode clocking schemes. The device also has a programmable


    Original     		PDF WM8739 WM8739L 48kHz) WM8739) WM8739L) 24-bit 96KHz 96KHz delta plc program sample WM8739EFL WM8739LEDS WM8739LEFL XWM8739EDS

    PIC18F66J10-I/PT

    Abstract: ML-ND PIC18F66J15-I/PT PIC18F4620-I/P PDF DOWNLOAD PIC18LF4620 PIC18LF4620-I/P PIC18LF4620-I/PT PIC18LF6622 PIC18LF6722-I/PT PIC18LF8722
    Text: Flash Microcontrollers Cont. ds PIC18F Devices (Cont.) Memory Size Program RAM EEPROM Words Bytes Bytes 24K x 16 B 3328 1024 I/O Pins Timer/ Counters 8/16-bit UART I2C SPI™ CAN/ USB PWM A/D Analog Comp. 36 1/3 1 (EUSART) 1 (Master/ Slave) 1 ECAN 5 11-ch. 10-bit


    Original     		PDF PIC18F 8/16-bit 11-ch. 10-bit 44-QFN PIC18LF4585-I/ML-ND 40-DIP PIC18LF4585-I/P-ND 44-TQFP PIC18LF4585-I/PT-ND PIC18F66J10-I/PT ML-ND PIC18F66J15-I/PT PIC18F4620-I/P PDF DOWNLOAD PIC18LF4620 PIC18LF4620-I/P PIC18LF4620-I/PT PIC18LF6622 PIC18LF6722-I/PT PIC18LF8722

    DM54L73W

    Abstract: C1995 DM54L73 DM54L73J J14A W14B
    Text: DM54L73 Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent positive pulse triggered J-K flip-flops with complementary outputs The J and K data is processed by the flip-flops after a complete clock


    Original     		PDF DM54L73 DM54L73W C1995 DM54L73J J14A W14B

    Untitled

    Abstract: No abstract text available
    Text: S08 SG 8-bit Microcontrollers S08 SG Family of 8-bit Microcontrollers Enter S08 with room to grow Overview Freescale Semiconductor’s 8-bit SG family of microcontrollers MCUs is a mid to lowend offering designed for LIN slave, general market and space-constrained applications.


    Original     		PDF 16-bit DEMO9S08SG32) 20-Lead 28-Lead PAS08W1628T28) M68CYCLONEPROE) CWS-H08-STDED-CX, CWS-H08-PROED-CX, S08SG8BITMCFS com/S08SG.

    NJU3555

    Abstract: NJU3730 NJU3730D NJU3730M do02
    Text: NJU3730 PRELIMINARY 2 I C to PARALLEL CONVERTER ! PACKAGE OUTLINE ! GENERAL DESCRIPTION The NJU3730 is a serial-to-parallel converter IC, 2 which converts I C serial data into 3 bits parallel data. The NJU3730 incorporates selectable three kinds of 2 I C-slave-address, which are used to distinguish one of


    Original     		PDF NJU3730 NJU3730 NJU3730s. NJU3730R NJU3730D NJU3730M NJU3555 NJU3730D NJU3730M do02

    Untitled

    Abstract: No abstract text available
    Text: HD74LS390 Dual Decade Counters REJ03D0485-0400 Rev.4.00 May 10, 2006 This circuit contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters. The HD74LS390 incorporates dual divide-by-two and divide-by-five counters, which can be used to implement cycle


    Original     		PDF HD74LS390 REJ03D0485-0400 HD74LS390 divide-by-100. HD74LS390P DILP-16 PRDP001

    Untitled

    Abstract: No abstract text available
    Text: Ordering number : ENN7672A SANYO Semiconductors DATA SHEET LC72725M LC72725V LC72725NV CMOS IC RDS Demodulation IC Overview The LC72725 is an RDS Radio Data System signal demodulation IC. This IC integrates a bandpass filter, the demodulation circuit, and buffer RAM on a single chip and can read out RDS data in slave mode operation with the


    Original     		PDF ENN7672A LC72725M LC72725V LC72725NV LC72725 57kHz

    STLC2500

    Abstract: bluetooth transmitter receiver parallel chip mobile mobile hardware integration integrated synthesizer vco
    Text: Complete Bluetooth v1.2 feature support • Adaptive frequency hopping AFH : hopping kernel, channel assessment as master and slave Faster connections: interlaced scan for page and inquiry scan, answer FHS at first reception, RSSI used to limit range Extended SCO (eSCO) links


    Original     		PDF STLC2500 32-bit bluetooth transmitter receiver parallel chip mobile mobile hardware integration integrated synthesizer vco

    hcf4027be

    Abstract: HCF4013B HCF4027B HCF4027BEY HCF4027BM1 HCF4027M013TR
    Text: HCF4027B DUAL J-K MASTER SLAVE FLIP-FLOP • ■ ■ ■ ■ ■ ■ ■ ■ SET RESET CAPABILITY STATIC FLIP-FLOP OPERATION - RETAINS STATE INDEFINETELY WITH CLOCK LEVEL EITHER "HIGH" OR "LOW" MEDIUM-SPEED OPERATION - 16MHz Typ. clock toggle rate at 10V


    Original     		PDF HCF4027B 16MHz 100nA JESD13B HCF4027B hcf4027be HCF4013B HCF4027BEY HCF4027BM1 HCF4027M013TR

    tsp5220

    Abstract: tsp53c30 TSP50C41 tsp50c4x TSP50C30 TSP6100 53C30 wf7n TMS7000 development system TMS7000 data manual
    Text: 1.0 INTRODUCTION The TSP53C30 Is a programmed TSP50C41 that operates as a slave device to a mlcroprocessor. The TSP53C30 Includes a 10 pole Linear Predictive Filter the synthesizer an 8K ROM and an 8-blt microprocessor. The speech synthesizer operates on Linear Predictive Code (LPC) or Pulse Code Modulated (PCM)


    OCR Scan     		PDF TSP53C30 TSP50C41 TSP50C4X CVS2S-02 AB0RA927708 tsp5220 TSP50C30 TSP6100 53C30 wf7n TMS7000 development system TMS7000 data manual

    MH 7472

    Abstract: ic 7472 ttl 7472 ttl TTL 7472
    Text: SN5472, SN7472 AND-GATED J-K M ASTER-SLAVE FLIP-FLOPS WITH PRESET AND CLEAR DECEMBER 1963 - REVISED MARCH 1988 S N 5 4 7 2 . . J P AC KA G E S N 7 4 7 2 . . . N P AC K A G E Package Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages TO P VIE W


    OCR Scan     		PDF SN5472, SN7472 MH 7472 ic 7472 ttl 7472 ttl TTL 7472

    T 7411-1

    Abstract: No abstract text available
    Text: TYPES SN54111, SN74111 DUAL J-K MASTER-SLAVE FLIP-FLOPS WITH DATA LOCKOUT R E V IS E D DECEMBER 1983 S N 5 4 1 11 . . . J OR W PACKAGE • Package Options Include Plastic and Ceramic DIPs S N 7 4 1 11 . . . J OR N PACKAGE Dependable Texas Instruments Quality and


    OCR Scan     		PDF SN54111, SN74111 SN54111 T 7411-1

    SPW 12w

    Abstract: TMS380c16 RRU 32
    Text: TMS380C26 NETWORK COMMPROCESSOR SPW S010A -APRIL 1992- R E V IS E D MARCH 1993 I • IEEE 802.5 and IBM Token-Ring Network Compatible • Low-Cost Host-Slave I/O Interface Option • IEEE 802.3 and Blue Book Ethernet™ Network Compatible • Selectable Host System-Bus Options


    OCR Scan     		PDF TMS380C26 S010A TMS380C16 18K-Byte 16-Mbps TMS38054 10-Mbps 68xxx SPW 12w TMS380c16 RRU 32

    Untitled

    Abstract: No abstract text available
    Text: STP2021 S un M ic r o e l e c t r o n ic s J u ly 1997 PMC Power Management Controller DATA SHEET D e s c r ip t io n The STP2021 Power Management Controller brings power management to SBus-based systems. The STP2021 interfaces to the SBus via the byte-wide expansion bus EBus provided by the STP2001 Slave I/O Controller.


    OCR Scan     		PDF STP2021 STP2021 STP2001 84-Lead TP2021PLC 84-Pin

    ci 7492

    Abstract: 7492 counter TTL 7492 7492 binary counter 7492 74LSS2 ci+7492
    Text: 7492, LS92 Signetics Counters Divide-By-Twelve Counter Product Specification Logic Products DESCRIPTION The '92 is a 4-bit, ripple-type Divide-by12 Counter. The device consists of four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­


    OCR Scan     		PDF Divide-by12 1N916, 1N3064, 500ns 500ns ci 7492 7492 counter TTL 7492 7492 binary counter 7492 74LSS2 ci+7492

    74LS90 pin configuration

    Abstract: configuration 74ls90
    Text: SPEED/PACKAGE AVAILABILITY 54 F,W S4LS F,W BLOCK DIAGRAM 54LS/74LS PIN CONFIGURATION 74 A,F 74LS A,F DESCRIPTION This monolithic counter contains four mas­ ter-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the


    OCR Scan     		PDF 54LS/74LS 54/74LS90 74LS90 pin configuration configuration 74ls90

    "dj cd"

    Abstract: circuit mri oscillator
    Text: * SYNERGY C o p yC lo ck m Clockworks " S E M IC O N D U C T O R FEATURES D E S C R IP T IO N Less than 500ps of edge skew between any two outputs — FOREVER Master, plus up to 3 slaves, provide up to 32 TTLcom patible outputs per board Clock frequencies to 125MHz


    OCR Scan     		PDF 500ps 125MHz 28-pin SY69401 "dj cd" circuit mri oscillator

    Untitled

    Abstract: No abstract text available
    Text: * SY10EL35 SY100EL35 JK FLIP-FLOP SYNERGY S E M IC O N D U C T O R DESCRIPTION FEATURES • 525ps propagation delay The S Y 10 /1 00EL35 are high-speed JK Flip-Flops. The J/K data enters the m aster portion of the flip -flop when the clock is LO W and is tran sfe rre d to the slave and,


    OCR Scan     		PDF SY10EL35 SY100EL35 525ps 75KLi 00EL35 SOIC400 SY10EL352C SY10EL35ZCTR SY100EL35ZC SY100EL35ZCTR

    82077

    Abstract: floppy controller 44 pin
    Text: S un M icro electro nics July 1997 Slave I/O DATA SHEET Integrated SBus Interface Slave I/O Controller D e s c r ip t io n The Slave I/O Controller is a highly integrated, low-cost, low-power device designed for use in sin­ gle-processor systems with an SBus interface. The STP2001 provides serial I/O for keyboard, mouse and


    OCR Scan     		PDF STP2001Slave STP2001 STP2000 AM85C30, M0JRLI03 160-Pin STP2001QFP 82077 floppy controller 44 pin

    UltraSPARC ii

    Abstract: PI-275 UltraSPARC IIIi
    Text: S un M icroelectronics July 1997 FFB DATASHEET High Performance UPA Based 24-bit Frame Buffer D e s c r ip t io n The Fast Frame Buffer FFB is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output


    OCR Scan     		PDF 24-bit UltraSPARC ii PI-275 UltraSPARC IIIi

    Shared resource arbitration

    Abstract: No abstract text available
    Text: miMHS PRELIMINARY March 1994 L 67005 DATA SHEET 8 KX 8 CMOS DUAL PORT RAM 3.3 VOLT FEATURES VERSATILE PIN SELECT FOR MASTER OR SLAVE: - M/S= H FOR BUSY OUTPUT FLAG ON MASTER - M/S = L FOR BUSY INPUT FLAG ON SLAVE INT FLAG FOR PORT TO PORT COMMUNICATION FULL HARDWARE SUPPORT OF SEMAPHORE


    OCR Scan     		PDF 7005V 6700Sffiev hfl45b Shared resource arbitration

    74H78

    Abstract: 74LS78DC 74H54 TK27 74LS78 LS78 54H78DM 54LS78DM 74H78DC 74H78FC
    Text: 78 CONNECTIO N DIAGRAMS P IN O U T A L5 4 H /7 4 H 7 8 ^ 4 L S /7 4 L S 7 8 6 / ' “ / « DUAL JK FLIP-FLOP With Common Clear and Clock and Separate Set Inputs DESCRIPTION — The 'H78 is a dual JK master/slave flip-flop with separate Direct Set inputs, a common Direct Clear input and a common Clock Pulse


    OCR Scan     		PDF 4H/74H78Â 4LS/74LS78 54/74H 54/74LS CLS78) 74H78 74LS78DC 74H54 TK27 74LS78 LS78 54H78DM 54LS78DM 74H78DC 74H78FC