hifn 8450
Abstract: 1.5V RGMII HSBGA hifn encryption express sgmii sfp hsbga 324 IBM PCI Express serdes architecture AN0145 tcam hifn 4450
Text: 4450 Data Sheet Hifn Confidential DS-0131-06, October 29, 2008, Hi/fn , Inc. All rights reserved. 10/08 No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form by any means without the written permission of Hi/fn, Inc. “Hifn”
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DS-0131-06,
DS-0131-06
hifn 8450
1.5V RGMII
HSBGA
hifn encryption express
sgmii sfp
hsbga 324
IBM PCI Express serdes architecture
AN0145
tcam
hifn 4450
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RGMII to SGMII bridge
Abstract: SGMII RGMII bridge macsec SHA-256 Cryptographic Accelerator linksec hifn 4450 SHA-256 tcam
Text: ECC DDR2 SDRAM 32/39-bit HIPP lll 4450 Memory Bridge RNG DPU Fast Path Policy TCAM Public-Key Engine Ch 0 RGMll/ RTBl Ch 1 SGMll/ SerDes Buffer Buffer Packet Queue Manager Code RAM Data RAM Data RAM Bridge SGMll/ SerDes Code RAM Post Crypto Processor Crypto
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32/39-bit
4450HG-200
4450HG-200-K*
PB-4450-ver3.
RGMII to SGMII bridge
SGMII RGMII bridge
macsec
SHA-256 Cryptographic Accelerator
linksec
hifn 4450
SHA-256
tcam
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RGMII Layout Guide
Abstract: No abstract text available
Text: SentryFlow 9150 Data Sheet Hifn Confidential DS-0142-C, December 9, 2008, Hi/fn , Inc. All rights reserved. 12/08 No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language in any form by any means without the written permission of Hi/fn, Inc. “Hifn”
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DS-0142-C,
DS-0142-C
RGMII Layout Guide
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SGMII RGMII bridge
Abstract: RTL code for ethernet 802.3-2005 RGMII to SGMII Bridge UG368 1000BASE-X Ethernet-MAC using vhdl FPGA Virtex 6 Ethernet RGMII constraints sgmii sfp virtex
Text: Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC User Guide [optional] UG368 v1.0 June 24, 2009 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
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UG368
SGMII RGMII bridge
RTL code for ethernet
802.3-2005
RGMII to SGMII Bridge
UG368
1000BASE-X
Ethernet-MAC using vhdl
FPGA Virtex 6 Ethernet
RGMII constraints
sgmii sfp virtex
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vhdl code for ethernet mac spartan 3
Abstract: SGMII RGMII bridge sgmii 1000BASE-X UG074 MDIO write fpga frame buffer vhdl examples testbench of an ethernet transmitter in verilog tri mode ethernet TRANSMITTER GT11
Text: Virtex-4 FPGA Embedded Tri-Mode Ethernet MAC User Guide UG074 v2.2 February 22, 2010 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
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UG074
vhdl code for ethernet mac spartan 3
SGMII RGMII bridge
sgmii
1000BASE-X
UG074
MDIO write
fpga frame buffer vhdl examples
testbench of an ethernet transmitter in verilog
tri mode ethernet TRANSMITTER
GT11
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SGMII PCIE bridge
Abstract: RGMII to SGMII bridge SGMII RGMII bridge StrataXGS EVALUATION BOARD 88E1111 Marvell 88E1111 mdio 88E1111 jumbo GMII Marvell PHY 88E1111 Datasheet 88e1111 mii fpga ethernet sgmii
Text: f u l l y t e s t e d a n d i n t e r o p e r a b l e Lattice Ethernet Solutions Ready-to-Use Ethernet Portfolio Lattice provides customers with low cost and low power programmable solutions that are ready-to-use right out of the box. A full suite of tested and interoperable solutions is available for Ethernet
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10GbE,
1-800-LATTICE
LatticeMico32,
I0194B
SGMII PCIE bridge
RGMII to SGMII bridge
SGMII RGMII bridge
StrataXGS
EVALUATION BOARD 88E1111
Marvell 88E1111 mdio
88E1111 jumbo GMII
Marvell PHY 88E1111 Datasheet
88e1111 mii
fpga ethernet sgmii
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SGMII RGMII bridge
Abstract: sgmii fpga UG368 fpga rgmii verilog code for mdio protocol iodelay sgmii Ethernet sgmii testbench of an ethernet transmitter in verilog 1000BASE-X
Text: Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC User Guide [optional] UG368 v1.2 January 17, 2010 [optional] Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
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UG368
SGMII RGMII bridge
sgmii fpga
UG368
fpga rgmii
verilog code for mdio protocol
iodelay
sgmii Ethernet
sgmii
testbench of an ethernet transmitter in verilog
1000BASE-X
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88E6097
Abstract: 88E6020 88E1119 88E6071 Marvell 88E1512 88AP270M 88W8897 Marvell PHY 88E6352 88PG867 MV64460
Text: 2015 Marvell Product Selector Guide TOTAL SOLUTIONS FROM MARVELL Providing a b ro a d s p e c t r u m o f s o l u t i o n s a c ro ss a w i d e ra n g e o f m a r ke t s e g m e n t s . TABLE OF CONTENTS Application Processors .
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CH-1163
88E6097
88E6020
88E1119
88E6071
Marvell 88E1512
88AP270M
88W8897
Marvell PHY 88E6352
88PG867
MV64460
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Ethernet-MAC using vhdl
Abstract: sgmii SGMII RGMII bridge RTL code for ethernet UG074 DS307 ethernet phy sgmii Ethernet-MAC xilinx tri mode ethernet TRANSMITTER IOPAD RGMII to SGMII PHY
Text: Virtex-4 FPGA Embedded Tri-Mode Ethernet MAC User Guide UG074 v2.0 May 12, 2009 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the
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UG074
Ethernet-MAC using vhdl
sgmii
SGMII RGMII bridge
RTL code for ethernet
UG074
DS307
ethernet phy sgmii
Ethernet-MAC xilinx tri mode ethernet TRANSMITTER
IOPAD
RGMII to SGMII PHY
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RGMII to SGMII PHY
Abstract: p2020 SGMII USB bridge Rgmii RJ45 PINOUT SGMII RGMII bridge sgmii switch p2020 processor p1020 freescale RGMII to SGMII bridge P2020DS
Text: QorIQ Communications Platforms P2 Platform Series Dual core performance in a single core power envelope Ideal for networking infrastructure, telecom, delivers dual- and single-core frequencies Freescale provides highly integrated industrial control, medical imaging,
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RJ-45
RGMII to SGMII PHY
p2020
SGMII USB bridge
Rgmii RJ45 PINOUT
SGMII RGMII bridge
sgmii switch
p2020 processor
p1020 freescale
RGMII to SGMII bridge
P2020DS
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Marvell 88E1111 vhdl
Abstract: marvell 88e1145 88E1111 PHY registers map Triple-Speed Ethernet M DM7041 Marvell PHY 88E1111 finisar 5SGXM DP83865 88E1111 stratix iii MDIO clause 22 5SGXMA 88E1145 registers
Text: Triple-Speed Ethernet MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Date: 11.1 November 2011 Copyright 2011 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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88E6161
Abstract: 88E6097 88e6131 88SA8052 98DX4122 88E6122 88E6351 88E6031 88E6350R 88ap270m
Text: April 2010 I Marvell Product Selector Guide Total Solutions from Marvell Providing a broad spectrum of solutions across a wide range of market segments TABLE OF CONTENTS APPLICATION PROCESSORS COMMUNICATION PROCESSORS EMBEDDED PROCESSORS April 2010 l www.marvell.com
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CH-1163
88E6161
88E6097
88e6131
88SA8052
98DX4122
88E6122
88E6351
88E6031
88E6350R
88ap270m
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Marvell 88E1512
Abstract: 88E6352 88E6176 Marvell 88E1510 88E6172 88E6071 88E6020 88E6161 88E6097 88w8782
Text: 2012 Marvell Product Selector Guide TOTAL SOLUTIONS FROM MARVELL Providing a b ro a d s p e c t r u m o f s o l u t i o n s a c ro ss a w i d e ra n g e o f m a r ke t s e g m e n t s . TABLE OF CONTENTS Application Processors .
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Untitled
Abstract: No abstract text available
Text: Single-Port Triple-Speed Ethernet and On-Board PHY Chip Reference Design AN-647-1.2 Application Note This application note describes Single-Port Triple-Speed Ethernet and On-Board PHY Chip reference designs that demonstrate Ethernet operations of the Altera
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AN-647-1
88E1111
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VSC8664
Abstract: VSC8240 VSC8658 VSC3441 vsc7501 VSC8479 VSC8228 VSC7390 vsc8479-01 vsc7967
Text: Solutions Guide 2009 Vitesse means speed Innovation. Technical excellence. What it all comes down to is speed. Breaking records for the best performance, fastest data rates, highest integration, and lowest power, Vitesse is the only IC provider that has the proven technical expertise
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vhdl code for ethernet mac spartan 3
Abstract: TEMAC bench 2800 LocalLink sgmii fpga datasheets 1000BASE-X 1000X XAPP691 RGMII constraints verilog code for MII phy interface
Text: Virtex-4 FPGA Embedded Tri-Mode Ethernet MAC Wrapper v4.7 Getting Started Guide UG240 April 24, 2009 R R Xilinx is providing this product documentation, hereinafter “Information,” to you “AS IS” with no warranty of any kind, express or implied. Xilinx makes no representation that the Information, or any particular implementation thereof, is free from any claims of infringement. You
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UG240
1000BASE-X
vhdl code for ethernet mac spartan 3
TEMAC
bench 2800
LocalLink
sgmii fpga datasheets
1000BASE-X
1000X
XAPP691
RGMII constraints
verilog code for MII phy interface
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IEEE Standard 803.2
Abstract: DM7041 Marvell PHY 88E1111 Datasheet finisar 88E1145 Marvell PHY 88E1111 MDIO read write sfp marvell 88e1145 Marvell 88E1111 vhdl 88E1111 "mdio registers" Marvell 88E1111 ethernet mac vhdl code 88E1145 registers
Text: Triple Speed Ethernet MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Date: 9.1 November 2009 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other
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SGMII USB bridge
Abstract: No abstract text available
Text: P2020PSE2KZA Information General information Package information Environmental and Compliance information Manufacturing and Qualification information Ordering information Operating Characteristics General Information Parameter Part Number Description Product Line
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P2020PSE2KZA
GGT8526E
31SQ1
HT-PBGA-B689
SGMII USB bridge
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Marvell PHY 88E1111 Datasheet
Abstract: 88E1111 PHY registers map 88E1145 DM7041 marvell 88e1145 88E1111 register map 88E1111 Marvell 88E1111 vhdl 88E1145 registers marvell ethernet switch sgmii
Text: Triple-Speed Ethernet MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Date: 10.0 August 2010 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words
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RGMII to SGMII bridge
Abstract: SGMII RGMII bridge macsec single RGMII to SGMII PHY SHA-256 RFC4106 serdes ip Inter-Chip sha256 hifn 4450
Text: Applied Processor Lock Down IP Storage Without Compromising Performance HIPP III Storage Security Processor 4450 The HIPP III 4450 Storage Security Processor ensures data security and integrity with a standards compliant 2-port Gigabit Ethernet solution and Gigabit Ethernet Switches providing a turnkey
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4450HG-200/2-K*
4450HG-200/2
PB-4450-ver5.
RGMII to SGMII bridge
SGMII RGMII bridge
macsec
single RGMII to SGMII PHY
SHA-256
RFC4106
serdes ip
Inter-Chip
sha256
hifn 4450
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Untitled
Abstract: No abstract text available
Text: Applied Processor FlowThrough Security for Gigabit Ethernet HIPP III Security Processor 8450 The HIPP III 8450 Security Processor ensures data security and integrity with a standards compliant 2-port Gigabit Ethernet solution PHYs, including most leading Network Processors,
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8450HG-200/2-200
8450HG-200/2-200-K*
PB-8450-ver3.
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9155HG
Abstract: ECDH-256 ECDSA-256 RGMII to SGMII Bridge SGMII RGMII bridge AES-XCBC-MAC-96 9150IG-K TCAM 2009 ecdsa MACsec
Text: Dual Port GigE Drop-In Security Processor Hifn Technology 915x Cost Effective, Low Power Solution Enables Easy Integration and Fast Time to Market Hardware Accelerated Suite B Support and Advanced Containment Delivers Maximum Security The 915x offers high performance, hardware accelerated Suite B support, and
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32-bit
9150HG
9150HG-K
9150IG
9150IG-K
9155HG
9155HG-K
FLY1009
9155HG
ECDH-256
ECDSA-256
RGMII to SGMII Bridge
SGMII RGMII bridge
AES-XCBC-MAC-96
9150IG-K
TCAM 2009
ecdsa
MACsec
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RGMII constraints
Abstract: SGMII RGMII bridge fpga rgmii ipad data sheet rgmii specification 1000BASE-X Xilinx SPARTAN 3e
Text: LogiCORE IP 1-Gigabit Ethernet MAC v8.5 User Guide UG144 April 24, 2009 R R Xilinx is providing this product documentation, hereinafter “Information,” to you “AS IS” with no warranty of any kind, express or implied. Xilinx makes no representation that the Information, or any particular implementation thereof, is free from any claims of infringement. You
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UG144
RGMII constraints
SGMII RGMII bridge
fpga rgmii
ipad data sheet
rgmii specification
1000BASE-X
Xilinx SPARTAN 3e
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p1020
Abstract: No abstract text available
Text: Freescale Semiconductor Product Brief Document Number: P1020PB Rev. 0, 11/2008 This document contains preview information on a new product that may be in a design phase or under development. Freescale reserves the right to change or discontinue this product without notice.
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P1020PB
P1020
P1020
e500v2
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