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    74F114

    Abstract: N74F114D N74F114N
    Text: Philips Semiconductors Product specification Dual J-K negative edge-triggered flip-flop with common clock and reset DESCRIPTION 74F114 PIN CONFIGURATION The 74F114, Dual Negative edge-triggered JK-Type Flip-Flop with common clock and reset inputs, features individual J, K, Clock CP ,


    Original     		PDF 74F114 74F114, SF00110 100MHz 500ns SF00006 74F114 N74F114D N74F114N