Untitled
Abstract: No abstract text available
Text: 4Gb: x8, x16 Automotive DDR3L-RS SDRAM Description Automotive DDR3L-RS SDRAM MT41K512M8 – 64 Meg x 8 x 8 banks MT41K256M16 – 32 Meg x 16 x 8 banks Description Features The 1.35V DDR3L-RS SDRAM device is a low-current self refresh version of the 1.35V DDR3L SDRAM device
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MT41K512M8
MT41K256M16
09005aef85bd2a38
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bc4 bl4 bl8 otf
Abstract: srt 8n TI ddr3 controller "DDR3 SDRAM" TI ddr3 controller datasheet T145
Text: DDR3 SDRAM Device Operation DDR3 SDRAM DDR3 SDRAM Specification Device Operation & Timing Diagram February 2009 revision 0.63 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE
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XAPP253
Abstract: CLK180 FF1152 MT46V4M32 XC2V3000 trace code micron label
Text: Application Note: Virtex-II Series R XAPP253 v2.0 July 16, 2002 Synthesizable 400 Mb/s DDR SDRAM Controller Author: Lakshmi Gopalakrishnan Summary This application note describes how to use a Virtex -II device to interface to a Double Data Rate (DDR) SDRAM device. The reference design targets a DDR SDRAM device at a clock
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XAPP253
32-bit
com/pub/applications/xapp/xapp253
XAPP253
CLK180
FF1152
MT46V4M32
XC2V3000
trace code micron label
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MT41K256M8DA
Abstract: No abstract text available
Text: 2Gb: x8, x16 Automotive DDR3L SDRAM Description 1.35V Automotive DDR3L SDRAM MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks Description • • • • • • • The 1.35V DDR3L SDRAM device is a low-voltage version of the 1.5V DDR3 SDRAM device. Refer to the
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MT41K256M8
MT41K128M16
AEC-Q100
09005aef85741711
MT41K256M8DA
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DDR3L-1600
Abstract: 78-Ball DDR3L-1066 TIS87 MT41K512M4
Text: 2Gb: x4, x8, x16 DDR3L SDRAM Description 1.35V DDR3L SDRAM MT41K512M4 – 64 Meg x 4 x 8 banks MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks Description • • • • The 1.35V DDR3L SDRAM device is a low-voltage version of the 1.5V DDR3 SDRAM device. Unless stated
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MT41K512M4
MT41K256M8
MT41K128M16
78-ball
78-ball
09005aef83ed2952
DDR3L-1600
DDR3L-1066
TIS87
MT41K512M4
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DDR3L-1866
Abstract: MT41K512M4
Text: 2Gb: x4, x8, x16 DDR3L SDRAM Description 1.35V DDR3L SDRAM MT41K512M4 – 64 Meg x 4 x 8 banks MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks Description • • • • The 1.35V DDR3L SDRAM device is a low-voltage version of the 1.5V DDR3 SDRAM device. Unless stated
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MT41K512M4
MT41K256M8
MT41K128M16
78-ball
78-ball
09005aef83ed2952
DDR3L-1866
MT41K512M4
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Untitled
Abstract: No abstract text available
Text: 2Gb: x4, x8, x16 DDR3L SDRAM Description DDR3L SDRAM MT41K512M4 – 64 Meg x 4 x 8 banks MT41K256M8 – 32 Meg x 8 x 8 banks MT41K16M16 – 16 Meg x 16 x 8 banks • • • • Description The 1.35V DDR3L SDRAM device is a low-voltage version of the 1.5V DDR3 SDRAM device. Refer to the
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MT41K512M4
MT41K256M8
MT41K16M16
78-ball
78-ball
96-ball
09005aef83ed2952
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Untitled
Abstract: No abstract text available
Text: 2Gb: x4, x8, x16 DDR3L SDRAM Description DDR3L SDRAM MT41K512M4 – 64 Meg x 4 x 8 banks MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks • • • • Description The 1.35V DDR3L SDRAM device is a low-voltage version of the 1.5V DDR3 SDRAM device. Refer to the
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MT41K512M4
MT41K256M8
MT41K128M16
78-ball
78-ball
96-ball
14mmy,
09005aef83ed2952
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Nanya NT5DS64M8BG-5T
Abstract: NT5DS64M8BG-5T DDR400 PC3200 CL126
Text: NT512D72S89B0FV 512MB: 64M x 72 Low Profile Registered DDR SDRAM DIMM Preliminary 184pin Low Profile Registered DDR SDRAM DIMM Based on 64Mx8 DDR SDRAM B Die device Features • 184 Dual In-Line Registered Memory Module RDIMM • Registered DDR DIMM based on 110nm 512Mb Die B device,
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NT512D72S89B0FV
512MB:
184pin
64Mx8
110nm
512Mb
64Mx8
NT5DS64M8BG-5T)
Nanya NT5DS64M8BG-5T
NT5DS64M8BG-5T
DDR400
PC3200
CL126
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MT47H16M16FG
Abstract: XAPP768 XAPP768c XAPP454 MT47H16M16FG-37E interface ddr2 sdram with spartan3 MT47H16M16FG-37E IT DDR2 SDRAM XAPP549 sdram controller
Text: Application Note: Spartan-3 FPGAs R XAPP454 v1.1.1 June 11, 2007 DDR2 SDRAM Memory Interface for Spartan-3 FPGAs Author: Karthikeyan Palanisamy Summary This application note describes a DDR2 SDRAM memory interface implementation in a Spartan -3 device, interfacing with a Micron DDR2 SDRAM device. This document provides a
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XAPP454
MT47H16M16FG-37E,
256Mb
MT47H16M16FG
XAPP768
XAPP768c
XAPP454
MT47H16M16FG-37E
interface ddr2 sdram with spartan3
MT47H16M16FG-37E IT
DDR2 SDRAM
XAPP549
sdram controller
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A22 SMD MARKING CODE
Abstract: MT41K256M8DA
Text: Preliminary‡ 2Gb: x4, x8, x16 Automotive DDR3L SDRAM Description 1.35V Automotive DDR3L SDRAM MT41K512M4 – 64 Meg x 4 x 8 banks MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks Description • • • • • • • The 1.35V DDR3L SDRAM device is a low-voltage version of the 1.5V DDR3 SDRAM device. Unless stated
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MT41K512M4
MT41K256M8
MT41K128M16
09005aef85419fbc
A22 SMD MARKING CODE
MT41K256M8DA
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DDR400
Abstract: PC3200 NT5DS128M4CG-5T NT1GD72S4PC0FV-5T
Text: NT1GD72S4PC0FV/NT2GD72S4NCOFV 1GB: 128M x 72 / 2GB: 256M x 72 Low Profile Registered DDR SDRAM DIMM 184pin Low Profile Registered DDR SDRAM DIMM Based on 128Mx4 DDR SDRAM C Die device Features • 184 Dual In-Line Registered Memory Module RDIMM • Registered DDR DIMM based on 90nm 512Mb Die C device
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NT1GD72S4PC0FV/NT2GD72S4NCOFV
184pin
128Mx4
512Mb
128Mx4
NT5DS128M4CG-5T)
DDR400
PC3200
NT5DS128M4CG-5T
NT1GD72S4PC0FV-5T
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Untitled
Abstract: No abstract text available
Text: NT1GD72S4PC0FV/NT2GD72S4NCOFV 1GB: 128M x 72 / 2GB: 256M x 72 Low Profile Registered DDR SDRAM DIMM 184pin Low Profile Registered DDR SDRAM DIMM Based on 128Mx4 DDR SDRAM C Die device Features • 184 Dual In-Line Registered Memory Module RDIMM • Registered DDR DIMM based on 90nm 512Mb Die C device
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NT1GD72S4PC0FV/NT2GD72S4NCOFV
184pin
128Mx4
512Mb
128Mx4
NT5DS128M4CG-5T)
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_INITSCT
Abstract: MT48LC4M16A2 H8S/2377 E10A-USB
Text: APPLICATION NOTE H8S Family SDRAM Control Introduction This sample task connects the SDRAM to the H8S microcomputer by using the SDRAM control function of the bus controller. Target Device H8S/2377R Contents 1. Overview . 2
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H8S/2377R
REJ06B0500-0200/Rev
_INITSCT
MT48LC4M16A2
H8S/2377
E10A-USB
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Untitled
Abstract: No abstract text available
Text: V370PDC PCI SDRAM Controller • • • • • • High Performance PCI Target Interface with Integrated SDRAM Controller Device Highlights Overview • Fully compliant with PCI 2.2 specification target interface The V370PDC PCI SDRAM Controller simplifies
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V370PDC
32-bit
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mt48lc2m32b2
Abstract: MSC8101 MSC8101ADS MT48LC2M32B2TG SC140
Text: Freescale Semiconductor, Inc. Application Note AN2329/D Rev. 0, 9/2002 Freescale Semiconductor, Inc. Interfacing the MSC8101 to SDRAM on the MSC8101ADS by Marwan Younis Al-saiegh CONTENTS 1 SDRAM Machine Basics 1 2 MT48LC2M32B2TG SDRAM Device. 4
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AN2329/D
MSC8101
MSC8101ADS
MT48LC2M32B2TG
mt48lc2m32b2
MSC8101ADS
MT48LC2M32B2TG
SC140
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5460 bsz
Abstract: 0C00 SH7206 A13A2
Text: APPLICATION NOTE SH7206 Group Example of BSC SDRAM Interface Setting 32-Bit Bus Introduction This document describes the synchronous DRAM (SDRAM) interface of the bus state controller (BSC) and provides a practical example of SDRAM connection. Target Device
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SH7206
32-Bit
SH7206
REJ05B0657-0100
5460 bsz
0C00
A13A2
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Untitled
Abstract: No abstract text available
Text: NT1GD72S4PC0FV/NT2GD72S4NCOFV 1GB: 128M x 72 / 2GB: 256M x 72 Low Profile Registered DDR SDRAM DIMM Preliminary 184pin Low Profile Registered DDR SDRAM DIMM Based on 128Mx4 DDR SDRAM C Die device Features • 184 Dual In-Line Registered Memory Module RDIMM
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NT1GD72S4PC0FV/NT2GD72S4NCOFV
184pin
128Mx4
512Mb
128Mx4
NT5DS128M4CG-5T)
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hynix ddr3
Abstract: bc4 bl4 bl8 otf ddr3 2133 diode T9 AC-DC DDR3-1333 DDR3-1866 DDR3-2133 a12b DD3-800
Text: APCPCWM_4828539:WP_0000002WP_000000 APCPCWM_4828539:WP_0000002WP_0000002 DDR3+ Device Operation DDR3+ SDRAM Device Operation 1 *3e46a6cd-6391* B20337/178.104.2.234/2010-08-27 12:03 APCPCWM_4828539:WP_0000002WP_000000 APCPCWM_4828539:WP_0000002WP_0000002 DDR3+ Device Operation
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0000002WP
3e46a6cd-6391*
B20337/178
hynix ddr3
bc4 bl4 bl8 otf
ddr3 2133
diode T9 AC-DC
DDR3-1333
DDR3-1866
DDR3-2133
a12b
DD3-800
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Untitled
Abstract: No abstract text available
Text: 2Gb: x8, x16 DDR3Lm SDRAM Description 1.35V DDR3Lm SDRAM MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks Description Features DDR3Lm SDRAM 1.35V is a low current self refresh version, via a TCSR feature, of the DDR3L SDRAM (1.35V) device. Unless stated otherwise, the DDR3Lm
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MT41K256M8
MT41K128M16
09005aef847d068f
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verilog advantages disadvantages
Abstract: sdram controller MT48LC16M8A2 verilog disadvantages sdram verilog
Text: ADI Parallel Port SDRAM Controller Reference Design Application Note 334 June 2005, Version 1.3 Introduction The ADI parallel port SDRAM controller reference design connects SDRAM to the parallel port of an Analog Devices Incorporated ADI ADSP-2126x Sharc DSP device and is implemented in Altera FPGAs and
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ADSP-2126x
ADSP-2126x
verilog advantages disadvantages
sdram controller
MT48LC16M8A2
verilog disadvantages
sdram verilog
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Memory Interfaces
Abstract: EQFP 144 PACKAGE EP3CLS70 EP3C10 EP3C120 EP3C16 EP3C25 EP3C40 EP3C55 EP3CLS100
Text: 8. External Memory Interfaces in the Cyclone III Device Family CIII51009-2.3 In addition to an abundant supply of on-chip memory, Cyclone III device family Cyclone III and Cyclone III LS devices can easily interface to a broad range of external memory, including DDR2 SDRAM, DDR SDRAM, and QDRII SRAM.
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CIII51009-2
Memory Interfaces
EQFP 144 PACKAGE
EP3CLS70
EP3C10
EP3C120
EP3C16
EP3C25
EP3C40
EP3C55
EP3CLS100
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SG572284578E83R
Abstract: SM572284578E83R
Text: SU572284578E83R January 2, 2007 Ordering Information Module Part Number Description SM572284578E83R 128Mx72 1GB , SDRAM, 168-pin DIMM, Registered, ECC, 128Mx4 Based (Stacked two 64Mx4), PC133, CL = 4.0 (Device = 3.0), 43.18mm. SG572284578E83R 128Mx72 (1GB), SDRAM, 168-pin DIMM, Registered, ECC, 128Mx4 Based (Stacked two 64Mx4), PC133, CL = 4.0 (Device = 3.0), 43.18mm, Green Module (RoHS Compliant).
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SU572284578E83R
SM572284578E83R
SG572284578E83R
128Mx72
168-pin
128Mx4
64Mx4)
PC133,
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Untitled
Abstract: No abstract text available
Text: HYMD132G725A4-K/H/L 32Mx72 DDR SDRAM Registered DIMM SERIAL PRESENCE DETECT Byte# Function Description 21 DDR SDRAM module attributes 22 23 24 25 26 27 28 29 30 31 32 33 34 35 DDR SDRAM device attributes : General DDR SDRAM cycle time at CL=2.0 tCK DDR SDRAM access time from clock at CL=2.0(tAC)
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HYMD132G725A4-K/H/L
10/AP
32Mx72
HYMD132G7258-H/L
256MB
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