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    REGENERATOR 28 Search Results

    REGENERATOR 28 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    ISL54105ACRZ Renesas Electronics Corporation TMDS Regenerator Visit Renesas Electronics Corporation
    ISL54102ACQZ Renesas Electronics Corporation TMDS Regenerators with Multiplexers Visit Renesas Electronics Corporation
    ISL54101ACQZ Renesas Electronics Corporation TMDS Regenerators with Multiplexers Visit Renesas Electronics Corporation
    ISL54100ACQZ Renesas Electronics Corporation TMDS Regenerators with Multiplexers Visit Renesas Electronics Corporation
    ISL54100CQZ Renesas Electronics Corporation TMDS Regenerators with Multiplexers, MQFP, /Tray Visit Renesas Electronics Corporation

    REGENERATOR 28 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    pj 69 SMD diode

    Abstract: RX-2B RX2C RX2b bs3-1000 Monitor VD58 smd diode pj 72 c8051f320-gq VD58 ISL54100
    Text: ISL54100AHDMI-EVALZ, ISL54105ACRZ-EVALZ Operation Manual for Intersil’s 4:1 and 1:1 TMDS HDMI Regenerator Evaluation Kits Application Note April 1, 2009 AN1453.2 Thank you for requesting Intersil’s high-performance TMDS signal multiplexor/regenerator/retimer evaluation kit. This


    Original     		PDF ISL54100AHDMI-EVALZ, ISL54105ACRZ-EVALZ AN1453 ISL5410xA pj 69 SMD diode RX-2B RX2C RX2b bs3-1000 Monitor VD58 smd diode pj 72 c8051f320-gq VD58 ISL54100

    ICS1522

    Abstract: video clock generator
    Text: Integrated Circuit Systems, Inc. ICS1522 DATA SHEET User-Programmable VideoVideo Clock Clock Generator/ LineUser-Programmable Generator/ Line-LockedICS1522 Locked Clock Regenerator Clock Regenerator General Description Features The ICS1522 is a very high performance monolithic phaselocked loop PLL frequency synthesizer. Utilizing ICS’s


    Original     		PDF ICS1522 Line-LockedICS1522 199707558G video clock generator

    M28945

    Abstract: 28945-APP-001-A regenerator CX28975 g9941 MPC8260 SHDSL configuration APP-001-A mindspeed command
    Text: 28945-APP-001-A August 7, 2003 M28945 ZipWirePlus Single Span Regenerator Application Note Introduction This application note describes the implementation of a single span regenerator using Mindspeed’s Enhanced EVM. Repeater Overview In order to achieve data transmission over greater distances than are achievable over a single


    Original     		PDF 28945-APP-001-A M28945 CX28975 M28945 28945-APP-001-A regenerator g9941 MPC8260 SHDSL configuration APP-001-A mindspeed command

    GR-2918-CORE

    Abstract: OTS-4000 10Gbps Regenerator GR-831-CORE regenerator optical OTS-4400 OTS-4540 40Gbps regenerator 3R Oclaro
    Text: Data Sheet OTS-4400 DPSK Regenerator Features: The OTS-4400 DPSK regenerator enables cost-effective 3R OEO regeneration capability of OC-768/STM-256/OTU3 or quad 10 Gbps client interfaces for metro, regional, and longhaul networks. It can be deployed in retrofit applications into


    Original     		PDF OTS-4400 OTS-4011 OTS-4040 OTS-4400 OC-768/STM-256/OTU3 GR-2918-CORE OTS-4000 10Gbps Regenerator GR-831-CORE regenerator optical OTS-4540 40Gbps regenerator 3R Oclaro

    ISL54106

    Abstract: dell monitor circuit diagram ISL54106A dell display ic DVI TMDS PCB design guidelines TXC48 .000
    Text: ISL54106 Key Features Data Sheet June 6, 2008 FN6724.0 TMDS Regenerator Features The ISL54106 is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery CDR function for each of the 3 TMDS pairs in an HDMI or DVI signal. The TMDS data outputs of


    Original     		PDF ISL54106 FN6724 ISL54106 JESD-MO220. dell monitor circuit diagram ISL54106A dell display ic DVI TMDS PCB design guidelines TXC48 .000

    ISL54106A

    Abstract: dell monitor circuit diagram ISL54106ACRZ dell 2000fp ISL54106 2000FP TXC48 VD58 TXC48 000 TXC48 .000
    Text: ISL54106A Key Features Data Sheet June 4, 2008 FN6717.0 TMDS Regenerator Features The ISL54106A is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery CDR function for each of the 3 TMDS pairs in an HDMI or DVI signal. The TMDS data outputs of


    Original     		PDF ISL54106A FN6717 ISL54106A JESD-MO220. dell monitor circuit diagram ISL54106ACRZ dell 2000fp ISL54106 2000FP TXC48 VD58 TXC48 000 TXC48 .000

    dell 2000fp

    Abstract: tmds receiver dell monitor circuit diagram DVI dual link receiver 2000FP capture HDMI video IC monitor Dell 2000fp projector dell ISL54105A ISL54105ACRZ
    Text: ISL54105A Key Features Data Sheet June 4, 2008 FN6716.0 TMDS Regenerator Features The ISL54105A is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery CDR function for each of the 3 TMDS pairs in an HDMI or DVI signal. The TMDS data outputs of


    Original     		PDF ISL54105A FN6716 ISL54105A JESD-MO220. dell 2000fp tmds receiver dell monitor circuit diagram DVI dual link receiver 2000FP capture HDMI video IC monitor Dell 2000fp projector dell ISL54105ACRZ

    dell monitor circuit diagram

    Abstract: dell 2000fp DELL power supply diagram TMDS PCB design guidelines DVI dual link receiver monitor Dell 2000fp tmds receiver Chroma ISL54105 ISL54105CRZ
    Text: ISL54105 Key Features Data Sheet June 11, 2008 FN6723.0 TMDS Regenerator Features The ISL54105 is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery CDR function for each of the 3 TMDS pairs in an HDMI or DVI signal. The TMDS data outputs of


    Original     		PDF ISL54105 FN6723 ISL54105 JESD-MO220. dell monitor circuit diagram dell 2000fp DELL power supply diagram TMDS PCB design guidelines DVI dual link receiver monitor Dell 2000fp tmds receiver Chroma ISL54105CRZ

    Untitled

    Abstract: No abstract text available
    Text: ISL54105A Key Features Data Sheet June 4, 2008 FN6716.0 TMDS Regenerator Features The ISL54105A is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery CDR function for each of the 3 TMDS pairs in an HDMI or DVI signal. The TMDS data outputs of


    Original     		PDF ISL54105A FN6716 ISL54105A JESD-MO220.

    dell monitor circuit diagram

    Abstract: DVI TMDS PCB design guidelines dell 2000fp monitor Dell 2000fp ISL54105 ISL54105A ISL54105CRZ TB379 DVI RECEIVER PCB design guidelines
    Text: ISL54105 Key Features S DESIGN W E N R O NDED F COMME E ISL54105A E R T O N Data Sheet SEE T H June 11, 2008 FN6723.0 TMDS Regenerator Features The ISL54105 is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery CDR function for each of the 3 TMDS


    Original     		PDF ISL54105 FN6723 ISL54105 JESD-MO220. dell monitor circuit diagram DVI TMDS PCB design guidelines dell 2000fp monitor Dell 2000fp ISL54105A ISL54105CRZ TB379 DVI RECEIVER PCB design guidelines

    optical regenerator

    Abstract: DMS-3100DC003 WS200ER3R 10129126 DMS3100 waveshifter jdsu power supply lb 1260 GR-253 optical regenerator, consumption
    Text: COMMUNICATIONS MODULES & SUBSYSTEMS WaveReady 3000 Series Unidirectional, Protocol and Data Rate Independent Optical Regenerator WaveShifter 200 ER 3R Key Features • Provides high transmit power with low power consumption and high receiver sensitivity –30 dBm


    Original     		PDF WSH-2003024SA DMS-3100DC003 WS200ER3R optical regenerator DMS-3100DC003 10129126 DMS3100 waveshifter jdsu power supply lb 1260 GR-253 optical regenerator, consumption

    ABBA

    Abstract: LXT6051QE 9922H AU-AIS LXT6051 VC12 SLXT6051 LXT6251 W117
    Text: Datasheet JUNE 1999 Revision 2.0 LXT6051 STM-1/0 SDH Overhead Terminator General Description Features The LXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0


    Original     		PDF LXT6051 LXT6051 51Mb/s) 155Mb/s) LXT6251 ABBA LXT6051QE 9922H AU-AIS VC12 SLXT6051 LXT6251 W117

    9718h

    Abstract: 11973H VC12 LEVEL ONE COMMUNICATIONS SXT6051 SXT framer HT 648 Decoder Rx 9802h
    Text: DATA SHEET MAY 1998 Revision 1.1 SXT6051 STM-1/0 SDH Overhead Terminator General Description Features The SXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0


    Original     		PDF SXT6051 SXT6051 51Mb/s) 155mB/s) SXT6251 9718h 11973H VC12 LEVEL ONE COMMUNICATIONS SXT framer HT 648 Decoder Rx 9802h

    HDB3

    Abstract: oscillator 16.384MHZ 16.384MHZ Alarm Clock by using ttl Digital Alarm Clock by ttl Digital Alarm Clock by using ttl HDB3 to nrz nrz to hdb3 DP40 DS3109
    Text: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MV1445 PRELIMINARY INFORMATION DS3109 2.2 MV1445 COMBINED PCM HDB3 DECODER, DIGITAL CLOCK REGENERATOR AND TIMESLOT ZERO RECEIVER The MV1445 combines the HDB3 Decoder, Digital Clock


    Original     		PDF MV1445 DS3109 MV1445 048Mbit HDB3 oscillator 16.384MHZ 16.384MHZ Alarm Clock by using ttl Digital Alarm Clock by ttl Digital Alarm Clock by using ttl HDB3 to nrz nrz to hdb3 DP40

    MAX3664

    Abstract: MAX3676 MAX3676EHJ
    Text: 19-1537; Rev 2; 12/01 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier _Features ♦ Single +3.3V or +5.0V Power Supply ♦ Exceeds ITU/Bellcore SDH/SONET Regenerator Specifications ♦ Low Power: 237mW at +3.3V


    Original     		PDF 622Mbps, 237mW MAX3676EHJ MAX3676E/D MAX3676 MAX3664 MAX3676 MAX3676EHJ

    DS3109

    Abstract: No abstract text available
    Text: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MV1445 PRELIMINARY INFORMATION DS3109 2.2 MV1445 COMBINED PCM HDB3 DECODER, DIGITAL CLOCK REGENERATOR AND TIMESLOT ZERO RECEIVER The MV1445 combines the HDB3 Decoder, Digital Clock


    Original     		PDF MV1445 DS3109 MV1445 048Mbit

    all ic data

    Abstract: decibel meter regenerator in optical MAX3676 MAX3676EHJ MAX3664
    Text: 19-1537; Rev 1; 4/00 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier _Features ♦ Single +3.3V or +5.0V Power Supply ♦ Exceeds ITU/Bellcore SDH/SONET Regenerator Specifications ♦ Low Power: 237mW at +3.3V


    Original     		PDF 622Mbps, 237mW MAX3676EHJ MAX3676E/D MAX3676 all ic data decibel meter regenerator in optical MAX3676 MAX3676EHJ MAX3664

    all ic data

    Abstract: ANA 608 regenerator in optical MAX3664 MAX3676 MAX3676EHJ Fiber Optic regenerator 28
    Text: 19-1537; Rev 0; 7/99 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier _Features ♦ Single +3.3V or +5.0V Power Supply ♦ Exceeds ITU/Bellcore SDH/SONET Regenerator Specifications ♦ Low Power: 237mW at +3.3V


    Original     		PDF 622Mbps, 237mW MAX3676EHJ MAX3676E/D MAX3676 all ic data ANA 608 regenerator in optical MAX3664 MAX3676 MAX3676EHJ Fiber Optic regenerator 28

    804K

    Abstract: MAX3664 MAX3676 MAX3676EHJ
    Text: 19-1537; Rev 2; 12/01 622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier _Features ♦ Single +3.3V or +5.0V Power Supply ♦ Exceeds ITU/Bellcore SDH/SONET Regenerator Specifications ♦ Low Power: 237mW at +3.3V


    Original     		PDF 622Mbps, 237mW MAX3676EHJ MAX3676E/D MAX3676 804K MAX3664 MAX3676 MAX3676EHJ

    1605dxb

    Abstract: No abstract text available
    Text: Data Sheet February 1999 microelectronics group Lucent Technologies Bell Labs Innovations LG1605DXB Limiting Amplifier Features • Digital video transmission ■ 28 dB gain, 34 dB differential ■ Interface between 1319 receiver and LG 1600 clock and data regenerator


    OCR Scan     		PDF LG1605DXB DS98-400HSPL DS96-236FCE) 1605dxb

    Untitled

    Abstract: No abstract text available
    Text: Product Overvic FEBRUARY 1998 Revision 7.0 SXT6051 STM-1/0 SDH Overhead Terminator General Description Features The SXT6051 Overhead Terminator implements the Regenerator Section Termination, Multiplexer Section Termination and Higher Order Path Termination in STM-0


    OCR Scan     		PDF SXT6051 SXT6051 51Mb/s) 155Mb/s) SXT6251 S4bT23b

    M51397AP

    Abstract: M51395AP sw2de ci pal 012 a asahi glass delay line Taiyo 30P4 be4s M51395
    Text: MITSUBISHI ICs TV M51397AP SECAM CHROMA SYSTEM DESCRIPTION PIN CONFIGURATION IEW) The M51397AP is a semiconductor integrated circuit for SECAM system color television receivers. It CONTAINS chroma processor, chroma demodulator, DC regenerator BLANKING/FF DRIVE [ T


    OCR Scan     		PDF M51397AP M51397AP M51395AP M51395AP) M51395AP b24Tfl2b sw2de ci pal 012 a asahi glass delay line Taiyo 30P4 be4s M51395

    Kill CMOS

    Abstract: SAA7345
    Text: Philips Semiconductors Preliminary specification CMOS digital decoding 1C with RAM for Compact Disc SAA7345 FEATURES GENERAL DESCRIPTION • Integrated data slicer and clock regenerator The SAA7345 incorporates the CD signal processing functions of decoding and digital filtering. The device is


    OCR Scan     		PDF SAA7345 Kill CMOS

    asahi glass delay line

    Abstract: M51397AP M51395 SG314 AV20-22 ST T4 3560 M51395AP transformer 400Hz 115v 30P4 115v 400Hz circuit diagram
    Text: MITSUBISHI ICs TV M51397AP SECAM CHROMA SYSTEM DESCRIPTION PIN CONFIGURATION IEW) The M51397AP is a semiconductor integrated circuit for SECAM system color television receivers. It CONTAINS chroma processor, chroma demodulator, DC regenerator and system switches for PAL/SECAM dual system.


    OCR Scan     		PDF M51397AP M51397AP M51395AP 433619MHz. M51395AP) asahi glass delay line M51395 SG314 AV20-22 ST T4 3560 M51395AP transformer 400Hz 115v 30P4 115v 400Hz circuit diagram