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    Text: TG04200 if QQQD117 V 9 6 2 P B C SÔQ Rev. B1 LOCAL BUS TO PCI BRIDGE FOR i960 Cx/Hx PROCESSORS » Ic0* v • Glueless interface between i960Cx/Hx processors and the PCI bus • 2 channel DMA controller • Bi-directional mailboxes w/doorbell interrupts • Large, 576-byte FIFOs using V3’s unique


    OCR Scan     		PDF TG04200 QQQD117 i960Cx/Hx 576-byte 33MHz 160-pin V960PBC, V961PBC, V962PBC, V292PBC