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    74LVC1G57

    Abstract: 74LVC1G57GF 74LVC1G57GM 74LVC1G57GV 74LVC1G57GW
    Text: 74LVC1G57 Low-power configurable multiple function gate Rev. 4 — 15 October 2010 Product data sheet 1. General description The 74LVC1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,


    Original     		PDF 74LVC1G57 74LVC1G57 74LVC1G57GF 74LVC1G57GM 74LVC1G57GV 74LVC1G57GW

    74HC7014-Q100

    Abstract: No abstract text available
    Text: 74HC7014-Q100 Hex non-inverting precision Schmitt-trigger Rev. 1 — 26 May 2014 Product data sheet 1. General description The 74HC7014-Q100 is a hex buffer with precision Schmitt-trigger inputs. The precisely defined trigger levels are lying in a window between 0.55  VCC and 0.65  VCC. It makes


    Original     		PDF 74HC7014-Q100 74HC7014-Q100 74HC7014

    74AUP1G17

    Abstract: 74AUP1G17GF 74AUP1G17GM 74AUP1G17GW MO-203
    Text: 74AUP1G17 Low-power Schmitt trigger Rev. 4 — 15 July 2010 Product data sheet 1. General description The 74AUP1G17 provides the single Schmitt-trigger buffer. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original     		PDF 74AUP1G17 74AUP1G17 74AUP1G17GF 74AUP1G17GM 74AUP1G17GW MO-203

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G57 Low-power configurable multiple function gate Rev. 5 — 22 September 2011 Product data sheet 1. General description The 74LVC1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,


    Original     		PDF 74LVC1G57 74LVC1G57

    74HCT541 SO20

    Abstract: 74HC7541 74hct7541d 74hc7541db SOT360-1 TSSOP20 74HC7541D
    Text: 74HC7541; 74HCT7541 Octal Schmitt trigger buffer/line driver; 3-state Rev. 3 — 25 July 2011 Product data sheet 1. General description The 74HC7541; 74HCT7541 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74HC7541; 74HCT7541 74HCT7541 HCT7541 74HCT541 SO20 74HC7541 74hct7541d 74hc7541db SOT360-1 TSSOP20 74HC7541D

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G17 Low-power Schmitt trigger Rev. 7 — 16 July 2012 Product data sheet 1. General description The 74AUP1G17 provides the single Schmitt trigger buffer. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original     		PDF 74AUP1G17 74AUP1G17

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G17 Single Schmitt trigger buffer Rev. 10 — 29 June 2012 Product data sheet 1. General description The 74LVC1G17 provides a buffer function with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined outputs.


    Original     		PDF 74LVC1G17 74LVC1G17

    transforms

    Abstract: 74HCT541 SO20 74HC7541
    Text: 74HC7541; 74HCT7541 Octal Schmitt trigger buffer/line driver; 3-state Rev. 5 — 31 December 2012 Product data sheet 1. General description The 74HC7541; 74HCT7541 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard


    Original     		PDF 74HC7541; 74HCT7541 74HCT7541 HCT7541 transforms 74HCT541 SO20 74HC7541

    74LVC1G97GW

    Abstract: 74LVC1G97
    Text: 74LVC1G97 Low-power configurable multiple function gate Rev. 1 — 21 December 2010 Product data sheet 1. General description The 74LVC1G97 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,


    Original     		PDF 74LVC1G97 74LVC1G97 74LVC1G97GW

    74LVC3G17

    Abstract: 74LVC3G17DC 74LVC3G17DP 74LVC3G17GM 74LVC3G17GT JESD22-A114E MO-187
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 05 — 13 March 2008 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17 74LVC3G17DC 74LVC3G17DP 74LVC3G17GM 74LVC3G17GT JESD22-A114E MO-187

    74LVC2G17

    Abstract: 74LVC2G17GF 74LVC2G17GM 74LVC2G17GV 74LVC2G17GW
    Text: 74LVC2G17 Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 04 — 9 October 2006 Product data sheet 1. General description The 74LVC2G17 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC2G17 74LVC2G17 74LVC2G17GF 74LVC2G17GM 74LVC2G17GV 74LVC2G17GW

    74LVC1G17

    Abstract: No abstract text available
    Text: 74LVC1G17 Single Schmitt trigger buffer Rev. 10 — 29 June 2012 Product data sheet 1. General description The 74LVC1G17 provides a buffer function with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined outputs.


    Original     		PDF 74LVC1G17 74LVC1G17

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 7 — 22 June 2012 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,


    Original     		PDF 74LVC1G99 74LVC1G99

    Untitled

    Abstract: No abstract text available
    Text: 74AUP1G17 Low-power Schmitt trigger Rev. 5 — 24 November 2011 Product data sheet 1. General description The 74AUP1G17 provides the single Schmitt-trigger buffer. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.


    Original     		PDF 74AUP1G17 74AUP1G17

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G17 Single Schmitt trigger buffer Rev. 8 — 20 September 2011 Product data sheet 1. General description The 74LVC1G17 provides a buffer function with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined outputs.


    Original     		PDF 74LVC1G17 74LVC1G17

    Untitled

    Abstract: No abstract text available
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 8 — 21 September 2011 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17

    TTL Schmitt-Trigger

    Abstract: No abstract text available
    Text: 74LVC1G98 Low-power configurable multiple function gate Rev. 2 — 1 December 2011 Product data sheet 1. General description The 74LVC1G98 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND,


    Original     		PDF 74LVC1G98 74LVC1G98 TTL Schmitt-Trigger

    001A

    Abstract: No abstract text available
    Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 8 — 5 April 2013 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,


    Original     		PDF 74LVC1G99 74LVC1G99 001A

    Untitled

    Abstract: No abstract text available
    Text: 74LVC2G17 Dual non-inverting Schmitt trigger with 5 V tolerant input Rev. 7 — 1 December 2011 Product data sheet 1. General description The 74LVC2G17 provides two non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output


    Original     		PDF 74LVC2G17 74LVC2G17

    74LVC1G99

    Abstract: 74LVC1G99DP 74LVC1G99GM 74LVC1G99GT
    Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 03 — 3 December 2009 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,


    Original     		PDF 74LVC1G99 74LVC1G99 74LVC1G99DP 74LVC1G99GM 74LVC1G99GT

    Untitled

    Abstract: No abstract text available
    Text: 74LVC1G17-Q100 Single Schmitt trigger buffer Rev. 1 — 9 July 2012 Product data sheet 1. General description The 74LVC1G17-Q100 provides a buffer function with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined outputs.


    Original     		PDF 74LVC1G17-Q100 74LVC1G17-Q100 74LVC1G17

    001aab588

    Abstract: No abstract text available
    Text: 74LVC1G57 Low-power configurable multiple function gate Rev. 02 — 11 September 2006 Product data sheet 1. General description The 74LVC1G57 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74LVC1G57 74LVC1G57 001aab588

    diode marking code YF

    Abstract: 74LVC1G99 74LVC1G99DP 74LVC1G99GM 74LVC1G99GT
    Text: 74LVC1G99 Ultra-configurable multiple function gate; 3-state Rev. 5 — 21 October 2010 Product data sheet 1. General description The 74LVC1G99 provides a low voltage, ultra-configurable, multiple function gate with 3-state output. The device can be configured as one of several logic functions including,


    Original     		PDF 74LVC1G99 74LVC1G99 diode marking code YF 74LVC1G99DP 74LVC1G99GM 74LVC1G99GT

    001aah861

    Abstract: No abstract text available
    Text: 74LVC3G17 Triple non-inverting Schmitt trigger with 5 V tolerant input Rev. 11 — 9 April 2013 Product data sheet 1. General description The 74LVC3G17 provides three non-inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free


    Original     		PDF 74LVC3G17 74LVC3G17 001aah861