ispGDS Families
Abstract: scan load lattice isplsi architecture
Text: Using Proprietary Lattice ISP Devices TM Figure 1. ispLSI 1032E 100-Pin TQFP Pinout Diagram This document describes how to program Lattice’s InSystem Programmable ISP devices that utilize the proprietary Lattice ISP state machine for programming, rather than the IEEE 1149.1 Test Access Port (TAP)
|
Original
|
1032E
100-Pin
2000E,
2000VE,
2000VL
ispGAL22V10B
ispGDS Families
scan load lattice
isplsi architecture
|
PDF
|
22V10C
Abstract: 1032E ispcode GAL programmer schematic Lattice PLSI date code format
Text: Using Lattice ISP Devices Figure 1. Lattice ISP Design Flow Introduction This document describes how to program Lattice’s InSystem Programmable ISP devices. First, the ISP device design flow is summarized, followed by a description of ISP device hardware interface basics. In the
|
Original
|
|
PDF
|
smd n51
Abstract: ocxo 13MHz DIL14 DS27 LM17 ocxo 26mhz 26mhz ocxo 3107 JT28 smd n93
Text: OVEN CONTROLLED CRYSTAL OSCILLATORS QEO SV DIL & SMD series TIME &FREQUENCY DIL & SMD SERIES QEO SV Features The DIL & SMD OCXO series provides both small size and high performance. High stability Low ageing Low package size The frequency stability of the DIL14 OCXO is as
|
Original
|
DIL14
192MHz
10MHz
13MHz
384MHz
54LQ17
44MHz
20MHz
smd n51
ocxo 13MHz
DS27
LM17
ocxo 26mhz
26mhz ocxo
3107
JT28
smd n93
|
PDF
|
MC14007B
Abstract: cd4007 application motorola CD4007 CD4007 cd4007 motorola HTL LOGIC
Text: g M O T O R O LA S e m ic o n d u c t o r s B O X 2 0 9 1 2 • P H O E N IX . A R IZ O N A MC14007B 8S036 D U A L CO M PLEM EN TA RY PAIR PLUS IN V E R T E R McMOS S S I T h e M C 1 4 0 0 7 B m u lti-p u rp o s e device consists o f th re e N -chan nel
|
OCR Scan
|
MC14007B
MC14007B
cd4007 application
motorola CD4007
CD4007
cd4007 motorola
HTL LOGIC
|
PDF
|
AN-532A
Abstract: AN532A MC1648 MC4324/4024 MC1648 equivalent MC74416
Text: INTR O D U C TIO N 1 PHASE-DETECTORS 2 OSCILLATORS - M U L TIV IB R A TO R S 3 M IXERS COUNTERS 5 APPLICATIONS 6 PACKAGING PHASE-LOCKED LOOP DATA BOOK Second Edition August, 1973 MECL, MECL III, MECL 10,000, MTTL, and McMOS are trademarks of Motorola Inc.
|
OCR Scan
|
|
PDF
|
MC14069B
Abstract: CD4069B power inverter schematic diagram
Text: g M OTO RO LA MC14069B S e m ic o n d u c to r s B O X 2 0 9 1 2 • P H O E N I X , A R I Z O N A 8 5 0 3 6 H E X IN V E R T E R McMOS SSI T h e M C 1 4 0 6 9 B h e x in v e r te r is c o n s tru c te d w it h M O S P -c h an n e l and N -c h a n n e l e n h a n c e m e n t
|
OCR Scan
|
MC14069B
MC14069B
CD4069B
CD4069B
power inverter schematic diagram
|
PDF
|
MC14507
Abstract: 646 "direct replacement" CASE-646 EXCLUSIVE-OR MC14070B "Direct Replacement" Direct Replacement MOTOROLA selni or gate mc14xxx
Text: g M O T O R O LA MC14507 S e m ic o n d u c to r s B O X 20912 • P H O E N IX , A R IZ O N A 85036 McMOS S S I Q U A D E X C L U S IV E " O R " G ATE (L O W PO W E R C O M P L E M E N T A R Y M O S ) The M C 14507 quad exclusive OR gate is constructed w ith MOS
|
OCR Scan
|
MC14507
MC14507
MC14XXX
MC14070B
646 "direct replacement"
CASE-646
EXCLUSIVE-OR
"Direct Replacement"
Direct Replacement MOTOROLA
selni
or gate
|
PDF
|
MC14010
Abstract: MC14010CL MC14000 MC14009 MC14009AL MC14009CL MC14009CP MC14010AL MC14010CP 14009
Text: MC14009AL MC14009CL MC14009CP MC14010AL MC14010CL MC14010CP \ BUFFERS HEX BUFFERS McMOS The MC14009 hex inve rte r/b u ffer and MC14010 noninverting hex b u ffe r are constructed w ith MOS P-channel and N-channel en hancement mode devices in a single m o no lith ic structure. These
|
OCR Scan
|
MC14009AL
MC14009CL
MC14009CP
MC14010AL
MC14010CL
MC14010CP
MC14009
MC14010
50nW/package
MC14000
MC14010CP
14009
|
PDF
|
MC14069B
Abstract: No abstract text available
Text: MOTOROLA MC14069B S e m ic o n d u c to rs B O X 2 0 9 1 2 . P H O E N IX , A R IZ O N A 8 5 0 3 6 HEX INVERTER McMOS SSI T h e M C 1 4 0 6 9 B hex in v e rte r is c o n s tru c te d w ith M O S P-channel L O W -P O W E R C O M P L E M E N T A R Y M O S
|
OCR Scan
|
MC14069B
MC14069B
|
PDF
|
MC14011
Abstract: MC14001 CD4011 PIN DIAGRAM MC14011B MC14011B data only CD4011 CD4011 Application HTL LOGIC MC14011B quad 2 input gate CD4011A
Text: g M O T O R O LA Semiconductors BOX 2 09 12 • P H O E N IX , A R IZ O N A 85036 Q U A D 2 -IN P U T " N A N D " G ATE MC14011 MC14011B McMOS SSI T h e M C 1 4 0 1 1 a nd M C 1 4 0 1 1 B are c o n s tru c te d w ith P a nd N channel (L O W P O W E R C O M P L E M E N T A R Y M O S I
|
OCR Scan
|
MC14011
MC14011B
MC14011B
CD4011A
CD4011
MC14001
CD4011 PIN DIAGRAM
MC14011B data only
CD4011 Application
HTL LOGIC
MC14011B quad 2 input gate
|
PDF
|
Untitled
Abstract: No abstract text available
Text: P ro d u ct P r e v ie w MC14452P McMOS lsi D IG IT A L L Y T R IM M E D FREQ UENC Y D IV ID E R • C o u n t Range = 2 ^ 3 — 2 ^ n , w h e re n = 0 to 127 • O u tp u t D rive C u rre n t = 15 m A @ V q q = 6 V d c • F o r 0 .5 Hz O u tp u t: LOW-POWER COMPLEMENTARY MOS
|
OCR Scan
|
MC14452P
|
PDF
|
MHz frequency counter
Abstract: CI4511 MC75108 cmos ci4511 mci4017 COUNTER LED bcd CI4518 BCD counter MC14518 ci4021
Text: AN-717 Application Note BATTERY-POWERED 5-MHz FREQUENCY COUNTER P repared B y Don Aldridge A pplications Engineering ( This application note describes a ba t tery-powered 5-MHz frequency counter using the McMOS logic fa m ily fo r lowpower operation. The basic counter is
|
OCR Scan
|
AN-717
AN717/D
MHz frequency counter
CI4511
MC75108
cmos ci4511
mci4017
COUNTER LED bcd
CI4518
BCD counter
MC14518
ci4021
|
PDF
|
MC14512
Abstract: Diode LT 023
Text: MOTOROLA MC14512 S e m ic o n d u c t o r s <8 > BOX 2 0 9 1 2 . PH O E N IX , A RIZO N A 8 5 0 3 6 McMOS MSI 8-CHANNEL DATA SELECTOR {LO W -PO W ER C O M P L E M E N T A R Y M O S T h e M C 1 4 5 1 2 is an 8-channel data selector'con structed w ith M O S P-channel and N-channel enhancem ent m ode devices in a single
|
OCR Scan
|
MC14512
MC14512
Diode LT 023
|
PDF
|
MC14008
Abstract: MC14009 MC1040 f60N MC14009AL MC14009CL MC14009CP MC14010 MC14010AL MC14010CL
Text: MC14009AL MC14009CL MC14009CP MC14010AL MC14010CL MC14010CP \ BUFFERS H EX B U FFER S McMOS T he M C 1 4 0 0 9 hex inverter/buffer and M C 1 4 0 1 0 noninverting hex buffer are constructed w ith M OS P-channel and N-channel en hancem ent mode devices in a single m onolithic structure. These
|
OCR Scan
|
MC14009AL
MC14009CL
MC14009CP
MC14010AL
MC14010CL
MC14010CP
MC14009
MC14010
MC14009,
MC14008
MC1040
f60N
|
PDF
|
|
|
Two digit bcd adder circuit
Abstract: ic 4560 BCD adder McMOS Handbook
Text: AN-738 Application Note NBCD SIGN AND MAGNITUDE ADDER/SUBTRACTER Prepared b y Joe Roy Industrial Logic Applications Engineering This note describes a parallel sign and magnitude adder/subtracter for natural binary coded decimal N BC D numbers. The design is implemented with CMOS
|
OCR Scan
|
AN-738
MC14560
MC14561
AN738/D
Two digit bcd adder circuit
ic 4560 BCD adder
McMOS Handbook
|
PDF
|
Untitled
Abstract: No abstract text available
Text: CMOS Gate Arrays Monolithic ICs Selection Guide Selection map based on number of gates BU16300 BU16500 BU12300L BU12300 BU12400 Series Standard, 3V operation Standard, 5V operation Multi I/O. 3V operation Multi I/O, 5V operation Large current drive, 40mA Technology
|
OCR Scan
|
BU16300
BU16500
BU12300L
BU12300
BU12400
15ulti
|
PDF
|
ic 7490 pin diagram
Abstract: mh 7490 TTL 7490 MHz frequency counter MECL System Design Handbook ic 7490 truth table mc1004p MC4051 MC8601 motorola Motorola AN-581
Text: AN-581 Application Note AN MSI 500 MHz FREQUENCY COUNTER USING MECL AND MTTL Prepared By Jon M . DeLaune Application Engineering The design of a MSI 8-digit LED read out 5 0 0 M H z counter using M E C L III , M E C L 10,000 and T T L is discussed. De
|
OCR Scan
|
AN-581
LED-10A
CL4317
ic 7490 pin diagram
mh 7490
TTL 7490
MHz frequency counter
MECL System Design Handbook
ic 7490 truth table
mc1004p
MC4051
MC8601 motorola
Motorola AN-581
|
PDF
|
powec rm 1110
Abstract: rm 1100 powec MPC1000 transistors JX 6822 A inverter welder 4 schematic SAA 14Z transistor SI 6822 stg 8810 PL 15Z DIODE germanium transistor
Text: TH€ SEMICONDUCTOR DATA LIBRARY SERIES A VOLUME HI prepared by Technical Inform ation Center The in fo rm a tio n in this book has been ca re fu lly checked and is believed to be reliable; however, no re sp o n sib ility is assumed fo r inaccuracies. F u rthe rm o re, this in fo rm a tio n does no t convey to the purchaser o f sem iconductor
|
OCR Scan
|
111ii
MZ5558
Z5555,
Z5556,
MZ5557
powec rm 1110
rm 1100 powec
MPC1000
transistors JX 6822 A
inverter welder 4 schematic
SAA 14Z
transistor SI 6822
stg 8810
PL 15Z DIODE
germanium transistor
|
PDF
|
MIC710
Abstract: XC6875 MC1741L C4558C SG425 mc7724c NE533V General Instrument data book 741p SN75107
Text: Master Index and Cross Reference Guide M IL-M -38510 Program and Chip Information Operational Amplifiers Voltage Regulators Interface Circuits Voltage Comparators Consumer Circuits Other Linear Circuits Package Information and Mounting Hardware Application Notes
|
OCR Scan
|
110-E77-20.
MIC710
XC6875
MC1741L
C4558C
SG425
mc7724c
NE533V
General Instrument data book
741p
SN75107
|
PDF
|
AWPn
Abstract: JG30 CXK58257B
Text: SONY CXK58257BTM/BYM/BP/BM -55LL/70LL/10LL 32768-word x 8-bit High Speed CMOS Static RAM Description The CXK58257BTM/BYM/BP/BM is 262,144 bits high speed CMOS static RAM organized as 32768words by 8 bits. A polysilicon TFT cell technology realized extermely
|
OCR Scan
|
CXK58257BTM/BYM/BP/BM
-55LL/70LL/10LL
32768-word
32768words
-55LL
-70LL
-10LL
AWPn
JG30
CXK58257B
|
PDF
|
MS12R
Abstract: No abstract text available
Text: 16M x 4-Bit Dynamic RAM . o, r, x . HY b 3164405AJ/AT L -40/-50/-60 HYB 3165405AJ/ATÌL) -40/-50/-60 v ' ^ (4k & 8k Refresh, EDO-Version) Advanced Information • 16 777 216 words by 4-bit organization • 0 to 70 °C operating temperature • Hyper Page Mode - EDO - operation
|
OCR Scan
|
3164405AJ/AT
3165405AJ/AT
HYB3164
P-TSOPII-32-1
MS12R
|
PDF
|
3165805AT-60
Abstract: No abstract text available
Text: 8M x 8-Bit Dynamic RAM HYB 3164805AJ/AT L -40/-50/-60 HYB 3165805AJ/AT(L) -40/-50/-60 (4k & 8k Refresh, EDO-Version) Advanced Information • 8 388 608 words by 8-bit organization • 0 to 70 °C operating temperature • Hyper Page Mode - EDO - operation
|
OCR Scan
|
3164805AJ/AT
3165805AJ/AT
HYB3164
3165805AT-60
|
PDF
|
til 701
Abstract: photodiode die WAFER MAGNATEC LATERAL MOSFET magnatec mosfets depletion mode mosfet 100 MHz semefab Power MOSFET Wafer pps 501 semelab mosfet lateral
Text: til// 'rr* 'WWr Semefab SILICON DESIGN — WAFER FABRICATION SEMEFAB SCOTLAND LTD. is the Group's wafer fabrication facility based in Glenrothes, Fife. Located adjacent to Compugraphics, Europe's largest independent mask manufacturer, SEMEFAB has a capacity of
|
OCR Scan
|
100mm
10OOnm
til 701
photodiode die WAFER
MAGNATEC LATERAL MOSFET
magnatec mosfets
depletion mode mosfet 100 MHz
semefab
Power MOSFET Wafer
pps 501
semelab mosfet lateral
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SIEMENS 8M x 8-Bit Dynamic RAM HYB 3164805AJ/AT L -40/-50/-60 (4k & 8k Refresh, EDO-Version) HYB 3165805AJ/AT(L) -40/-50/-60 Advanced Information • 8 388 608 words by 8-bit organization • 0 to 70 °C operating temperature • Hyper Page Mode - EDO - operation
|
OCR Scan
|
3164805AJ/AT
3165805AJ/AT
P-TSOPII-32-1
|
PDF
|
