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    MARKING CODE TACS CHIP TRANSISTOR Search Results

    MARKING CODE TACS CHIP TRANSISTOR Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TTC5886A Toshiba Electronic Devices & Storage Corporation NPN Bipolar Transistor / hFE=400~1000 / VCE(sat)=0.22V / tf=120ns Visit Toshiba Electronic Devices & Storage Corporation
    TTA2097 Toshiba Electronic Devices & Storage Corporation PNP Bipolar Transistor / hFE=200~500 / VCE(sat)=-0.27V / tf=60ns Visit Toshiba Electronic Devices & Storage Corporation
    XPQR8308QB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 80 V, 350 A, 0.00083 Ω@10V, L-TOGL Visit Toshiba Electronic Devices & Storage Corporation
    XPQ1R00AQB Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 100 V, 300 A, 0.00103 Ω@10V, L-TOGL Visit Toshiba Electronic Devices & Storage Corporation
    TK190U65Z Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 650 V, 15 A, 0.19 Ohm@10V, TOLL Visit Toshiba Electronic Devices & Storage Corporation

    MARKING CODE TACS CHIP TRANSISTOR Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    HM628511CJPI12

    Abstract: HM628511HCI HM628511HCJPI HM628511HCJPI-12 DSA003633
    Text: HM628511HCI Series Wide Temperature Range Version 4M High Speed SRAM 512-kword x 8-bit ADE-203-1304A (Z) Rev. 1.0 Nov. 30, 2001 Description The HM628511HCI Series is a 4-Mbit high speed static RAM organized 512-k word × 8-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell)and high speed


    Original     		HM628511HCI 512-kword ADE-203-1304A 512-k 400-mil 36-pin D-85622 D-85619 HM628511CJPI12 HM628511HCJPI HM628511HCJPI-12 DSA003633 PDF

    HM62W8511HCJPI

    Abstract: HM62W8511HCJPI-12 DSA003633
    Text: HM62W8511HCI Series Wide Temperature Range Version 4M High Speed SRAM 512-kword x 8-bit ADE-203-1283A (Z) Rev. 1.0 Nov. 9, 2001 Description The HM62W8511HCI is a 4-Mbit high speed static RAM organized 512-kword × 8-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing


    Original     		HM62W8511HCI 512-kword ADE-203-1283A 400-mil 36-pin D-85622 D-85619 HM62W8511HCJPI HM62W8511HCJPI-12 DSA003633 PDF

    HM6216255CJPI12

    Abstract: HM6216255CTTI12 HM6216255HCJPI-12 HM6216255HCTTI-12 Hitachi DSA0047
    Text: HM6216255HCI Series Wide Temperature Range Version 4M High Speed SRAM 256-kword x 16-bit ADE-203-1305B (Z) Rev. 2.0 Dec. 5, 2002 Description The HM6216255HCI Series is a 4-Mbit high speed static RAM organized 256-k word × 16-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed


    Original     		HM6216255HCI 256-kword 16-bit) ADE-203-1305B 256-k 16-bit. 400-mil 44-pin HM6216255CJPI12 HM6216255CTTI12 HM6216255HCJPI-12 HM6216255HCTTI-12 Hitachi DSA0047 PDF

    HM6216255CTTI12

    Abstract: HM6216255HCJPI-12 HM6216255HCTTI-12 HM6216255CJPI12 DSA003633
    Text: HM6216255HCI Series Wide Temperature Range Version 4M High Speed SRAM 256-kword x 16-bit ADE-203-1305A (Z) Rev. 1.0 Nov. 30, 2001 Description The HM6216255HCI Series is a 4-Mbit high speed static RAM organized 256-k word × 16-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed


    Original     		HM6216255HCI 256-kword 16-bit) ADE-203-1305A 256-k 16-bit. 400-mil 44-pin HM6216255CTTI12 HM6216255HCJPI-12 HM6216255HCTTI-12 HM6216255CJPI12 DSA003633 PDF

    HM624100HC

    Abstract: HM624100HCJP-10 HM624100HCLJP-10 Hitachi DSA00316
    Text: HM624100HC Series 4M High Speed SRAM 1-Mword x 4-bit ADE-203-1198B (Z) Rev. 1.0 Nov. 30, 2001 Description The HM624100HC is a 4-Mbit high speed static RAM organized 1-Mword × 4-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing


    Original     		HM624100HC ADE-203-1198B 400-mil 32-pin D-85622 D-85619 HM624100HCJP-10 HM624100HCLJP-10 Hitachi DSA00316 PDF

    HM621400HC

    Abstract: HM621400HCJP-10 HM621400HCLJP-10 transistor marking CS Hitachi DSA00316
    Text: HM621400HC Series 4M High Speed SRAM 4-Mword x 1-bit ADE-203-1199B (Z) Rev. 1.0 Nov. 30, 2001 Description The HM621400HC is a 4-Mbit high speed static RAM organized 4-Mword × 1-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell)and high speed circuit designing


    Original     		HM621400HC ADE-203-1199B 400-mil 32-pin D-85622 D-85619 HM621400HCJP-10 HM621400HCLJP-10 transistor marking CS Hitachi DSA00316 PDF

    HM62W4100HC

    Abstract: HM62W4100HCJP-10 HM62W4100HCJP-12 HM62W4100HCLJP-10 HM62W4100HCLJP-12 Hitachi DSA00316
    Text: HM62W4100HC Series 4M High Speed SRAM 1-Mword x 4-bit ADE-203-1202C (Z) Rev. 2.0 Nov. 9, 2001 Description The HM62W4100HC is a 4-Mbit high speed static RAM organized 1-Mword × 4-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing


    Original     		HM62W4100HC ADE-203-1202C 400-mil 32-pin D-85622 D-85619 HM62W4100HCJP-10 HM62W4100HCJP-12 HM62W4100HCLJP-10 HM62W4100HCLJP-12 Hitachi DSA00316 PDF

    HM62W8511HC

    Abstract: HM62W8511HCJP-10 HM62W8511HCJP-12 HM62W8511HCLJP-10 HM62W8511HCLJP-12 Hitachi DSA00316
    Text: HM62W8511HC Series 4M High Speed SRAM 512-kword x 8-bit ADE-203-1201C (Z) Rev. 2.0 Nov. 9, 2001 Description The HM62W8511HC is a 4-Mbit high speed static RAM organized 512-kword × 8-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing


    Original     		HM62W8511HC 512-kword ADE-203-1201C 400-mil 36-pin D-85622 D-85619 HM62W8511HCJP-10 HM62W8511HCJP-12 HM62W8511HCLJP-10 HM62W8511HCLJP-12 Hitachi DSA00316 PDF

    HM628511HC

    Abstract: HM628511HCJP-10 HM628511HCLJP-10 HM628511CLJP Hitachi DSA00316 MARKING code TACS chip transistor
    Text: HM628511HC Series 4M High Speed SRAM 512-kword x 8-bit ADE-203-1197B (Z) Rev. 1.0 Nov. 30, 2001 Description The HM628511HC Series is a 4-Mbit high speed static RAM organized 512-k word × 8-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell)and high speed circuit


    Original     		HM628511HC 512-kword ADE-203-1197B 512-k 400mil 36-pin D-85622 D-85619 HM628511HCJP-10 HM628511HCLJP-10 HM628511CLJP Hitachi DSA00316 MARKING code TACS chip transistor PDF

    HM6216255HC

    Abstract: HM6216255HCJP-10 HM6216255HCTT-10 HM6216255CTT10 Hitachi DSA00331
    Text: HM6216255HC Series 4M High Speed SRAM 256-kword x 16-bit ADE-203-1196B (Z) Rev. 1.0 Nov. 30, 2001 Description The HM6216255HC Series is a 4-Mbit high speed static RAM organized 256-k word × 16-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit


    Original     		HM6216255HC 256-kword 16-bit) ADE-203-1196B 256-k 16-bit. 400-mil 44-pin HM6216255HCJP-10 HM6216255HCTT-10 HM6216255CTT10 Hitachi DSA00331 PDF

    HM62W16255CLTT10

    Abstract: Hitachi DSA00280
    Text: HM62W16255HC Series 4M High Speed SRAM 256-kword x 16-bit ADE-203-1200C (Z) Rev. 2.0 Nov. 1, 2001 Description The HM62W16255HC is a 4-Mbit high speed static RAM organized 256-kword × 16-bit. It has realized high speed access time by employing CMOS process (6-transistor memory cell) and high speed circuit designing


    Original     		HM62W16255HC 256-kword 16-bit) ADE-203-1200C 16-bit. 400-mil 44-pin HM62W16255CLTT10 Hitachi DSA00280 PDF

    Untitled

    Abstract: No abstract text available
    Text: HY64UD16322A Series Document Title 2M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 03. ’03 Preliminary 1.1 Change process code May. 13. ’03 -B This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not


    Original     		HY64UD16322A 32Mbit HYUD16322A PDF

    HYSD16322B

    Abstract: hynix hy
    Text: HY64SD16322B-DF Series Document Title 2Mx16 bit Low Low Power 1T/1C Pseudo SRAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft Jan. 2004 Preliminary Apr. 2005 Preliminary 1.0 Addition : Power-up timing diagram page 06 This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any


    Original     		HY64SD16322B-DF 2Mx16 HYSD16322B 85-85ns HYSD16322B hynix hy PDF

    HY64LD16162M

    Abstract: HY64LD16162M-DF85E HY64LD16162M-DF85I
    Text: HY64LD16162M Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul.18. ’ 01 Preliminary Oct. 07. ‘ 01


    Original     		HY64LD16162M HYLD16162M HY64LD16162M-DF85E HY64LD16162M-DF85I PDF

    HYNIX lot date code

    Abstract: 1CS MARKING HY64SD16162B HY64SD16162B-DF85E HY64SD16162B-DF85I HYSD16162B
    Text: HY64SD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Dec. 4. ’02 Preliminary Initial This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not


    Original     		HY64SD16162B 16Mbit 16bits. HYSD16162B HYNIX lot date code 1CS MARKING HY64SD16162B-DF85E HY64SD16162B-DF85I HYSD16162B PDF

    Untitled

    Abstract: No abstract text available
    Text: HY64SD16322B-DF Series Document Title 2Mx16 bit Low Low Power 1T/1C Pseudo SRAM Revision History Revision No. History Draft Date Remark 0.0 Initial Draft Jan. 2004 Preliminary This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any


    Original     		HY64SD16322B-DF 2Mx16 48-FBGA HYSD16322B 85-85ns PDF

    HY64SD16162B

    Abstract: HY64SD16162B-DF85E HY64SD16162B-DF85I
    Text: HY64SD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Dec. 4. ’02 Preliminary Initial This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not


    Original     		HY64SD16162B 16Mbit 16bits. HYSD16162B HY64SD16162B-DF85E HY64SD16162B-DF85I PDF

    Untitled

    Abstract: No abstract text available
    Text: HY64SD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Dec. 4. ’02 Preliminary Initial This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not


    Original     		HY64SD16162B 16Mbit 16bits. HYSD16162B PDF

    Untitled

    Abstract: No abstract text available
    Text: HY64LD16162M Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul.18. ’ 01 Preliminary Oct. 07. ‘ 01


    Original     		HY64LD16162M 100uA HYLD16162M PDF

    HYUD16162B

    Abstract: HY64UD16162B HY64UD16162B-DF60E HY64UD16162B-DF60I HY64UD16162B-DF70E HY64UD16162B-DF70I
    Text: HY64UD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Dec. 3. ’02 Preliminary Initial This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not


    Original     		HY64UD16162B 16Mbit 16bits. HYUD16162B HYUD16162B HY64UD16162B-DF60E HY64UD16162B-DF60I HY64UD16162B-DF70E HY64UD16162B-DF70I PDF

    HYUD16162B

    Abstract: HYUD16162
    Text: HY64UD16162B Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Dec. 3. ’02 Preliminary 1.1 DC Spec.변경 Apr. 21. ‘03 This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc. does not


    Original     		HY64UD16162B 16Mbit HYUD16162B HYUD16162B HYUD16162 PDF

    Untitled

    Abstract: No abstract text available
    Text: HY64LD16322M Series Document Title 2M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul.18. ‘ 01 Preliminary Oct. 06. ’ 01


    Original     		HY64LD16322M HYLD16322M PDF

    Untitled

    Abstract: No abstract text available
    Text: HY64UD16322M Series Document Title 2M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul. 18. ’ 01 Preliminary Oct. 06. ’ 01


    Original     		HY64UD16322M HYUD16322M PDF

    VL15

    Abstract: No abstract text available
    Text: HY64UD16162M Series Document Title 1M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History Draft Date Remark 1.0 Initial Jan. 04. ’ 01 Preliminary 1.1 Revised Jul. 03. ’ 01 Preliminary Jul.18. ’ 01 Preliminary Oct. 07. ‘ 01


    Original     		HY64UD16162M 100uA HYUD16162M VL15 PDF