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    LATTICE PACKAGE DIMENSIONS Search Results

    LATTICE PACKAGE DIMENSIONS Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPH9R00CQH Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH2R408QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance Visit Toshiba Electronic Devices & Storage Corporation
    XPH2R106NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 110 A, 0.0021 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    XPH3R206NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 70 A, 0.0032 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    TPH4R008QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 86 A, 0.004 Ohm@10V, SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation

    LATTICE PACKAGE DIMENSIONS Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    22V10A

    Abstract: LVCMOS33 LVCMOS18 QFN PACKAGE thermal resistance LVCMOS25 QFN footprint amkor mlf qfn
    Text: Using the ispGAL22V10A in the QFN Package April 2003 Application Note AN8074 Introduction Lattice’s ispGAL 22V10A device in the QFN package provides several added capabilities to the standard 22V10 architecture. The QFN Quad Flat pack, No lead package, also known as the MLF (Micro Lead Frame) package, is


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    PDF ispGAL22V10A AN8074 22V10A 22V10 sizCMOS25 LVCMOS18 ispGAL22V10A 1800adapter 1-800-LATTICE LVCMOS33 QFN PACKAGE thermal resistance LVCMOS25 QFN footprint amkor mlf qfn

    22V10

    Abstract: 22V10A LVCMOS25 LVCMOS33 ABEL plastron
    Text: Using the ispGAL22V10A in the QFN Package November 2007 Application Note AN8074 Introduction Lattice’s ispGAL 22V10A device in the QFN package provides several added capabilities to the standard 22V10 architecture. The QFN Quad Flat pack, No lead package, also known as the MLF (Micro Lead Frame) package, is


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    PDF ispGAL22V10A AN8074 22V10A 22V10 1800adapter 1-800-LATTICE 22V10 LVCMOS25 LVCMOS33 ABEL plastron

    LC4064V

    Abstract: Lattice ispmach LC4064V ispMACH 4A5 flip chip bga 0,8 mm OR3T80 LC4064 OR3C80 OR3T20 OR3T30 OR3T55
    Text: Lattice Package Offering Packages shown actual size. All dimensions refer to package body size. 32-Pin QFN 5 x 5 mm 0.5 mm pitch 6 x 6 mm 0.5 mm pitch 23 x 23 mm 1.0 mm pitch 27 x 27 mm 1.27 mm pitch 100-Ball fpBGA 132-Ball csBGA 56-Ball csBGA 11 x 11 mm 1.0 mm pitch


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    PDF 32-Pin 100-Ball 132-Ball 56-Ball 269-Ball 208-Ball 256-Ball 100-Pin 128-Pin 44-Pin LC4064V Lattice ispmach LC4064V ispMACH 4A5 flip chip bga 0,8 mm OR3T80 LC4064 OR3C80 OR3T20 OR3T30 OR3T55

    Untitled

    Abstract: No abstract text available
    Text: PA1048-T128-01A Data Sheet 128 pin TQFP socket/28 pin DIP 0.6" plug Supported Device/Footprints Adapter Wiring Using this adapter several 128 pin Lattice devices in TQFP packages can be programmed on 28 pin DIP programmers. This socket will only work for the TQFP package.


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    PDF PA1048-T128-01A socket/28 pLSI1048C ispLSI1048C pLSI2096 ispLSI2096

    Lattice PLSI

    Abstract: lattice semiconductor tape and reel
    Text: Tape and Reel Specifications cover tape seals the carrier tape and holds the devices in the pockets. A full reel holds a maximum quantity of devices depending on the package size. Lattice Semiconductor requires ordering in full reel quantities. Once loaded, the tape is wound onto a plastic reel for


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    PDF EIA-RS481. Lattice PLSI lattice semiconductor tape and reel

    16-mm

    Abstract: 16MM TAPE PACKAGE
    Text: Tape and Reel Specifications cover tape seals the carrier tape and holds the devices in the pockets. A full reel holds a maximum quantity of devices depending on the package size. Lattice Semiconductor requires ordering in full reel quantities. Once loaded, the tape is wound onto a plastic reel for


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    PDF EIA-RS481. 44-pin 84-pin 48-pin 100-pin 128-pin 176-pin 160-pin 16-mm 16MM TAPE PACKAGE

    LED43

    Abstract: No abstract text available
    Text: LED43 v 2.0 24.11.2014 Description LED43 series are fabricated from narrow band-gap InAsSb/InAsSbP heterostructures lattice matched to InAs substrate. This Mid-IR LED provides a typical peak wavelength of 4.15 µm and optical power of typ. 0.01 mW qCW. It comes in TO-18 package a with a glass window.


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    PDF LED43 LED43 150mA 200mA

    LATTICE SEMICONDUCTOR Tape and Reel Specification

    Abstract: No abstract text available
    Text: Tape and Reel Specifications cover tape seals the carrier tape and holds the devices in the pockets. Once loaded, the tape is wound onto a plastic reel for labeling and packing. A full reel holds a maximum quantity of devices depending on the package size. Lattice Semiconductor requires ordering in full reel


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    PDF EIA-RS481. moun481. 44-pin 68-pin 84-pin 28-pin 20-pin LATTICE SEMICONDUCTOR Tape and Reel Specification

    LED21

    Abstract: No abstract text available
    Text: LED21 v 1.0 12.02.2014 Description LED21 series are fabricated from narrow band-gap GaInAsSb/AlGaAsSb heterostructures lattice matched to GaSb substrate. This Mid-IR LED provides a typical peak wavelength of 2.15 µm and optical power of typ. 1 mW qCW. It comes in TO-18 package a with a glass window.


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    PDF LED21 LED21 150mA 200mA

    LED38

    Abstract: No abstract text available
    Text: LED38 v 2.0 01.12.2014 Description LED19-PR series are fabricated from narrow band-gap InAsSb/InAsSbP heterostructures lattice matched to InAs substrate. This Mid-IR LED provides a typical peak wavelength of 3.75 µm and optical power of typ. 30 µW qCW. It comes in TO-18 package, with cap and without window on request .


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    PDF LED38 LED19-PR LED38

    Untitled

    Abstract: No abstract text available
    Text: LED23 rev 2.0 29.04.2015 Description LED23 series are fabricated from narrow band-gap GaInAsSb/AlGaAsSb heterostructures lattice matched to GaSb substrate. This Mid-IR LED provides a typical peak wavelength of 2.35 µm and optical power of typ. 0.8 mW qCW. It comes in TO-18 package, with cap and without window on request .


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    PDF LED23 LED23 150mA

    LED19-PR

    Abstract: No abstract text available
    Text: LED19-PR v 2.0 24.11.2014 Description LED19-PR series are fabricated from narrow band-gap GaInAsSb/AlGaAsSb heterostructures lattice matched to GaSb substrate. This Mid-IR LED provides a typical peak wavelength of 1.95 µm and optical power of typ. 1 mW qCW. It comes in TO-18 package, with a parabolic reflector and a without window on request .


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    PDF LED19-PR LED19-PR 150mA 200mA

    LFXP2-8E

    Abstract: LFXP2-40E LFXP2-5E LFXP20C theta jc FCBGA LFXP2-17E LFE3-17 Theta JB LFXP15C LFXP2-8E 132
    Text: Thermal Management July 2009 Introduction Thermal management is recommended as part of any sound CPLD and FPGA design methodology. To properly assess the thermal characteristics of the system, Lattice Semiconductor specifies a maximum allowable junction temperature in all device data sheets. The system designer should always complete a thermal analysis of their specific design to ensure that the device and package does not exceed the junction temperature requirements.


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    PDF 64-ball 144-ball LFXP2-8E LFXP2-40E LFXP2-5E LFXP20C theta jc FCBGA LFXP2-17E LFE3-17 Theta JB LFXP15C LFXP2-8E 132

    84 pin plcc lattice dimension

    Abstract: C045
    Text: Package Diagrams November 2003 16-Pin Plastic DIP Package Dimensions in Inches -BN/2 b1 1 WITH LEAD FINISH E 5 6 CL E1 c1 c N SEE DETAIL A BASE METAL (b) SECTION Z-Z CL BASE PLANE c 5 -A- D 6 eA Z Z 4 A2 A eB 7 -C.015 SEATING PLANE A1 L b2 10 b .010 GAGE


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    PDF 16-Pin 84 pin plcc lattice dimension C045

    14.5M 1982

    Abstract: AC12 MO-220 MO-275 ANSI Y14.5 FCBGA304 fcbga-304 ansi-y14.5m-1982 LAttice bottom marking SCM40
    Text: Package Diagrams November 2010 Data Sheet 20-Pin 300-Mil CERDIP Package Dimensions in Inches (DATUM A) B 1 N/2 4 E E1 N E3 e/2 E DETAIL A D A 4 BASE PLANE (DATUM B) A2 A1 A C SEATING PLANE e b2 Z b .010 M L E2 C A B b1 (c) 4X WITH LEAD FINISH c1 BASE METAL


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    PDF 20-Pin 300-Mil) 1020-ball 1152-ball 1704-ball 492-Ball 208-ball 25-ball 332-ball 100-pin 14.5M 1982 AC12 MO-220 MO-275 ANSI Y14.5 FCBGA304 fcbga-304 ansi-y14.5m-1982 LAttice bottom marking SCM40

    Lattice Semiconductor Package Diagrams 256-Ball fpBGA

    Abstract: LAttice top marking BB 1704 672-BALL SCM40 AC12 MO-220 MO-275 84 pin plcc lattice dimension fcbga-304
    Text: Package Diagrams October 2011 Data Sheet 20-Pin 300-Mil CERDIP Package Dimensions in Inches (DATUM A) B N/2 1 4 E E1 N E3 e/2 E DETAIL A D A 4 BASE PLANE (DATUM B) A2 A1 A C SEATING PLANE e b2 Z b .010 M L Z E2 C A B b1 (c) 4X WITH LEAD FINISH c1 BASE METAL


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    PDF 20-Pin 300-Mil) 208-ball 25-ball 332-ball 100-pin 120-pin 128-pin 160-pin 208-pin Lattice Semiconductor Package Diagrams 256-Ball fpBGA LAttice top marking BB 1704 672-BALL SCM40 AC12 MO-220 MO-275 84 pin plcc lattice dimension fcbga-304

    TMS 3880

    Abstract: vantis jtag schematic e2cmos technology jtag cable lattice Schematic NT 407 F lattice electrically erasable gal 1985 Vantis ISP cable lattice 1996
    Text: L A T T I C E S E M I C O N D U C T O R New Dimensions in ISP Programmable Analog Circuits Programmable Analog Circuits WORLD LEADER FOR IN-SYSTEM PROGRAMMABILITY ISP from LATTICE—THE Digital Lattice ispPACTM—Programmable Analog Devices that are custom designed and


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    PDF functio268-8000 I0104 TMS 3880 vantis jtag schematic e2cmos technology jtag cable lattice Schematic NT 407 F lattice electrically erasable gal 1985 Vantis ISP cable lattice 1996

    JESD22-A108-A

    Abstract: JESD22-A104-A JESD22*108 EIA-671 JEDS22-C101-A doc-70 ISO14000 J-STD-035 8110014 Distributors and Sales Partners
    Text: Reliability and Quality Assurance February 2002 Introduction Lattice Semiconductor Corporation LSC designs, develops and markets high performance programmable logic devices (PLDs) and related development system software. Lattice Semiconductor is the inventor and world's leading supplier of in-system programmable (ISPtm) CPLDs. PLDs are standard semiconductor components that can


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    PDF MIL-STD-883, MIL-STD-883E, J-STD-035 JESD22-A108-A JESD22-A104-A JESD22*108 EIA-671 JEDS22-C101-A doc-70 ISO14000 J-STD-035 8110014 Distributors and Sales Partners

    Date Code restriction

    Abstract: On semiconductor date Code shelf life JESD22-B102-C J-STD-033 GUIDELINES FOR HANDLING MOISTURE SENSITIVE DEVICE
    Text: Technical Bulletin July 2002 PB# 1146 Date Code Restriction and Product Shelf Life High Performance Programmable Logic Products Introduction Date Code Restrictions and the associated shelf life of products are commonly raised issues for advanced semiconductor products. The common concern is for the fitness of use of product that has been held in


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    PDF 1-888-ISP-PLDS Date Code restriction On semiconductor date Code shelf life JESD22-B102-C J-STD-033 GUIDELINES FOR HANDLING MOISTURE SENSITIVE DEVICE

    ISPVM embedded

    Abstract: post card schematic with ispgal Supercool TQFP-100 footprint matrix converting circuit VHDL or CPLD code low pass Filter VHDL code microcontroller using vhdl ISPVM ieee 1532 ispPAC80
    Text: Lattice Semiconductor Corporation • Fall 2000 • Volume 7, Number 1 In This Issue ispGDX 240VA Completes Popular 3.3V Family The SuperFAST Family Just Got Faster! Entire ispMACH™ 4A Family Now Released to Production ispPAC®80 Operating Frequency Extended to


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    PDF 240VA 750kHz I0117 ISPVM embedded post card schematic with ispgal Supercool TQFP-100 footprint matrix converting circuit VHDL or CPLD code low pass Filter VHDL code microcontroller using vhdl ISPVM ieee 1532 ispPAC80

    Recommended land pattern smd-0.5

    Abstract: "x-ray machine" Lattice Semiconductor Package Diagrams 256-Ball fpBGA pcb fabrication process ultra fine pitch BGA LC4064ZE package dimension 256-FTBGA nomenclature pcb hdi of BGA Staggered Pins package BN256
    Text: PCB Layout Recommendations for BGA Packages September 2010 Technical Note TN1074 Introduction As Ball Grid Array BGA packages become increasingly popular and become more populated across the array with higher pin count and smaller pitch, it is important to understand how they are affected by various board layout


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    PDF TN1074 Recommended land pattern smd-0.5 "x-ray machine" Lattice Semiconductor Package Diagrams 256-Ball fpBGA pcb fabrication process ultra fine pitch BGA LC4064ZE package dimension 256-FTBGA nomenclature pcb hdi of BGA Staggered Pins package BN256

    LCMXO2-1200

    Abstract: CEL-9750ZHF CEL-9750ZHF10
    Text: MachXO2 Product Family Qualification Summary Lattice Document # 25 – 106923 July 2013 Lattice Semiconductor Corporation Doc. #25-106923 Rev. G 1 Dear Customer, Enclosed is Lattice Semiconductor‟s MachXO2 Product Family Qualification Report. This report was created to assist you in the decision making process of selecting and using our products. The


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    PDF LCMXO2-1200-25WLCSP LCMXO2-1200 CEL-9750ZHF CEL-9750ZHF10

    spartan3 fpga development boards

    Abstract: M25PXX XCF08S ddr spi flash XCF16S PLCC-48 footprint spi flash m25pxx W25PXX XC3S1000 XC3S1500
    Text: LOW-COST FPGA CONFIGURATION VIA INDUSTRY-STANDARD SPI SERIAL FLASH & LatticeECP/EC FPGAs A Lattice Semiconductor White Paper June 2004 Lattice Semiconductor 5555 Northeast Moore Ct. Hillsboro, Oregon 97124 USA Telephone: 503 268-8000 www.latticesemi.com


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    PDF

    J-STD-033

    Abstract: Date Code restriction JESD22-B102 jstd for msl 3
    Text: Product Bulletin #PB1146b Date Code Restriction and Product Shelf Life High Performance Programmable Logic Products Introduction Date Code Restrictions and the associated shelf life of products are commonly raised issues for advanced semiconductor products. The common concern is for the fitness of use of product that has been held in


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    PDF PB1146b 1-800-LATTICE J-STD-033 Date Code restriction JESD22-B102 jstd for msl 3