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    IND 449 Search Results

    IND 449 Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    DFE2016CKA-1R0M=P2 Murata Manufacturing Co Ltd Fixed IND 1uH 1800mA NONAUTO Visit Murata Manufacturing Co Ltd
    LQW18CN55NJ0HD Murata Manufacturing Co Ltd Fixed IND 55nH 1500mA POWRTRN Visit Murata Manufacturing Co Ltd
    LQW18CNR56J0HD Murata Manufacturing Co Ltd Fixed IND 560nH 450mA POWRTRN Visit Murata Manufacturing Co Ltd
    DFE322520F-2R2M=P2 Murata Manufacturing Co Ltd Fixed IND 2.2uH 4400mA NONAUTO Visit Murata Manufacturing Co Ltd
    LQW18CN4N9D0HD Murata Manufacturing Co Ltd Fixed IND 4.9nH 2600mA POWRTRN Visit Murata Manufacturing Co Ltd

    IND 449 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: IND 006 Effective: 11/15/2011 PREFERRED DISTRIBUTOR PRICE LIST Copper will escalate/de-escalate at time of order shipment Comex Copper Base $3.25 PART NUMBER AWG SIZE Copper Weight/MFT PRICE/MFT 9 12 17 30 12 18 25 46 18 27 37 71 $225 $266 $349 $551 $272 $335


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    PDF

    T10X5X5

    Abstract: EER54 EE55B
    Text: Magnetic Material Ind . Co., LTD Introduction & Characteristics of MnZn Ferrite cores Page1-12 Mnzn Power Material EER,ETD,RM,UYF,EP,EPC,UY,EFD,LP Page13-18 PQ,URS,UF&UI,ED,T,EI,EE Page19-26 Mnzn High Permeability Material EE,EI,EP,FT&ET,UF&UI,T,RM, Common mode choke cores applied in EMS,ET


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    PDF Page1-12 Page13-18 Page19-26 Page27-33 Page34-37 Page38-43 Page43-47 Page47-54 Page55-59 T10X5X5 EER54 EE55B

    LCMX0640

    Abstract: LCMXO2280C-3T144C LCMXO640C-3TN100I LCMXO2280E-3TN100I LCMXO1200C-3T144I LCMXO640C-4TN144C LCMXO256C-3TN100I LCMXO1200C LCMXO256C-3TN100C 3TN100C
    Text: MachXO Family Data Sheet Version 01.0, July 2005 MachXO Family Data Sheet Introduction July 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


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    PDF TN1086) TN1087) LCMX0640 LCMXO2280C-3T144C LCMXO640C-3TN100I LCMXO2280E-3TN100I LCMXO1200C-3T144I LCMXO640C-4TN144C LCMXO256C-3TN100I LCMXO1200C LCMXO256C-3TN100C 3TN100C

    Untitled

    Abstract: No abstract text available
    Text: MachXO Family Data Sheet Version 01.1, October 2005 MachXO Family Data Sheet Introduction October 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


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    PDF TN1086) TN1087) TN1097)

    LFEC1E-3Tn100C

    Abstract: DDR400 LFEC10 LFEC15 LFEC33 LFECP10 LFECP15 LFECP20 LFECP33 LFEC1E-3TN144I
    Text: LatticeECP/EC Family Data Sheet Version 01.4, December 2004 LatticeECP/EC Family Data Sheet Introduction November 2004 Preliminary Data Sheet Features − − − − − − • Extensive Density and Package Options • 1.5K to 41K LUT4s • 65 to 576 I/Os


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    PDF 36x36 18x18 TN1052) TN1057) TN1053) LFEC1E-3Tn100C DDR400 LFEC10 LFEC15 LFEC33 LFECP10 LFECP15 LFECP20 LFECP33 LFEC1E-3TN144I

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet Version 04.4, April 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


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    PDF HSTL15 TN1050) TN1052) TN1082)

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet DS1001 Version 04.7, August 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet DS1001 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


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    PDF DS1001 DS1001 HSTL15 LVDS25E

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet DS1001 Version 05.0, July 2007 LatticeXP Family Data Sheet Introduction July 2007 Data Sheet DS1001 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


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    PDF DS1001 DS1001 HSTL15 1000x

    LFXP3C-3TN144C

    Abstract: LFXP6C-4FN256C 3FN3 LFXP3C-3TN100C LFXP6C-3FN256I PT36 LFXP10C-3F256I LFXP3C-4TN100C LFXP15C-5FN388C LFXP6
    Text: LatticeXP Family Data Sheet DS1001 Version 05.1, November 2007 LatticeXP Family Data Sheet Introduction July 2007 Data Sheet DS1001 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


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    PDF DS1001 DS1001 HSTL15 LVDS25E LFXP3C-3TN144C LFXP6C-4FN256C 3FN3 LFXP3C-3TN100C LFXP6C-3FN256I PT36 LFXP10C-3F256I LFXP3C-4TN100C LFXP15C-5FN388C LFXP6

    PL44A

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet DS1001 Version 04.9, February 2007 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet DS1001 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


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    PDF DS1001 DS1001 HSTL15 1000x LVDS25E PL44A

    PT15B

    Abstract: LFXP20C-5FN484C
    Text: LatticeXP Family Data Sheet DS1001 Version 04.9, February 2007 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet DS1001 • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


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    PDF DS1001 DS1001 HSTL15 LVDS25E PT15B LFXP20C-5FN484C

    LFXP10C-4FN256C

    Abstract: PB27A PT15B LFXP15C-5FN388C LFXP10C5FN256C LFXP3C-3QN208C LFXP6C-5FN256C LFXP10C-4FN388C LFXP6C-5TN144C LFXP20C-5FN484C
    Text: LatticeXP Family Data Sheet Version 04.5, May 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


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    PDF HSTL15 1000x TN1051) TN1050) TN1052) TN1082) LFXP10C-4FN256C PB27A PT15B LFXP15C-5FN388C LFXP10C5FN256C LFXP3C-3QN208C LFXP6C-5FN256C LFXP10C-4FN388C LFXP6C-5TN144C LFXP20C-5FN484C

    LFXP20C-5F256C

    Abstract: LFXP20C-4F484C PT15B
    Text: LatticeXP Family Data Sheet DS1001 Version 05.1, November 2007 LatticeXP Family Data Sheet Introduction July 2007 Data Sheet DS1001  Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces:  LVCMOS 3.3/2.5/1.8/1.5/1.2


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    PDF DS1001 DS1001 HSTL15 1000x LFXP20C-5F256C LFXP20C-4F484C PT15B

    LFXP20C-4F484C

    Abstract: PT15B
    Text: LatticeXP Family Data Sheet Version 04.3, March 2006 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


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    PDF HSTL15 1000x TN1051) TN1050) TN1052) TN1082) LFXP20C-4F484C PT15B

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet Version 03.0, September 2005 LatticeXP Family Data Sheet Introduction July 2005 Advance Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2


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    PDF HSTL15 TN1050) TN1052) TN1082)

    Untitled

    Abstract: No abstract text available
    Text: LatticeXP Family Data Sheet Version 04.0, December 2005 LatticeXP Family Data Sheet Introduction December 2005 Data Sheet • Flexible I/O Buffer Features • Programmable sysIO buffer supports wide range of interfaces: − LVCMOS 3.3/2.5/1.8/1.5/1.2 − LVTTL


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    PDF HSTL15 TN1050) TN1052) TN1082)

    Untitled

    Abstract: No abstract text available
    Text: MP, i 0 PRELIMINARY IND: -25 a PALLV22V1OZ-25 Advanced Micro Devices Low-Voltage, Zero-Power 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible ■ Zero-power CMOS technology — 15 jiA standby current


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    PDF PALLV22V1OZ-25 24-Pin 7661A CC-2M-2/93-0

    P0168

    Abstract: No abstract text available
    Text: a IND: -15 PALCE22V1OZ-15 Zero-Power 24-Pin EE CMOS Versatile PAL Device Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Zero-power CMOS technology — 30 nA standby current — As fast as 15 ns first-access propagation delay and 50 MHz fMAx external


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    PDF PALCE22V1OZ-15 24-Pin 8378A P0168

    Untitled

    Abstract: No abstract text available
    Text: gn National ÆÆ Semiconductor 54F/74F40 Dual 4-Input NAND Buffer General Description This device co ntains tw o ind ependent gates, each o f w hich perform s th e logic N AND function. Ordering Code: seesection5 Connection Diagrams Logic Symbol Pin A ssignm ent


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    PDF 54F/74F40 TL/F/9466-2 4F/74F

    Untitled

    Abstract: No abstract text available
    Text: MÄV i o 1993 IND: -30 Advanced Micro Devices PALLV16V8Z-30 Low-Voltage, Zero-Power 20-Pin EE CMOS Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible — Vcc = +3.0 V to +3.6 V ■ Zero-power CMOS technology


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    PDF PALLV16V8Z-30 20-Pin PAL16R8 PAL10H8

    tt 3043 Transistor 5 pin type

    Abstract: transistor sj 3161 transistor TT 3043 SCR K 3155 transistor NTE3090 NTE519 NTE3078 scr nte 480 NTE cross 160A TRIAC
    Text: N T E ELECTRONICS INC S5E T> bM aiSST DQQEbfl? STS « N T E T-H \-*O I D INDICATORS NTE TVI» No. Description and Application Dtag. NO. «y Per Bag Ind Pkg S ia Typical Viewing Angle Viewed ' Color Typical Maximum (Volts) Breakdown voltage (Vorta) Maximum


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    PDF G0057D2 tt 3043 Transistor 5 pin type transistor sj 3161 transistor TT 3043 SCR K 3155 transistor NTE3090 NTE519 NTE3078 scr nte 480 NTE cross 160A TRIAC

    P0168

    Abstract: 30a48
    Text: FINAL IND: -25 a PALLV22V1OZ-25 Advanced Micro Devices Low-Voltage, Zero-Power 24-Pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible ■ Zero-power CMOS technology — 30 ¿A standby current — 25 ns first-access propagation delay


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    PDF PALLV22V1OZ-25 24-Pin 17661B CP-12 5M-1/94-0 P0168 30a48

    Untitled

    Abstract: No abstract text available
    Text: OUTLINE DRAWINGS ORIENTATION IND CATOR \~ - .800 - H Outline 101 Outline 102 Outline 103 Outline 104 Miscellaneous V - ORIENTATION INDICATOR Outline 105 P u l s a r M i c r o w a v e C o r p o r a t i o n OUTLINE DRAWINGS 48 Industrial West ♦ Clifton, N J 07012


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    PDF 500f-

    pin configuration IC 74151

    Abstract: IC 74151 diagram and truth table IC TTL 7400 diagram and truth table ic 74151 full adder using Multiplexer IC 74151 Multiplexer IC 74151 programmer manual EPLD cypress IC 7400 SERIES ALL DATA programming manual EPLD cy7c342
    Text: CYPRESS SEMICONDUCTOR HOE D 256*^2 DD05427 5 ICYP 7 T V d -/3 -4 7 CY7C340 EPLD Family « 1 ^ CYPRESS SEMICONDUCTOR Multiple Array Matrix High-Density EPLDs Features General Description • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions


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    PDF CY7C340 CY7C344-25WC/WI CY7C344-25HC/HI CY7C344-25JC/JI CY7C344-25HMB CY7C344-25WMB CY7C344-25DMB CY7C344-35HMB CY7C344-35WMB CY7C344-35DMB pin configuration IC 74151 IC 74151 diagram and truth table IC TTL 7400 diagram and truth table ic 74151 full adder using Multiplexer IC 74151 Multiplexer IC 74151 programmer manual EPLD cypress IC 7400 SERIES ALL DATA programming manual EPLD cy7c342