C-15
Abstract: C-16 DSP96002 DSP96002 fft
Text: APPENDIX C IEEE ARITHMETIC C.1 FLOATING-POINT NUMBER STORAGE AND ARITHMETIC C.1.1 General The IEEE standard for binary floating point arithmetic provides for the compatibility of floating-point numbers across all implementations which use the standard by defining bit-level encoding of floating-point numbers.
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DSP96002
C-15
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DSP96002 fft
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S2EF
Abstract: 001B 010B B461D F2N3 0b461
Text: Proving the IEEE Correctness of Iterative Floating-Point Square Root, Divide, and Remainder Algorithms Marius Cornea-Hasegan, Microprocessor Products Group, Hillsboro, OR, Intel Corp. Index words: floating-point, IEEE correctness, divide, square root, remainder
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ieee floating point multiplier future scope
Abstract: AMD-K5 Processor journal q21998
Text: Formally Verifying IEEE Compliance of Floating-Point Hardware John OLeary, Xudong Zhao, Rob Gerth, Carl-Johan H. Seger Strategic CAD Labs, Intel Corporation, Hillsboro OR Index words: floating-point, IEEE compliance, formal verification, model checking, theorem proving
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FLO32
Abstract: FLO24 FPA24 FPD32 AN575 IEEE754 IEEE-754 FPM32 NRM32 integer and floating point numbers
Text: IEEE 754 Compliant Floating-Point Routines AN575 IEEE 754 Compliant Floating-Point Routines Author: Frank Testa INTRODUCTION Using biased exponents permits comparison of exponents through a simple unsigned comparator, and further results in a unique representation of zero given by
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AN575
PIC16/17
FLO32
FLO24
FPA24
FPD32
AN575
IEEE754
IEEE-754
FPM32
NRM32
integer and floating point numbers
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Untitled
Abstract: No abstract text available
Text: 7 IEEE Floating-Point Conformance The 21164 supports the IEEE floating-point operations as defined by the Alpha architecture. Support for a complete implementation of the IEEE Standard fo r Binary Floating-Point Arithmetic ANSI/IEEE Standard 754 1985 is provided by a
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80387 programmers reference manual
Abstract: weitek intel 80486 opcode sheet weitek 1167 82C301 intel 82C301 80386 programmers manual AJT20 WEITEK 3167 protected mode 80486
Text: ABACUS 3167 FLOATING-POINT COPROCESSOR July 1990 1. Features SINGLE-CHIP FLOATING-POINT COPROCESSOR IEEE FORM AT Used with the Intel 80386 Conforms to the IEEE standard format for floating-point arithmetic in both single and double precision ANSI/IEEE Standard 754-1985
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121-pin
80387 programmers reference manual
weitek
intel 80486 opcode sheet
weitek 1167
82C301
intel 82C301
80386 programmers manual
AJT20
WEITEK 3167
protected mode 80486
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DSP-3201
Abstract: No abstract text available
Text: ANALOG DEVICES 32-Bit IEEE Floating-Point Chipset ADSP-3201/ADSP-3202 FEATURES Complete Chipset Implementing Floating-Point Arithmetic Fully Compatible with IEEE Standard 754 Arithmetic Operations on Three Data Formats: 32-Bit Single-Precision Floating Point
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32-Bit
ADSP-3211
ADSP-3221
240ns
750mW
144-Lead
OOUT31
DSP-3201
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Untitled
Abstract: No abstract text available
Text: 7 Alpha 21164 Microprocessor IEEE Floating-Point Conformance The 21164 supports the IEEE floe ting-point operations as defined by the Alpha architecture. Support for a complete implementation of the IEEE Standard for Binary Floating-Point Arithmetic ANSI/IEEE Standard 754 1985 is
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Untitled
Abstract: No abstract text available
Text: AN ALO G D E V IC E S □ IEEE Floating-Point DSP Microprocessor FEATU RES 20 MHz IEEE Floating-Point Processor IEEE 32-Bit Single-Precision and 40-Bit Extended Single-Precision Floating-Point Formats 32-Bit Fixed-Point Formats, Integer and Fractional Separate Program and Data Buses Extended Off-Chip
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32-Word,
ADSP-21020
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80387
Abstract: WEITEK 3167 pinout 80387 programmers reference manual 50/weitek pcs
Text: WTL 3167 FLOATING-POINT COPROCESSOR PRELIMINARY DATA June 1988 Features SINGLE-CHIP FLOATING-POINT COPROCESSOR IEEE FORM AT Designed for use with the Intel 80386 Conforms to the IEEE standard format for floating point arithmetic in both single- and double-precision
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80387
WEITEK 3167 pinout
80387 programmers reference manual
50/weitek pcs
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ADSP-3201
Abstract: ADSP3201
Text: ANALOG DEVICES □ 32-Bit IEEE Floating-Point Chipset ADSP-3201/ADSP-3202 FEA T U R ES Complete Chipset Implementing Floating-Point Arithmetic Fully Compatible with IEEE Standard 754 Arithmetic Operations on Three Data Formats: 32-Bit Single-Precision Floating Point
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ADSP-3201/ADSP-3202
ADSP-3211
ADSP-3221
240ns
750mW
ADSP-3201
ADSP3201
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ADSP-3201
Abstract: ADSP-3221 ADSP-1401 adsp3201 ADSP3202 ADSP-3202 ADSP-3128 ADSP3210 HB FULLER ADSP-3210
Text: ANALOG DEVICES 32-Bit IEEE Floating-Point Chipset ADSP-3201/ADSP-3202 FEATURES Com plete Chipset Im plementing Floating-Point Arithm etic Fully Com patible w ith IEEE Standard 754 A rithm etic Operations on Three Data Formats: 32-Bit Single-Precision Floating Point
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ADSP-3201/ADSP-3202
ADSP-3211
ADSP-3221
240ns
750mW
ADSP-3201
ADSP-1401
adsp3201
ADSP3202
ADSP-3202
ADSP-3128
ADSP3210
HB FULLER
ADSP-3210
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ADSP-3212
Abstract: HI2023 ADSP32xx ADSP-3221 4106 "pin-compatible" ADSP-3210 adsp3222 ADSP-3222 CHIP SM 4108
Text: ANALOG D EVICES □ 64-Bit IEEE Floating-Point Chipset " ADSP-3212/ADSP-3222 FEATURES Complete 40 MFLOPS Floating-Point Chipset M ultiplier/D ivider and ALU Fully Com patible w ith IEEE Standard 754 Arithm etic Operations on Four Data Formats: 32-Bit Single-Precision Floating-Point
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ADSP-3212/ADSP-3222
32-Bit
300ns
600ns
130ns
ADSP-3212
HI2023
ADSP32xx
ADSP-3221
4106 "pin-compatible"
ADSP-3210
adsp3222
ADSP-3222
CHIP SM 4108
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Untitled
Abstract: No abstract text available
Text: ANALOG DEVICES High Speed 64-Bit IEEE Floating-Point Multiplier _ ADSP-3210 1.1 Scope. This specification covers the detail requirements for a CMOS monolithic 32-bit and 64-bit IEEE Standard 754 format floating-point multiplier.
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ADSP-3210
32-bit
ADSP-3210SG/883B
ADSP-3210TG/883B
ADSP-3210UG/883B
ADI-M-1000:
G-100A.
ADSP-3210
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Untitled
Abstract: No abstract text available
Text: ANALOG DEVICES □ 64-Bit IEEE Floating-Point Chipset ADSP-3212/ADSP-3222 FEATURES Com plete 40 MFLOPS Floating-Point Chipset M ultiplier/D ivider and ALU Fully Com patible w ith IEEE Standard 754 A rithm etic Operations on Four Data Formats: 32-Bit Single-Precision Floating-Point
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ADSP-3212/ADSP-3222
32-Bit
300ns
600ns
130ns
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m15m R2
Abstract: ADSP-21XXX architecture ADSP-21020 adsp21020kg133
Text: ANALOG ► DEVICES 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution
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40-Bit
80-Bit
ADSP-21020KG-80
ADSP-21020KG-100
ADSP-21020KG-133
ADSP-21020BG-80
SP-21020BG-100
m15m R2
ADSP-21XXX architecture
ADSP-21020
adsp21020kg133
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268-5400
Abstract: weitek 268-5400-00 WTL1032 1u040 WTL1033 J1439
Text: A- B, W OODARD & AS SO C INNOVATIONS IN MICROSYSTEM TECHNOLOGY WTL1032 WTL1033 4 0 8 7 3 3 -7 3 5 3 High-Speed 32-Bit IEEE Floating Point Multiplier High-Speed 32-Bit IEEE Floating Point ALU Features A complete floating-point arithmetic solution for high-speed processors
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WTL1032
32-Bit
WTL1033
16-bit
100ns
200ns
900ns
1032JC/1033JC
268-5400
weitek
268-5400-00
1u040
J1439
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Untitled
Abstract: No abstract text available
Text: 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 ANALOG DEVICES FUNCTIONAL BLOCK DIAGRAM FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maxim izes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle
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ADSP-21020
1024-Point
32-Bit
40-Bit
80-Bit
223-Lead
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PMD4m
Abstract: pmd23 A0335 G03327 ADSP-21020 ADSP-2100 ADSP-21000 TSW161 PMD24 PMD32
Text: . ANALOG DEVICES INC OßlbBOO 0033252 5 I ¡ANA 4LE ]> -r-V9-/z-û<? IEEE Floating-Point DSP Microprocessor ANALOG DEVICES FUNCTIONAL BLOCK DIAGRAM FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance
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G0332S2
1024-Point
32-Bit
40-Bit
80-Bit
ADSP-21020KG-80
223-Lead
ADSP-21020KG-60
PMD4m
pmd23
A0335
G03327
ADSP-21020
ADSP-2100
ADSP-21000
TSW161
PMD24
PMD32
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Untitled
Abstract: No abstract text available
Text: ANALOG DEVICES High Speed 64-Bit IEEE Floating-Point ALU _ ADSP-3220 1.1 Scope. This specification covers the detail requirements for a CMOS monolithic 32-bit and 64-bit IEEE Standard 754 format floating-point arithmetic and logic unit ALU .
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64-Bit
ADSP-3220
32-bit
ADSP-3220SG/883B
ADSP-3220TG/883B
ADI-M-1000:
G-144A.
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DSP-21020
Abstract: DSP21020
Text: NOV 3 m ANALOG ► DEVICES 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture M axim izes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle
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32/40-Bit
ADSP-21020
1024-Point
32-Bit
40-Bit
80-Bit
223-Lead
DSP-21020
DSP21020
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DSP-21020
Abstract: ADSP-21020
Text: ANALOG DEVICES 32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution 100 MFLQPS Peak, 66 MFLOPS Sustained Performance
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1024-Point
32-Bit
40-Bit
80-Bit
223-Lead
DSP-21020
ADSP-21020
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ADSP-3221
Abstract: No abstract text available
Text: ANALOG DEVICES High Speed 64-Bit IEEE Floating-Point ALU ADSP-3221 1.1 Scope. This specification covers the detail requirements for a CMOS monolithic 32-bit and 64-bit IEEE Standard 754 format floating-point arithmetic and logic unit ALU . 1.2 Part Number.
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ADSP-3221
32-bit
ADSP-3221
SG/883B
ADSP-3221TG/883B
ADI-M-1000:
G-144A.
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SN74ACT8847
Abstract: ACT8847 ti 8847
Text: SN74ACT8847 64-Bit Floating Point Unit • Meets IEEE Standard for Single- and DoublePrecision Formats • Performs Floating Point and Integer Add, Subtract, Multiply, Divide, Square Root, and Compare • 64-Bit IEEE Divide in 11 Cycles, 64-Bit Square Root in 14 Cycles
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SN74ACT8847
64-Bit
30-ns,
40-ns
50-ns
ACT88X7
SN74ACT8847
ACT8847
ti 8847
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