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Integrated Device Technology Inc IDT71V508S80Y IC,SYNC SRAM,128KX8,CMOS,SOJ,44PIN,PLASTIC
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Quest Components	IDT71V508S80Y		5			1 $1.35 10 $1.242 100 $1.242 1000 $1.242 10000 $1.242	Buy Now

IDT71V508 Datasheets (2)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
IDT71V508S100Y		Integrated Device Technology	128K x 8-Bit 3.3V Synchronous SRAM With ZBT and Pipelined Output		Original	PDF
IDT71V508S80Y		Integrated Device Technology	128K x 8-Bit 3.3V Synchronous SRAM With ZBT and Pipelined Output		Original	PDF

IDT71V508 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: 128K x 8 3.3V SYNCHRONOUS SRAM WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • 128K x 8 memory configuration High speed - 100 MHz 5 ns Clock-to-Data Access Registered Output	Original	IDT71V508 44-lead IDT71V508 576-bit 71V508 SO44-1)	PDF
3589 Abstract: No abstract text available Text: 128K x 8-Bit 3.3V Synchronous SRAM With ZBT and Pipelined Output Preliminary IDT71V508 Features ◆ ◆ ◆ ◆ ◆ ◆ ◆ Addresses and control signals are applied to the SRAM during one clock cycle, and two clock cycles later its associated data cycle occurs, be	Original	IDT71V508 IDT71V508 71V508 SO44-1) x4033 3589	PDF
Untitled Abstract: No abstract text available Text: 128K x 8 3.3V SYNCHRONOUS SRAM WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • 128K x 8 memory configuration High speed - 100 MHz 5 ns Clock-to-Data Access Registered Output	Original	IDT71V508 44-lead IDT71V508 576-bit 71V508 SO44-1)	PDF
Untitled Abstract: No abstract text available Text: 128K x 8 3.3V SYNCHRONOUS SRAM LATE WRITE WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • 128K x 8 memory configuration High speed - 100 MHz 5 ns Clock-to-Data Access Registered Output	Original	IDT71V508 44-lead IDT71V508 576-bit T71V508 71V508 SO44-1)	PDF
Untitled Abstract: No abstract text available Text: 128K x 8 3.3V SYNCHRONOUS SRAM LATE WRITE WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • during one clock cycle, and two clock cycles later its associated data cycle occurs, be it read or write.	Original	IDT71V508 IDT71V508 pendin71V508 71V508 SO44-1)	PDF
Untitled Abstract: No abstract text available Text: N E W S R E L E A S E FOR IMMEDIATE RELEASE FOR FURTHER INFORMATION: Julie Cline, Corporate Communications Program Manager Bill Franciscovich, SRAM Marketing Director 408 654-6464 (408) 754-4605 IDT INTRODUCES THE INDUSTRY’S HIGHEST PERFORMING 3.3-VOLT SYNCHRONOUS MEGABIT SRAM	Original	1996--Integrated IDT71V508,	PDF
idt74fct88915 Abstract: Integrated Device Technology Text: Integrated Device Technology IDT IDT ATM ATM Switching Switching Cost Effective Solutions Integrated Device Technology 1 1 Integrated Device Technology 88 Port Port 1.24 1.24 Gbps Gbps Switch Switch Integrated Device Technology 2 2 Integrated Device Technology	Original	155Mbps IDTV546 IDT71V546 idt74fct88915 Integrated Device Technology	PDF
SRAM 6116 Abstract: PBSRAM IDT71V432 Text: APPLICATION NOTE AN-163 ZBT ZERO-BUS TURNAROUND™ SYNCHRONOUS SRAM ARCHITECTURE Integrated Device Technology, Inc. INTRODUCTION This application note introduces an exciting new concept in Synchronous SRAM: Zero Bus Turnaround™ (ZBT™) performance, incorporated into IDT’s new family of Synchronous,	Original	AN-163 IDT71V508 IDT71V508 1-800-9-IDT-FAX) SRAM 6116 PBSRAM IDT71V432	PDF
20287 Abstract: No abstract text available Text: 128K x 8 3.3V SYNCHRONOUS SRAM WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 In te g ra te d D e v iz e T e c h n o lo g y , l i e . FEATURES: • • • • • • • 128K x 8 memory configuration High speed - 1 0 0 MHz 5 ns Clock-to-Data Access	OCR Scan	IDT71V508 44-lead IDT71V508 576-bit MO-061, S5771 20287	PDF
Untitled Abstract: No abstract text available Text: 128K x 8 3.3V SYNCHRON OUS SRAM WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • 128Kx 8 memory configuration High speed -1 2 0 MHz 4.5 ns Clock-to-Data Access Registered Output	OCR Scan	IDT71V508 128Kx 44-lead IDT71V508 576-bit MO-061, S5771	PDF
Untitled Abstract: No abstract text available Text: 128K x 8 3.3V SYNCHRONOUS SRAM LATE WRITE WITH ZBT AND PIPELINED OUTPUT PRELIMINARY IDT71V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • 128K x 8 memory configuration High speed -100 MHz 5 ns Clock-to-Data Access Registered Output	OCR Scan	IDT71V508 44-lead IDT71V508 576-bit 4A2S771 71V508 PS771 002270S S044-1)	PDF
Untitled Abstract: No abstract text available Text: 128K x 8 3.3V S Y N C H R O N O U S SRAM WITH ZBT AND PIP EL INED O U T P U T PRELIMINARY IDT71 V508 Integrated Device Technology, Inc. FEATURES: • • • • • • • 128K x 8 memory configuration High speed - 100 MHz 5 ns Clock-to-Data Access	OCR Scan	IDT71 44-lead IDT71V508 71V508	PDF