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    IDLN100D10

    Abstract: ISO14000 100D10 pepi c ISO-14000 VTN100D10 zarlink PACKING 50x-2 Zarlink CROSS analog devices 0.8 -2.0um CMOS
    Text: 2.0 µm 5V/40V Analog CMOS Process Parameters Technology outline • • • • • • • • Standard 5V control logic 40V transistors Epi wafers Thick gate oxide State of the art double metal technology [Ti/TiN/Al/TiN sandwich] Single or double poly Hi-res poly option [10kΩ/ ]


    Original     		PDF V/40V IDLN100D10 ISO14000 100D10 pepi c ISO-14000 VTN100D10 zarlink PACKING 50x-2 Zarlink CROSS analog devices 0.8 -2.0um CMOS