74HC74
Abstract: 74hct74 74LS74 pinout 74HC74 pin configuration 74hc74 pin diagram TTL 74hc74 74ls74 timing setup hold Current 74HCT74 QQ042 000M2AA
Text: GD54/74HC74, GD54/74HCT74 DUAL D-TYPE FLIP-FLOPS WITH PRESET & CLEAR G e n era l D escrip tio n These devices are identical in pinout to the 5 4 /7 4 L S 7 4 . They consist of two D-type flip-flops with individual preset, clear, and clock inputs. Infor Pin C o n fig u ra tio n
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GD54/74HC74,
GD54/74HCT74
54/74LS74.
00042T1
402A757
DQ042T2
74HC74
74hct74
74LS74 pinout
74HC74 pin configuration
74hc74 pin diagram
TTL 74hc74
74ls74 timing setup hold
Current 74HCT74
QQ042
000M2AA
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Untitled
Abstract: No abstract text available
Text: GD54/74HC191, GD54/74HCT191 SYNCHRONOUS 4-BIT BINARY UP-DOWN COUNTER WITH MODE CONTROL General Description These d e vices are identical in pinout to the 5 4 /7 4 L S 1 9 1 . This synch ron ous, reversible, 4-B it binary up/down counter can be preset by applying the
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GD54/74HC191,
GD54/74HCT191
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Untitled
Abstract: No abstract text available
Text: GD54/74HC423, GD54/74HCT423 DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS General Description The d e v ic e s a re id e n tic a l in p in o u t to th e Pin Configuration 5 4 / 7 4 L S 4 2 3 . T h e y c o n s is t o f tw o re trig g e ra b le m o n o s ta b le
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GD54/74HC423,
GD54/74HCT423
GD74HCT423
GD54HCT423
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Untitled
Abstract: No abstract text available
Text: GD54/74HC158, GD54/74HCT158 QUAD 2-INPUT SELECTORS/MULTIPLEXERS WITH INVERTED OUTPUT General Description These devices are identical in pinout to the 5 4 /7 4 L S 1 5 8 . They consist of four 2-Input multiplex ers with com m on select and enable inputs, and in
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GD54/74HC158,
GD54/74HCT158
GD74HCT1
GD54HCT158
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Untitled
Abstract: No abstract text available
Text: GD54/74HC280, GD54/74HCT280 9-BIT EVEN/ODD PARITY GENERATOR/CHECKER General Description These devices are identical in pinout to the 5 4 /7 4 L S 2 8 0 . They contain 9-bit inputs and 2 out puts even and odd parities to facilitate operation of Pin Configuration
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GD54/74HC280,
GD54/74HCT280
GD74HCT280
GD54HCT280
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GD74HC20
Abstract: GD74HCT20
Text: GD54/74HC20, GD54/74HCT20 DUAL 4-INPUT NAND GATES General Description These devices Pin Configuration are identical in pinout to the 5 4 /7 4 L S 2 0 . They contain two independent 4 -input NAND gates. These devices are characteriz ed for operation over wide temperature ranges to
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GD54/74HC20,
GD54/74HCT20
20/uA
GD74HCT20
GD54HCT20
GD74HC20
GD74HCT20
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CD74HC14
Abstract: CD74HCT14E cd74HCT14 harris
Text: {SJ HARRIS CD74HC14, CD74HCT14 S E M I C O N D U C T O R High Speed CMOS Logic January 1998 H ex In vertin g S c h m itt T rig g e r Features • Description The Harris CD74HC14, CD74HCT14 each inverting Schmitt Triggers in one package. U n lim ited Inp u t R ise and Fall T im e s
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CD74HC14,
CD74HCT14
CD74HCT14
CD74HC14
CD74HCT14E
cd74HCT14 harris
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74HCT298
Abstract: 74HC GD54HC298 GD74HC298 74HC298
Text: GD54/74HC298, GD54/74HCT298 QUAD 2-INPUT MULTIPLEXERS WITH OUTPUT LATCH General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 2 9 8 . They select one of two 4-bit words to be stored in the output latch according to clock
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GD54/74HC298,
GD54/74HCT298
54/74LS298.
74HCT298
74HC
GD54HC298
GD74HC298
74HC298
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Untitled
Abstract: No abstract text available
Text: GD54/74HC173, GD54/74HCT173 QUAD 3-STATE D-TYPE FLIP-FLOPS WITH COMMON CLOCK & CLEAR General Description These d evices are identical in pinout to the Pin Configuration 5 4 /7 4 L S 1 7 3 . T h e y consist o f four D -type flip-flops operating synchronously from a com m on C lo ck
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GD54/74HC173,
GD54/74HCT173
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74HC09
Abstract: No abstract text available
Text: GD54/74HC09, GD54/74HCT09 QUAD 2-INPUT AND GATES WITH OPEN-DRAIN OUTPUTS General Description These devices are identical in pinout to the 5 4 /7 4 L S 0 9 . They contain four independent 2-Input AND gates. The open-drain outputs require pull-up resistors to perform correctly. With suitable pull-up
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GD54/74HC09,
GD54/74HCT09
GD74HCT09
GD54HCT09
74HC09
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Untitled
Abstract: No abstract text available
Text: GD54/74HC139, GD54/74HCT139 DUAL 2-TO-4 LINE DECODER/DEMULTIPLEXER General Description These devices are identical in pinout to the 54/74L S 1 39. They contain two independent 1-of-4 decoders each with a single active-low enable in put. Each circuit decodes a 2-bit address to 1 -of-4
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GD54/74HC139,
GD54/74HCT139
54/74L
GD74HCT139
GD54HCT139
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ic 74 hc 10
Abstract: No abstract text available
Text: GD54/74HC74, GD54/74HCT74 DUAL D-TYPE FLIP-FLOPS WITH PRESET & CLEAR General Description These devices are identical in pinout to the 5 4 /7 4 L S 7 4 . They consist of two D-type flip-flops with individual preset, clear, and clock inputs. Infor mation at a D-input is transferred to the correspon
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GD54/74HC74,
GD54/74HCT74
ic 74 hc 10
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GD74HC160
Abstract: No abstract text available
Text: GD54/74HC160, GD54/74HCT160 SYNCHRONOUS DECADE COUNTER WITH ASYNCHRONOUS CLEAR General Description Pin Configuration These d e vice s are identical in pinout to the 5 4 /7 4 L S 1 6 0 . T hey contain a 4 -b it decade co u n te r con sistin g o f fou r flip-flops. All flip-flops are c lo c k
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GD54/74HC160,
GD54/74HCT160
GD74HC160
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74LS32 configuration
Abstract: 74hc32 GD74HC32 74LS32 Quad 2-Input OR Gate 74HC logic symbol 74LS32 pin configuration logic symbol 74LS32 74HC LOGIC PINOUT 74LS32 pinout
Text: GD54/74HC32, GD54/74HCT32 QUAD 2-INPUT OR GATES General Description These devices are identical in pinout to the 5 4 /7 4 L S 3 2 . They contain four independent 2-input OR gates. These devices are characterized for operation over wide temperature ranges to meet in
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GD54/74HC32,
GD54/74HCT32
54/74LS32.
GD74HCT32
74LS32 configuration
74hc32
GD74HC32
74LS32 Quad 2-Input OR Gate
74HC
logic symbol 74LS32
pin configuration logic symbol 74LS32
74HC LOGIC PINOUT
74LS32 pinout
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GD74HC174
Abstract: 74HC
Text: GD54/74HC174, GD54/74HCTI74 HEX D-TYPE FLIP-FLOPS WITH COMMON CLOCK & CLEAR General Description Pin Configuration com m on clock and clear inputs. Data on the D in puts having the specified setup and hold tim es are transferred to the outputs on the rising ed g e of the
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GD54/74HC174,
GD54/74HCT174
54/74LS1
GD74HC174
74HC
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74hc157
Abstract: 74hct157
Text: GD54/74HC157, GD54/74HCT157 QUAD 2-INPUT SELECTORS/MULTIPLEXERS WITH NONINVERTED OUTPUT General Description T h ese devices are identical in pinout to the Pin Configuration 5 4 /7 4 L S 1 5 7 . They consist of four 2-input multiplex ers with com m on se lec t and enable inputs, and
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GD54/74HC157,
GD54/74HCT157
54/74LS157.
74hc157
74hct157
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74HCT133
Abstract: 74HC133 74HC GD74HC133 TTL 74ls133 PIN CONFIGURATION OF 74LS133
Text: GD54/74HC133, GD54/74HCT133 13-INPUT NAND GATE General Description These devices are identical in pinout to the 5 4 /7 4 L S 1 3 3 . They contain a single 13-input NAND gate. These devices are characterized for operation over wide temperature ranges to meet industry and
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GD54/74HC133,
GD54/74HCT133
13-INPUT
54/74LS133.
GD74HCT133
GD54HCT133
74HCT133
74HC133
74HC
GD74HC133
TTL 74ls133
PIN CONFIGURATION OF 74LS133
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74HC374
Abstract: 74hct374 74HC GD54HC374 GD74HC374
Text: GD54/74HC374, GD54/74HCT374 OCTAL 3-STATE NONINVERTING D-TYPE FLIP-FLOPS General Description Pin Configuration These devices are identical in pinout to the 5 4 / 7 4 L S 3 7 4 . T h e y c o n ta in e ig h t D -ty p e m aster/slave flip-flops w ith a com m on clo ck and
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GD54/74HC374,
GD54/74HCT374
54/74LS374.
4D2fl757
74HC374
74hct374
74HC
GD54HC374
GD74HC374
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74LS00 pinout
Abstract: GD74HC00 pin configuration logic symbol 74LS00 logic symbol 74LS00 74HC00 5V 74HC00 74hc00 and gates TTL 74HC00 74HC GD54HC00
Text: GDS4/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS 00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in
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GD54/74HC00,
GD54/74HCT00
54/74LS00.
GD74HCT00
GD54HCT00
74LS00 pinout
GD74HC00
pin configuration logic symbol 74LS00
logic symbol 74LS00
74HC00
5V 74HC00
74hc00 and gates
TTL 74HC00
74HC
GD54HC00
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Untitled
Abstract: No abstract text available
Text: GD54/74HC540, GD54/74HCT540 OCTAL INVERTING 3-STATE BUFFERS General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 5 4 0 . These eight inverting buffers feature two NORed active-low output enables, inverting 3-state outputs, and inputs and outputs on opposite
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GD54/74HC540,
GD54/74HCT540
GD74HCT540
GD54HCT540
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GD74HC08 gate diagram
Abstract: No abstract text available
Text: GD54/74HC08, GD54/74HCT08 QUAD 2-INPUT AND GATES General Description These devices are identical in pinout to the 5 4 /7 4 L S 0 8 . They contain four independent 2-input AND gates. These devices are characterized for operation over wide temperature ranges to meet
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GD54/74HC08,
GD54/74HCT08
GD74HCT08
GD54HCT08
GD74HC08 gate diagram
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GD74HCT93
Abstract: No abstract text available
Text: GD54/74HC93, GD54/74HCT93 4-BIT BINARY RIPPLE COUNTER General Description These devices are identical in pinout to the 5 4 /7 4 L S 9 3 . Each circuit contains a 4-bit ripple counter consisting of four master/slave flip-flops that are internally connected to provide separate divideby-two Q q output and divide-by-eight (Q 1? Q2, &
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GD54/74HC93,
GD54/74HCT93
GD74HCT93
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GD74HCT03
Abstract: GD74HC03
Text: GD54/74HC03, GD54/74HCT03 QUAD 2-INPUT NAND GATES WITH OPEN-DRAIN OUTPUTS General Description Pin Configuration These devices are identical in pinout to the 54/74LS03. They contain four independent 2-Input NAND gates. The open-drain outputs require pullup resistors to perform correctly. With suitable pullup resistors, these devices can be used in activelow wired-OR or active-high wired-AND applica
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GD54/74HC03,
GD54/74HCT03
54/74LS03.
GD74HCT03
GD53HCT03
GD74HCT03
GD74HC03
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Untitled
Abstract: No abstract text available
Text: GD54/74HC21, GD54/74HCT21 DUAL 4-INPUT AND GATES General Description These devices are identical in pinout to the Pin Configuration 5 4 /7 4 L S 2 1 . They contain two independent 4 -input AND gates. These devices are characteriz ed for operation over wide temperature ranges to
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GD54/74HC21,
GD54/74HCT21
74HCT21
GD54HCT21
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