EPM5128GM
Abstract: EPM5128GC EPM5128JC EPM5032DC EPM5128GC-1 epm5130qc EPM5130QC-2 EPM5032DC-20 EPM5032DC-15 EPM5130LC
Text: MAX 5000 Programmable Logic Device Family May 1999, ver. 5 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ Advanced Multiple Array MatriX MAX® 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
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Original
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PDF
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28-pin
100-pin
15-ns
EPM5032PC-17
EPM5032SC-15
EPM5032SC-17
EPM5032SC-20
EPM5032SC-25
EPM5032SC-15,
EPM5128GM
EPM5128GC
EPM5128JC
EPM5032DC
EPM5128GC-1
epm5130qc
EPM5130QC-2
EPM5032DC-20
EPM5032DC-15
EPM5130LC
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EPM5130
Abstract: EPM5192 EPM5064 EPM5032 EPM5032-15 EPM5064-1 EPM5128 ALTERA MAX 5000 EPM5064-2 ALTERA MAX 5000 programming
Text: MAX 5000 Programmable Logic Device Family June 1996, ver. 3 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ Advanced Multiple Array MatriX MAX 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
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Original
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PDF
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28-pin
100-pin
15-ns
EPM5192
84-Pin
EPM5130
EPM5192
EPM5064
EPM5032
EPM5032-15
EPM5064-1
EPM5128
ALTERA MAX 5000
EPM5064-2
ALTERA MAX 5000 programming
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EPM5130
Abstract: max 5000
Text: MAX 5000 Programmable Logic Device Family May 1999, ver. 5 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ Advanced Multiple Array MatriX MAX® 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
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Original
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PDF
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28-pin
100-pin
15-ns
84-Pin
EPM5192
EPM5130
max 5000
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Untitled
Abstract: No abstract text available
Text: MAX 5000 Programmable Logic Device Family January 1998, ver. 4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ Advanced Multiple Array MatriX MAX® 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
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Original
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PDF
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28-pin
100-pin
15-ns
EPM5192
84-Pin
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EPM5130
Abstract: L9116 EPM5064 EPM5032 EPM5032-15 EPM5064-1 EPM5128 EPM5192 epm5130g EPM5032-2
Text: MAX 5000 Programmable Logic Device Family June 1996, ver. 3 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ Advanced Multiple Array MatriX MAX 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
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Original
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PDF
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28-pin
100-pin
15-ns
EPM5192
84-Pin
EPM5130
L9116
EPM5064
EPM5032
EPM5032-15
EPM5064-1
EPM5128
EPM5192
epm5130g
EPM5032-2
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Altera EPM5128
Abstract: K941 EPM5128 K1188 L883 Altera 48-macrocell application 74series
Text: EPM 5128 EPLD Figure 14. EPM5128 Package Pin-Out Diagrams Package outlines no t drawn to scale. See Tables 4 and 5 in this data sheet fo r pin-out information. Windows in ceramic packages only. . nn n nnn n nnnnnnnnnn I/O C I/O c 3 I'O 3 i/o I/o c I/o c □ I/O
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OCR Scan
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PDF
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EPM5128
128-macrocell,
68-pin
D5T5375
C00M537
Altera EPM5128
K941
K1188
L883
Altera 48-macrocell application
74series
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Altera EPM5128
Abstract: EPM5128 EPM5128-1 K941 DSTS372 EPM5128-2 EPM5128A-15 EPM5128A-20 K1188
Text: EPM5128 EPLD Figure 14. EPM5128 Package Pin-Out Diagrams Package outlines no t drawn to scale. See Tables 4 and 5 in this data sheet fo r pin-out information. Windows in ceramic packages only. . n n n n nn n n n n n nnn nn n I/O C I/O c 3 I'O □ I/O □ i/o
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OCR Scan
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PDF
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EPM5128
128-macrocell,
68-pin
Diag68
05T5375
Altera EPM5128
EPM5128-1
K941
DSTS372
EPM5128-2
EPM5128A-15
EPM5128A-20
K1188
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51h11
Abstract: C1058
Text: EPM 5128 E PLD Features • ■ ■ ■ ■ ■ Figure 14. EPM5128 Package Pin-Out Diagrams Package outlines not drawn to scale. See Tables 4 and 5 in this data sheet fo r pin-out information. Windows in ceramic packages only. , nnnnnnnnnnnnnnnnn i/o c I/O c
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OCR Scan
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PDF
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128-macrocell,
68-pin
EPM5128
GDM237
51h11
C1058
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Altera EPM5128
Abstract: KX-K 8.0 MHz
Text: EPM 5128 EPLD Features • ■ High-density, 128-m acrocell, general-purpose MAX 5000 EPLD High-speed m ulti-LAB architecture tpD as fast as 15 ns Counter frequencies up to 83.3 MHz Pipelined data rates up to 100 MHz 256 shareable expander product terms “expanders" allow ing over
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OCR Scan
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PDF
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128-m
68-pin
EPM5128
Packa307
Altera EPM5128
KX-K 8.0 MHz
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7400 series TTL pinouts
Abstract: EPLD 5128
Text: EPM 5128 EPLD Features □ □ High-density 128-macrocell general-purpose M AX 5000 EPLD 256 shareable expander product terms that allow over 32 product terms in a single macrocell High-speed multi-LAB architecture tPD as fast as 25 ns Counter frequencies up to 50 MHz
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OCR Scan
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PDF
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128-macrocell
68-pin
5000-family
7400 series TTL pinouts
EPLD 5128
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EPM5130
Abstract: No abstract text available
Text: MAX 5000 Programmable Logic Device Family January 1998. ver. 4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ Advanced Multiple Array M atrix MAX® 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
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OCR Scan
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PDF
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28-pin
100-pin
15-ns
EPM5130
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epm5064
Abstract: EPM5130 EPM5128 APPLICATION NOTE CERAMIC CHIP CARRIER LCC 68 socket EPM5130 adapter
Text: MAX 5000 Programmable Logic Device Family May 1999, ver. 5 F e a tu r e s. Data Sheet * • ■ ■ ■ ■ ■ ■ ■ Advanced Multiple Array Matrix MAX 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
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OCR Scan
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PDF
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28-pin
100-pin
15-ns
84-Pin
EPM5192
epm5064
EPM5130
EPM5128 APPLICATION NOTE
CERAMIC CHIP CARRIER LCC 68 socket
EPM5130 adapter
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epm5130
Abstract: EPM5064 PQFP 176 J-Lead tnand 4536C EPM5032 max ALTERA MAX 5000 programming epm5032 max5000 EPM5128 APPLICATION NOTE
Text: MAX 5000 Programmable Logic Device Family Data Sheet Features. • ■ ■ ■ ■ ■ ■ ■ Advanced Multiple Array MatriX MAX® 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays Complete family of high-performance, erasable CMOS EPROM
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OCR Scan
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PDF
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28-pin
100-pin
15-ns
EPM5192
84-Pin
84-Pin
epm5130
EPM5064
PQFP 176 J-Lead
tnand
4536C
EPM5032 max
ALTERA MAX 5000 programming
epm5032
max5000
EPM5128 APPLICATION NOTE
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EPM5130
Abstract: No abstract text available
Text: A L TE RA CORP □5*15372 0 0 D 2 1 4 2 4bT « A L T 47E D 'P f D - 0 l EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from
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OCR Scan
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PDF
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EPM5016
EPM5192
20-pin
100-pin
15-ns
EPM5130
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EPM5130
Abstract: J-Lead, EPM5128 APPLICATION NOTE ALTERA MAX 5000 MAX5000 macrocell Altera EPM5128 EPM5064-1
Text: MAX 5000 M M M & Programmable Logic Device Family , J a n u a r y 1 9 9 8 . v e r. 4 F e a tu re s . D a ta S h e e t m • ■ ■ Table 1. MAX5000 Device Features EPM5032 EPM5064 EPM5128 EPM5130 EPM5192 Usable gates 600 1,250 2,500 2,500 3,750 Macrocells
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OCR Scan
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5000architecture
28-pin
100-pin
15-ns
84-Pin
EPM5192
EPM5130
J-Lead,
EPM5128 APPLICATION NOTE
ALTERA MAX 5000
MAX5000 macrocell
Altera EPM5128
EPM5064-1
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EPM5130
Abstract: EPM5064 MC3334 44 pin plcc socket program EPM5032 EPMS128 EPM5064-1
Text: MAX 5000 Programmable Logic Device Family Jan ua ry 1998. ver. 4 F e a tu r e s . Data S heet • ■ ■ ■ ■ ■ ■ ■ Advanced M ultiple A rray MatriX MAX® 5000 architecture combining speed and ease-of-use of PAL devices w ith the density of
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OCR Scan
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PDF
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28-pin
100-pin
15-ns
EPM5192
84-Pin
EPM5130
EPM5064
MC3334
44 pin plcc socket
program EPM5032
EPMS128
EPM5064-1
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Untitled
Abstract: No abstract text available
Text: MAX 5000 Programmable Logic Device Family June 1996, ver. 3 F e a tu re s. Data Sheet * • ■ ■ ■ ■ ■ ■ ■ Advanced Multiple Array Matrix MAX 5000 architecture combining speed and ease-of-use of PAL devices with the density of programmable gate arrays
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OCR Scan
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PDF
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28-pin
100-pin
15-ns
84-Pin
000500b
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EPM5130
Abstract: EPM5016
Text: E P M 5016 to E P M 5192 E PLD s High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals.
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OCR Scan
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PDF
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20-pin
100-pin
15-ns
EPM5130
EPM5016
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74series
Abstract: Altera EPM5128
Text: ALTERA CORP bflE D m 05^5372 DG03321 MIM H A L T EPM 5128A EPLD Features □ High-density, second-generation MAX 5000 EPLD developed on an advanced 0.65-micron CMOS EPROM process Higher-speed upgrade for existing EPM5128 designs High-speed multi-LAB architecture
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OCR Scan
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PDF
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DG03321
65-micron
EPM5128
74-series
68-pin
MIL-STD-883-Compliant
74series
Altera EPM5128
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EPM5130
Abstract: program EPM5032
Text: MAX 5000 M UM Programmable Logic Device Family May 1999. ver. Features. • ■ ■ ■ ■ ■ ■ ■ Advanced M ultiple A rray M atriX MAX® 5000 architecture com bining speed and ease-of-use of PAL devices w ith the density of program m able gate arrays
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OCR Scan
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PDF
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28-pin
100-pin
15-ns
84-Pin
EPM5192
EPM5130
program EPM5032
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L9132
Abstract: EPM5130 altera 5032 EPLD 5128 EPM5192
Text: MAX 5000 Programmable Logic Device Family Features. A d v a n c e d M u ltip le A rra y M atriX MAX 5000 a rc h ite c tu re c o m b in in g s p e e d a n d ease-o f-u se of PA L d ev ices w ith th e d e n s ity of p ro g ra m m a b le g a te a rra y s
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OCR Scan
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PDF
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28-pin
100-pin
15-ns
pack24
EPM51921/0
84-Pin
L9132
EPM5130
altera 5032
EPLD 5128
EPM5192
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EP1800I
Abstract: 8946801XC epm5130 epx780 EPX740 EP224 Altera EP1800i
Text: Component Selection Guide March 1995, ver. 2 Introduction Data Sheet This selection guide lists devices available from Altera: • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ FLEX 10K devices FLEX 8000 devices Configuration EPROM devices MAX 9000 devices
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OCR Scan
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PDF
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7000S
EP1800I
8946801XC
epm5130
epx780
EPX740
EP224
Altera EP1800i
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F1G21
Abstract: EPM5130
Text: M A X 5000 Programmable Logic Device Family June 1996, ver. 3 Fe a tu re s . Data Sheet • ■ ■ ■ ■ ■ ■ ■ A d v a n c e d M u ltip le A rra y M a trix MAX 5000 a rc h ite c tu re c o m b in in g sp e e d a n d ease-o f-u se o f PA L d ev ic e s w ith th e d e n s ity o f
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OCR Scan
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PDF
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100-pin
15-ns
EPM5192
84-Pin
F1G21
EPM5130
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J-Lead, QFP ceramic
Abstract: IC 7400 SERIES book EPM 5192
Text: M A X 5000 Programmable Logic Device Family March 1995, ver. 2 Features. D a ta she et • ■ ■ ■ ■ ■ ■ Advanced M ultiple Array M atrix MAX 5000 architecture com bining speed and ease-of-use of PAL devices w ith density of program m able gate arrays
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OCR Scan
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PDF
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28-pin
100-pin
10-ns
125-MHz
J-Lead, QFP ceramic
IC 7400 SERIES book
EPM 5192
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