ECOC2009 Search Results

MEGTRON 6

Abstract: CEI-11G ADC digital calibration time interleaved 56Gs ADC 30Ghz Fujitsu Batboard VLSI datasheet for DAC and ADC otu 4 MEGTRON VLSI for DAC and ADC
Text: Reality Check: Challenges of mixed-signal VLSI design for high-speed optical communications Mixed-signal VLSI for 100G and beyond  100G optical transport system  Why single-chip CMOS?  So what is so difficult ?  CHAIS ADC  On-chip noise coupling