Untitled
Abstract: No abstract text available
Text: Fe a t u re Sh e e t AMIS-52100 Low Power Transceiver With Clock and Data Recovery - A M I S AMI Semiconductor AMIS-52100 Low Power Transceiver With Clock and Data Recovery Key Features • Very low power single-chip transceiver • Clock and data recovery
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AMIS-52100
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Untitled
Abstract: No abstract text available
Text: BCM8711 PRODUCT Brief 10GE 1:16 DEMULTIPLEXER WITH CLOCK AND DATA RECOVERY B C M 8 7 1 1 S U M M A R Y F E AT U R E S • IEEE 802.3ae 10.3125-Gbps Ethernet deserializer with clock and data recovery CDR and demultiplexer (DEMUX) • 1:16 demultiplexer with LVDS 644.55-Mbps data outputs
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BCM8711
3125-Gbps
55-Mbps
16-bit
8711-PB03-R-06
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Clock and Data Recovery
Abstract: BCM8710 BCM8711
Text: BCM8711 PRODUCT Brief 10GE 1:16 DEMULTIPLEXER WITH CLOCK AND DATA RECOVERY B C M 8 7 1 1 S U M M A R Y F E AT U R E S • IEEE 802.3ae 10.3125-Gbps Ethernet deserializer with clock and data recovery CDR and demultiplexer (DEMUX) O F B E N E F I T S Compliant with the Optical Internetworking Forum
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BCM8711
3125-Gbps
55-Mbps
BCM8711
16-bit
8711-PB02-R-4
Clock and Data Recovery
BCM8710
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specifications for oc-48 of edfa amplifier
Abstract: sis 650 MAX3745 MAX3861 MAX3872 MAX3872EGJ OC-24
Text: 19-2709; Rev 0; 1/03 KIT ATION EVALU E L B A IL AVA Multirate Clock and Data Recovery with Limiting Amplifier Features The MAX3872 is a compact, multirate clock and data recovery with limiting amplifier for OC-3, OC-12, OC-24, OC-48, OC-48 with FEC SONET/SDH and Gigabit
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MAX3872
OC-12,
OC-24,
OC-48,
OC-48
25Gbps/2
MAX3872
specifications for oc-48 of edfa amplifier
sis 650
MAX3745
MAX3861
MAX3872EGJ
OC-24
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sis 650
Abstract: MAX3745 MAX3861 MAX3872 MAX3872EGJ OC-24
Text: 19-2709; Rev 1; 5/03 KIT ATION EVALU E L B A IL AVA Multirate Clock and Data Recovery with Limiting Amplifier Features The MAX3872 is a compact, multirate clock and data recovery with limiting amplifier for OC-3, OC-12, OC-24, OC-48, OC-48 with FEC SONET/SDH and Gigabit
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MAX3872
OC-12,
OC-24,
OC-48,
OC-48
25Gbps/2
MAX3872
sis 650
MAX3745
MAX3861
MAX3872EGJ
OC-24
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ETF-8103
Abstract: TQ8103 TQ8103-Q TQ8105 passive loopthrough
Text: R I Q U I N T S E M I C O N D U C T O R, I N C . The TQ8103 is a monolithic clock and data recovery CDR IC that receives NRZ data, extracts the high-speed clock, and presents the separated data and clock as its outputs. This device is designed specifically for SONET
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TQ8103
OC-12
ETF-8103
TQ8103-Q
TQ8105
passive loopthrough
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Untitled
Abstract: No abstract text available
Text: 19-2710; Rev 4; 7/06 KIT ATION EVALU E L B A AVAIL 2.488Gbps/2.667Gbps Clock and Data Recovery with Limiting Amplifier Features ♦ 2.488Gbps and 2.667Gbps Input Data Rates ♦ Reference Clock Not Required for Data Acquisition ♦ Exceeds ANSI, ITU, and Bellcore SONET/SDH
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488Gbps/2
667Gbps
488Gbps
10mVP-P
65UIP-P
170mV
32-Pin
MAX3874
T3255
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SIS 650
Abstract: specifications for oc-48 of edfa amplifier G3255 MAX3745 MAX3874 MAX3874AEGJ MAX3874EGJ
Text: 19-2710; Rev 4; 7/06 KIT ATION EVALU E L B A AVAIL 2.488Gbps/2.667Gbps Clock and Data Recovery with Limiting Amplifier Features ♦ 2.488Gbps and 2.667Gbps Input Data Rates ♦ Reference Clock Not Required for Data Acquisition ♦ Exceeds ANSI, ITU, and Bellcore SONET/SDH
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488Gbps/2
667Gbps
488Gbps
10mVP-P
MAX3874
OC-48
OC-48
MAX3745
MAX3874
SIS 650
specifications for oc-48 of edfa amplifier
G3255
MAX3874AEGJ
MAX3874EGJ
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BCM8120
Abstract: BCM8121
Text: BCM8121 PRODUCT Brief MULTI-RATE 10 Gbps 1:16 DEMULTIPLEXER WITH CDR B C M 8 1 2 1 S U M M A R Y F E AT U R E S • Fully integrated multi-rate clock and data recovery CDR and demultiplexer (DEMUX) • 1:16 DEMUX with LVDS parallel data and clock outputs
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BCM8121
120-pin
compliance802
16-bit
BCM8121
8121-PB03-R-4
BCM8120
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Untitled
Abstract: No abstract text available
Text: BCM8121 PRODUCT Brief MULTI-RATE 10 Gbps 1:16 DEMULTIPLEXER WITH CDR B C M 8 1 2 1 S U M M A R Y F E AT U R E S • Fully integrated multi-rate clock and data recovery CDR and demultiplexer (DEMUX) • 1:16 DEMUX with LVDS parallel data and clock outputs
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BCM8121
120-pin
16-bit
8121-PB04-R-06
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CAZ MARKING
Abstract: sis 315 MAX3745 MAX3874 MAX3874AEGJ MAX3874EGJ T2055-4
Text: 19-2710; Rev 3; 1/05 KIT ATION EVALU E L B A IL AVA 2.488Gbps/2.667Gbps Clock and Data Recovery with Limiting Amplifier Features ♦ 2.488Gbps and 2.667Gbps Input Data Rates ♦ Reference Clock Not Required for Data Acquisition ♦ Exceeds ANSI, ITU, and Bellcore SONET/SDH
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488Gbps/2
667Gbps
488Gbps
MAX3874
OC-48
OC-48
T2855-6.
CAZ MARKING
sis 315
MAX3745
MAX3874AEGJ
MAX3874EGJ
T2055-4
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GR-1377-CORE
Abstract: Si5364 Si5530 STM-64 K810
Text: Si5530 P R E L I M I N A R Y D A TA S H E E T SiPHY OC-192/STM-64 SONET/SDH R ECEIVER Features Complete low power, high speed, receiver with integrated limiting amplifier, clock and data recovery CDR , and 1:16 demultiplexer: Data Rates Supported: OC-192/
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Si5530
OC-192/STM-64
OC-192/
STM-64,
10GbE,
99-Pin
Si5364
GR-1377-CORE
Si5364
Si5530
STM-64
K810
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21050-BRF-001-B
Abstract: M21050 PRBS 223-1
Text: Duplex Quad Octal Multi-Rate CDR with Amplif-Eye (1.0 Gbps - 3.2 Gbps) M21050 The M21050 is a high-performance duplex quad (octal) > K E Y F E AT U R E S multi-rate clock and data recovery (CDR) array, optimized for multi-lane telecom and datacom applications.
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M21050
M21050
72-terminal,
21050-BRF-001-B
PRBS 223-1
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M21050
Abstract: No abstract text available
Text: Duplex Quad Octal Multi-Rate CDR with Amplif-Eye (1.0 Gbps - 3.2 Gbps) M21050 The M21050 is a high-performance duplex quad (octal) > K E Y F E AT U R E S multi-rate clock and data recovery (CDR) array, optimized for multi-lane telecom and datacom applications.
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M21050
M21050
72-terminal,
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M21001
Abstract: No abstract text available
Text: Quad Multi-Rate CDR with Amplif-Eye 42 Mbps–800 Mbps M21001 The M21001 is a high-performance quad multi-rate > K E Y F E AT U R E S clock and data recovery (CDR) array, optimized for > Four independent multi-rate CDRs running between 42Mbps-800Mbps
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M21001
M21001
42Mbps-800Mbps
OptiM03-0801
72-terminal,
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g 995
Abstract: FOA21002A1 FOA41001B1 FOA41002B1 FOA51001B1 FOA51002B1 fifo ttl 8 bit ttl mux foa3100
Text: P R O D U C T B R I E F Semiconductor Solutions for High Speed Communication and Fiber Optic Applications FOA41001B1 16:1 Multiplexer with Clock Multiplication Unit Chip MUX 9.95 - 10.7 Gbit/s, 3.3 to 5.0 V FOA51001B1 1:16 Demultiplexer with Clock and Data Recovery Chip
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FOA41001B1
FOA51001B1
OIF99
OC-192
B168-H7715-X-X-7600
g 995
FOA21002A1
FOA41002B1
FOA51002B1
fifo ttl
8 bit ttl mux
foa3100
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dell monitor circuit diagram
Abstract: DVI TMDS PCB design guidelines dell 2000fp monitor Dell 2000fp ISL54105 ISL54105A ISL54105CRZ TB379 DVI RECEIVER PCB design guidelines
Text: ISL54105 Key Features S DESIGN W E N R O NDED F COMME E ISL54105A E R T O N Data Sheet SEE T H June 11, 2008 FN6723.0 TMDS Regenerator Features The ISL54105 is a high-performance TMDS timing regenerator containing a programmable equalizer and a clock data recovery CDR function for each of the 3 TMDS
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ISL54105
FN6723
ISL54105
JESD-MO220.
dell monitor circuit diagram
DVI TMDS PCB design guidelines
dell 2000fp
monitor Dell 2000fp
ISL54105A
ISL54105CRZ
TB379
DVI RECEIVER PCB design guidelines
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CX20462
Abstract: CX20464
Text: A CONEXANT BUSINESS 3.2 Gbps Quad Clock and Data Recovery CX20464 The CX20464 is used to retime signals in large switch > K E Y F E AT U R E S matrices. CDRs are critical elements in the SONET/SDH > Low-power 3.3 V and 2.5 V > SmartCenter™ CDR operation (power dissipation
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CX20464
CX20464
OC-48
196-pin
CX20462
CX20472
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TA8101
Abstract: TA8105 passive loopthrough PS 224 ETF-8103 TQ8103 TQ8103-Q TQ8105
Text: J R I Q li I N T S E M I C O N D U C T O R , I N C 7PS1 The TQ8103 is a monolithic clock and data recovery CDR IC that receives TQ8103 NRZ data, extracts the high-speed clock, and presents the separated data and clock as its outputs. This device is designed specifically for SONET
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TQ8103
OC-12
TA8101
TA8105
passive loopthrough
PS 224
ETF-8103
TQ8103-Q
TQ8105
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flip-flop
Abstract: No abstract text available
Text: Data Sheet February 1997 m i c r o e l e c t r o n i c s group Lucent Technologies Bell Labs Innovations LG1600FXH Clock and Data Regenerator Features • Integrated clock recovery and data retiming ■ Surface-mount package ■ Single ECL supply ■ Robust FPLL design
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OCR Scan
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LG1600FXH
OC-12
OC-96/STM-4
STM-32
LG1600FXH2433
LG1600FXH2488
LG1600FXH2666
LG1600FXH2949
LG1600FXH3111
flip-flop
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regenerator
Abstract: LG1600AXD LG1600FXH LG1600FXH0553 LG1600FXH0622 LG1600FXH2488 LG1605DXB TF1004A
Text: Data Sheet February 1997 m i c r o e l e c t r o n i c s group Lucent Technologies Bell Labs Innovations LG1600FXH Clock and Data Regenerator Features • Integrated clock recovery and data retiming ■ Surface-mount package ■ Single ECL supply ■ Robust FPLL design
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LG1600FXH
OC-12
OC-96/STM-4
STM-32
LG1600FXH1555
LG1600FXH2380
LG1600FXH2433
LG1600FXH2488
LG1600FXH2666
regenerator
LG1600AXD
LG1600FXH0553
LG1600FXH0622
LG1605DXB
TF1004A
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Untitled
Abstract: No abstract text available
Text: Data Sheet June 1999 m ic r o e le c t r o n ic s group Lucent Technologies Bell Labs Innovations LG1600KXH Clock and Data Regenerator Features • Integrated clock recovery and data retiming ■ Surface-mount package ■ Single ECL supply ■ Robust FPLL design
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OCR Scan
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LG1600KXH
OC-12
OC-96/STM-4
STM-32
TF1004A
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Untitled
Abstract: No abstract text available
Text: p r io r it y Data Sheet February 1997 m ic r o e le c t r o n ic s group Lucent Technologies Bell Labs Innovations LG1600FXH Clock and Data Regenerator Features • Integrated clock recovery and data retiming ■ Surface-mount package ■ Single ECL supply
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OCR Scan
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LG1600FXH
LG160QFXH
OC-12
OC-96/STM-4
STM-32
DS96-237FCE
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Untitled
Abstract: No abstract text available
Text: R I 1 Q Q U & I N S E M I C O N D U C T O R , I N C T ÎI The TQ8103 is a monolithic clock and data recovery CDR IC that receives TQ8103 NRZ data, extracts the high-speed clock, and presents the separated data OC-12 and SDH STM-4 applications at 622 Mb/s.
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TQ8103
TQ8103
OC-12
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