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    D22 PACKAGE DIAGRAM Search Results

    D22 PACKAGE DIAGRAM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPH9R00CQH Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation
    TPH2R408QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance Visit Toshiba Electronic Devices & Storage Corporation
    XPH2R106NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 110 A, 0.0021 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    XPH3R206NC Toshiba Electronic Devices & Storage Corporation N-ch MOSFET, 60 V, 70 A, 0.0032 Ω@10V, SOP Advance(WF) Visit Toshiba Electronic Devices & Storage Corporation
    TPH4R008QM Toshiba Electronic Devices & Storage Corporation MOSFET, N-ch, 80 V, 86 A, 0.004 Ohm@10V, SOP Advance(N) Visit Toshiba Electronic Devices & Storage Corporation

    D22 PACKAGE DIAGRAM Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    21d10

    Abstract: D347 A1667 WE245 D1825 d2132 686 A14 a1162
    Text: Issue 5.1 May 2001 Description Block Diagram Available in PGA PUMA 2 and Gullwing (PUMA77) footprints. The PUMA *FV16006 is a 3.3V 16MBit FLASH module user configurable as 512K x 32, 1M x 16 or 2M x 8. The device is available with access times of 70, 90 and 120ns.


    Original     		PUMA77) FV16006 16MBit 120ns. MIL-STD-883. 77FV16006 2FV16006AMB 21d10 D347 A1667 WE245 D1825 d2132 686 A14 a1162 PDF

    SC11

    Abstract: DSP56303 SC10 SC12 TDO 139
    Text: SECTION 3 PACKAGING PIN-OUT AND PACKAGE INFORMATION This sections provides information about the available packages for this product, including diagrams of the package pinouts and tables describing how the signals described in Section 1 are allocated for each package.


    Original     		DSP56303 144-pin 196-pin DSP56303/D SC11 SC10 SC12 TDO 139 PDF

    C185A

    Abstract: CY7C185 CY7C185A CY7C185A-15DMB
    Text: CY7C185A 8KĂxĂ8 Static RAM Features CMOS for optimum speed/power Low active power 743 mW Low standby Power 220 mW TTL Ćcompatible inputs and outputs Easy memory expansion with CE1, CE2 and OE features Automatic powerĆdown when deselected Logic Block Diagram


    Original     		CY7C185A CY7C185A 300milwide C185A CY7C185 CY7C185A-15DMB PDF

    AA0301

    Abstract: SC11 DSP56302 SC10 SC12 D-6108 D2083
    Text: SECTION 3 PACKAGING PIN-OUT AND PACKAGE INFORMATION This sections provides information about the available package for this product, including diagrams of the package pinouts and tables describing how the signals described in Section 1 are allocated. The DSP56302 is available in a144-pin Thin


    Original     		DSP56302 a144-pin DSP56302/D 144-pin AA0301 SC11 SC10 SC12 D-6108 D2083 PDF

    1010 817 D21 B

    Abstract: M68MEVB1632 A-18 D-20 ICD16 SPWM 555 DSA0039272 D44 connector 922 motorola stepper drive D28
    Text: INDEX –A– data word 4-26 I/O block diagram 4-25 interface 4-24 peripheral interface protocol SPI 4-25 sources 4-20 debugging mode freeze assertion diagram A-18 serial communication diagram A-18 timing A-18 Base ID mask bits D-90 Basic operand size 5-24


    Original     		MC68336/376 Index-17 Index-18 1010 817 D21 B M68MEVB1632 A-18 D-20 ICD16 SPWM 555 DSA0039272 D44 connector 922 motorola stepper drive D28 PDF

    D73 -Y

    Abstract: M68MEVB1632 IC 555 timer motor control 1010 817 D21 B transmitter module spwm tx - 4 A-18 D-20 555 stepper pulse generator d11 1117 d92 02
    Text: Freescale Semiconductor, Inc. INDEX Freescale Semiconductor, Inc. –A– data word 4-26 I/O block diagram 4-25 interface 4-24 peripheral interface protocol SPI 4-25 sources 4-20 debugging mode freeze assertion diagram A-18 serial communication diagram A-18


    Original     		MC68336/376 Index-17 Index-18 D73 -Y M68MEVB1632 IC 555 timer motor control 1010 817 D21 B transmitter module spwm tx - 4 A-18 D-20 555 stepper pulse generator d11 1117 d92 02 PDF

    CY7C425

    Abstract: CY7C419 CY7C420 CY7C421 CY7C429 CY7C432 CY7C433 IDT7200 MIL-STD-1835C D1256
    Text: CY7C419/21/25/29/33 256 x 9, 512 x 9, 1K x 9, 2K x 9, 4K x 9 Cascadable FIFO Features D data outputs go to the highĆimpedance state when R is HIGH. Functional Description 256 x 9, 512 x 9, 1,024 x 9, 2048 x 9, and 4096 x 9 FIFO buffer memory D D D The CY7C419, CY7C420/1, CY7C424/5,


    Original     		CY7C419/21/25/29/33 CY7C419, CY7C420/1, CY7C424/5, CY7C428/9, CY7C432/3 600mil 300mil CY7C425 CY7C419 CY7C420 CY7C421 CY7C429 CY7C432 CY7C433 IDT7200 MIL-STD-1835C D1256 PDF

    MIL-STD-1835

    Abstract: D22 PACKAGE DIAGRAM 40 PIN CERDIP D2 Package diagram D2 Package MIL-STD d 1835 D5011 cerdip cerdip 16 lead
    Text: Package Diagram Ceramic Dual-In-Line Packages 16-Lead 300-Mil CerDIP D2 MIL-STD-1835 D-2 Config. A 18-Lead (300-Mil) CerDIP D4 MIL-STD-1835 D-6 Config. A 1 Package Diagram 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D-8 Config. A 22–Lead (400–Mil) CerDIP D8


    Original     		16-Lead 300-Mil) MIL-STD-1835 18-Lead 20-Lead D22 PACKAGE DIAGRAM 40 PIN CERDIP D2 Package diagram D2 Package MIL-STD d 1835 D5011 cerdip cerdip 16 lead PDF

    MIL-STD-1835

    Abstract: sidebraze
    Text: Package Diagrams Ceramic Dual-In-Line Packages 16-Lead 300-Mil CerDIP D2 MIL-STD-1835 D-2 Config. A 51-80027 18-Lead (300-Mil) CerDIP D4 MIL-STD-1835 D-6 Config. A 51-80028 1 Package Diagrams 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D-8 Config. A 51-80029


    Original     		16-Lead 300-Mil) MIL-STD-1835 18-Lead 20-Lead 22-Lead sidebraze PDF

    80041

    Abstract: MIL-STD-1835 40 PIN CERDIP cerdip D16 PACKAGE DIAGRAM 80046 CERDIP 52 D2 Package diagram D22 PACKAGE DIAGRAM D50 transistor
    Text: Package Diagram Ceramic Dual-In-Line Packages 16-Lead 300-Mil CerDIP D2 MIL-STD-1835 D-2 Config. A 51-80027 18-Lead (300-Mil) CerDIP D4 MIL-STD-1835 D-6 Config. A 51-80028 1 Package Diagram 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D-8 Config. A 51-80029


    Original     		16-Lead 300-Mil) MIL-STD-1835 18-Lead 20-Lead 22-Lead 80041 40 PIN CERDIP cerdip D16 PACKAGE DIAGRAM 80046 CERDIP 52 D2 Package diagram D22 PACKAGE DIAGRAM D50 transistor PDF

    CY7C419

    Abstract: CY7C420 CY7C421 CY7C425 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204 7C43
    Text: fax id: 5404 /25/29/ CY7C419/21/25/29/33 256 x 9, 512 x 9, 1K x 9, 2K x 9, 4K x 9 Cascadable FIFO Features • 256 x 9, 512 x 9, 1,024 x 9, 2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of


    Original     		CY7C419/21/25/29/33 300-mil IDT7200, IDT7201, IDT7202, IDT7203, IDT7204 CY7C419 CY7C420 CY7C421 CY7C425 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204 7C43 PDF

    B 503 Potentiometers

    Abstract: 2SK2500 c420 diode CY7C425 P15 Package CY7C419 CY7C420 CY7C421 IDT7200 IDT7201
    Text: 1CY 7C41 9/ 21/2 5/2 9/ 33 CY7C419/21/25/29/3 256 x 9, 512 x 9, 1K x 9, 2K x 9, 4K x 9 Cascadable FIFO Features • 256 x 9, 512 x 9, 1,024 x 9, 2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of


    Original     		CY7C419/21/25/29/3 300-mil IDT7200, IDT7201, IDT7202, IDT7203, IDT7204 B 503 Potentiometers 2SK2500 c420 diode CY7C425 P15 Package CY7C419 CY7C420 CY7C421 IDT7200 IDT7201 PDF

    SN75LVDS81

    Abstract: SN75LVDS82 SN75LVDS85 47d-15 HP8656B DS90C582 SN75LVDS84
    Text: SN75LVDS82 FLATLINK RECEIVER SLLS259B - NOVEMBER 1996 - REVISED MAY 1997 DGG PACKAGE TOP VIEW 4:28 Data Channel Expansion at up to 227.5 Million Bytes per Second (Mbytes/s) Throughput • D22 [ 1 D23 [ 2 Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to


    OCR Scan     		SN75LVDS82 slls259b 20-Mil SN75LVDS81 SN75LVDS82 SN75LVDS85 47d-15 HP8656B DS90C582 SN75LVDS84 PDF

    11l 60 xe

    Abstract: SN75LVDS85 SN75LVDS81
    Text: SN75LVDS82 FLATLINK RECEIVER S LLS 259A - NOVEMBER 1996 - REVISED JANUARY 1997 D Û Û PACKAGE 4 : 2 8 D a t a C h a n n e l E x p a n s i o n at u p to 2 2 7 . 5 TOP V IE W M i ll i on B y t e s p e r S e c o n d ( M b y t e s / s ) Throughput • D22 [ 1


    OCR Scan     		SN75LVDS82 11l 60 xe SN75LVDS85 SN75LVDS81 PDF

    CY7C425

    Abstract: CY7C420 CY7C429-30DC CY7C42I-25JI CY7C421-40DC CY7C421 CY7C429 IDT7201 IDT7203 CY7C429-30PC
    Text: 4bE D CYPRESS SSflTbbS □007117 5 OCYP CY7C420, CY7C421 CY7C424, CY7C425 CY7C428* CY7C429 SEMICONDUCTOR CYPRESS SEMICONDUCTOR Cascadeable 512 x 9 FIFO Cascadeable IK x 9 FIFO Cascadeable 2K x 9 FIFO 'T - 'A W • TTL compatible • Three-state outputs • Pin compatible and functional


    OCR Scan     		CY7C420, CY7C421 CY7C424, CY7C425 CY7C428Â CY7C429 333-MHz 300-mil outpCY7C429 CY7C420 CY7C429-30DC CY7C42I-25JI CY7C421-40DC IDT7201 IDT7203 CY7C429-30PC PDF

    CY7C425

    Abstract: C4206 1DT7201 CY7C429-20DC CY7C420
    Text: 4b E D CYPRESS SSflTbbS □ 0 0 7 1 1 7 5 OCYP CY7C420, CY7C421 CY7C424, CY7C425 CY7C428* CY7C429 SEMICONDUCTOR CYPRESS SEMICONDUCTOR Cascadeable 512 x 9 FIFO Cascadeable IK x 9 FIFO Cascadeable 2K x 9 FIFO 'T - 'A W • TTL compatible • Three-state outputs


    OCR Scan     		CY7C420, CY7C421 CY7C424, CY7C425 CY7C428* CY7C429 T-46-35 C4206 1DT7201 CY7C429-20DC CY7C420 PDF

    CY7C425

    Abstract: 7C421 dip 28 7c424
    Text: CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 s CYPRESS SEMICONDUCTOR Cascadable 512 x 9 FIFO Cascadable IK x 9 FIFO Cascadable 2Kx 9 FIFO • Dual-port RAM cell • TTL compatible • Three-state outputs • Pin compatible and functional equivalent to IDT7201, IDT7202, and


    OCR Scan     		CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 7C421 dip 28 7c424 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 W" ‘ *K- CYPRESS SEMICONDUCTOR Features • 512 x 9,1,024 x 9,2,048 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 33.3-MHz read/write independent of depth/width


    OCR Scan     		CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 300-mil CY7C421, PDF

    CY7C429-25PC

    Abstract: CY7C420 CY7C421 CY7C425 CY7C429 IDT7201 IDT7202 IDT7203 CY7C429-30DC vcy7
    Text: bSE D • S S ö ^ b b E O O l O bB l bTD I CYPRESS SEMICONDUCTOR CYPRESS SEMICONDUCTOR ICYP CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 Cascadable 512 x 9 FIFO Cascadable lK x 9 FIFO Cascadable 2K x 9 FIFO • TTL compatible • Three-state outputs


    OCR Scan     		CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 300-miI 300-mil CY7C421, CY7C429-25PC CY7C420 IDT7201 IDT7202 IDT7203 CY7C429-30DC vcy7 PDF

    HI401

    Abstract: 7C196 CY7C194 CY7C195 CY7C196
    Text: MbE D • asaibt.2 D D O b b b M 2 n CYP CYPRESS SEMICONDUCTOR CYPRESS W SEMICONDUCTOR Features Automatic power-down when deselected Output Enable ÖE feature (7CX95 and7C196) CMOS for optimum speed/power Highspeed — t^A = 25 ns Low active power — 880 mW


    OCR Scan     		CY7C194 CY7C195 7CX95 and7C196) CY7C194, CY7C195, CY7C196 CY7C194 theCY7C196) HI401 7C196 CY7C195 PDF

    CY7C425-15JI

    Abstract: 7C419
    Text: 2 5 6 x 9 , 5 1 2 x 9 , 1K x 9, 2 K x 9 , 4 K x 9 C ascadable FIFO Features • 256 x 9,512 x 9,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent of depth/width


    OCR Scan     		300-mil IDT7200, IDT7291, IDT7202, IDT7203, IDT7204 CY7C419, CY7C420/1, CY7C424/5, CY7C425-15JI 7C419 PDF

    7C429-40DC

    Abstract: No abstract text available
    Text: CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 r^ y p p T rc c SEMICONDUCTOR Cascadeable 512 x 9 FIFO Cascadeable IK x 9 FIFO Cascadeable 2K x 9 FIFO Features • TTL compatible • 512 x 9 , 1,024 x 9 , 2,048 x 9 FIFO buffer memory • Three-state outputs


    OCR Scan     		CY7C420, CY7C421 CY7C424, CY7C425 CY7C428, CY7C429 38-00079-G 7C429-40DC PDF

    CY7C

    Abstract: 432-30D C4206 4407C
    Text: p v « *y 1 i. p X : CY7C419/21/25/29/3 - 256 x 9, 512 x 9, 1K x 9, 2K x 9, 4K x 9 Cascadable FIFO Features 256 x 9, 512 x 9, 1,024 x 9, 2048 x 9, and 4096 x 9 FIFO buffer memory Dual-port RAM cell Asynchronous read/write High-speed 50.0-M H z read/write independent of


    OCR Scan     		CY7C419/21/25/29/3 CY7C 432-30D C4206 4407C PDF

    Untitled

    Abstract: No abstract text available
    Text: I /¿0/9U Revision: August 18, 1994 CY7C419/21/25/29/33 / CYPRESS 256x9,512x9, 1K x 9, 2Kx9, 4K x 9 Cascadable FIFO Functional Description Features • 256 z 9,512 x 9 ,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write


    OCR Scan     		CY7C419/21/25/29/33 256x9 512x9, 300-mil toIDT720s. PDF