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    CMOS8 Search Results

    CMOS8 Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CMOS-8 NEL Frequency Controls 3-volt 0.50-microncmos Gate Original PDF
    CMOS8KX8-01 Integrated Circuits 64K CMOS STATIC RAM 8,192 WORD x 8 BIT Scan PDF
    CMOS8KX8-01 Integrated Circuits 64K CMOS STATIC RAM 8,192 WORD x 8 BIT Scan PDF
    CMOS8KX8-03 Integrated Circuits 64K CMOS STATIC RAM 8,192 WORD x 8 BIT Scan PDF
    CMOS8KX8-03 Integrated Circuits 64K CMOS STATIC RAM 8,192 WORD x 8 BIT Scan PDF
    CMOS-8L NEC 3-VOLT, 0.50-MICRON CMOS GATE ARRAYS Original PDF
    CMOS-8LCX NEC 3-VOLT, 0.50-MICRON CMOS GATE ARRAY Original PDF
    CMOS-8LH NEC 3.3-Volt, 0.5-Micron CMOS Gate Array Original PDF
    CMOS-8LHD NEC 3.3-Volt, 0.5-Micron CMOS Gate Array Original PDF

    CMOS8 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74F164

    Abstract: DIP14-P-300-2 TC74AC164F TC74AC164FT TC74AC164P
    Text: TC74AC164P/F/FT 東芝CMOSデジタル集積回路 シリコン モノリシック TC74AC164P,TC74AC164F,TC74AC164FT 8-Bit Shift Register S-IN, P-OUT TC74AC164 は2 層メタル、シリコンゲート CMOS 技術を用い た超高速 CMOS8 ビットシフトレジスタです。CMOS の特長である


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    PDF TC74AC164P/F/FT TC74AC164P TC74AC164F TC74AC164FT TC74AC164 TC74AC164P TC74AC164F 74F164 DIP14-P-300-2 74F164 TC74AC164FT

    TC74LVX4245FS

    Abstract: A4619
    Text: TC74LVX4245FS 東芝CMOSデジタル集積回路 シリコン モノリシック TC74LVX4245FS Dual Supply Octal Bus Transceiver TC74LVX4245FS は、電源電圧 3.3 V 系システムと 5 V 系システム との 2 システム間のインタフェースを可能とした超高速 CMOS8


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    PDF TC74LVX4245FS TC74LVX4245FS A4619

    Untitled

    Abstract: No abstract text available
    Text: TC74LVX4245FS 東芝CMOSデジタル集積回路 シリコン モノリシック TC74LVX4245FS Dual Supply Octal Bus Transceiver TC74LVX4245FS は、電源電圧 3.3 V 系システムと 5 V 系システム との 2 システム間のインタフェースを可能とした超高速 CMOS8


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    PDF TC74LVX4245FS

    rneg2

    Abstract: No abstract text available
    Text: QT1F-Plus Device Quad T1 Framer-Plus TXC-03103C DESCRIPTION • D4 SF, ESF including HDLC Link support , and transparent framing modes • Encodes/decodes AMI/B8ZS and forced ones density line codes • Fractional T1 gapped clock • Monitor function for frame pulse, clock and data


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    PDF TXC-03103C TXC-03103C-MB, rneg2

    MC68B21CP

    Abstract: xcm916x1cth16 transistor marking code 12W SOT-23 sg379 MC68B54P XC68HC805P18CDW mc68b50cp MC2830 NE555N CHN NE555N
    Text: SG379/D REV 7 Semiconductor Products Sector NORTH AMERICA SALES AND DISTRIBUTION PRICE LIST THIS BOOK IS IN COMPUTER SORT PRODUCT CLASSIFICATION – Please see General Information Section 1.3 EFFECTIVE DATE: JANUARY 10, 1998 General Information 1 Cross References


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    PDF SG379/D 1N965BRL ZEN15V 1N751AS 1N967BRL ZEN18V 1N751ASRL 1N968BRL ZEN20V MC68B21CP xcm916x1cth16 transistor marking code 12W SOT-23 sg379 MC68B54P XC68HC805P18CDW mc68b50cp MC2830 NE555N CHN NE555N

    transistor f422

    Abstract: transistor f423 f422 transistor transistor f421 BV09 F423 fet 13187 RJ4B L442 bvoe
    Text: CMOS-8LCX 3-VOLT, 0.50-MICRON CMOS GATE ARRAYS CROSSCHECK TEST SUPPORT NEC Electronics Inc. Preliminary Description October 1993 Figure 1. Various CMOS-8LCX Packages NEC’s 3-volt CMOS-8LCX family consists of ultra-high performance, sub-micron gate arrays, targeted for


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    PDF 50-MICRON PD658xx transistor f422 transistor f423 f422 transistor transistor f421 BV09 F423 fet 13187 RJ4B L442 bvoe

    nec 10f

    Abstract: uPD65881 IC Ensemble mentor robot MM 5649 A1362 CMOS-N5 NEC lqfp 52
    Text: 0.5µm CMOS Gate Array CMOS-N5 Family New s t c u Prod Features The CMOS-N5 family is a channel-less type gate array that provides high speed operation with a 5-V power supply voltage. Drastic cost reductions have been achieved compared with the conventional CMOS-6 and CMOS-8 families thanks to


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    PDF A13629EJ5V2PF00 nec 10f uPD65881 IC Ensemble mentor robot MM 5649 A1362 CMOS-N5 NEC lqfp 52

    F611

    Abstract: No abstract text available
    Text: NEC Electronics Inc. CMOS-8LHD 3.3-Volt, 0.5-Micron CMOS Gate Arrays Preliminary Description April 1996 Figure 1. CMOS-8LHD Package Options: BGA & QFP NEC's CMOS-8LHD gate-array family combines cellbased-level densities with the fast time-to-market and low


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    PDF 35-micron) A10616EU1V0DS00 F611

    Wavetek model 166

    Abstract: MOTHERBOARD CIRCUIT diagram explained hp3784A txc-02020-aipl Wavetek 187 JESD22-A112-A TXC20153G TXC-20153-MB PC MOTHERBOARD oi CIRCUIT diagram
    Text: DS3LIM-SN DS3/STS-1 Line Interface Module NRZ Clock/Data Output TXC-20153D, TXC-20153G DATA SHEET DESCRIPTION FEATURES • Complete B3ZS analog to NRZ digital DS3/ STS-1 line interface unit in a compact 2.6 square inch, 50-pin DIP Module • Single +5V power supply


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    PDF TXC-20153D, TXC-20153G 50-pin TXC-20153-MB Wavetek model 166 MOTHERBOARD CIRCUIT diagram explained hp3784A txc-02020-aipl Wavetek 187 JESD22-A112-A TXC20153G TXC-20153-MB PC MOTHERBOARD oi CIRCUIT diagram

    micro servo 9g

    Abstract: uPa2003 micro servo 9g tower pro 2SK1060 uPD3599 201 Zener diode 2SK2396 upc1237 infrared sensor TSOP - 1836 2SK518
    Text: The export of these products from Japan is regulated by the Japanese government. The export of some or all of these products may be prohibited without governmental license. To export or re-export some or all of these products from a country other than Japan may also be prohibited without a license from that country. Please call


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    PDF V20HL, V25HS, V30HL, V30MX, V35HS, V40HL, V50HL, V55PI, X10679EJDV0SG00 micro servo 9g uPa2003 micro servo 9g tower pro 2SK1060 uPD3599 201 Zener diode 2SK2396 upc1237 infrared sensor TSOP - 1836 2SK518

    TXC-21055

    Abstract: JESD22-A112-A PE65966 HDB3 coding
    Text: E3RT Device 34 Mbit/s E3 Line Interface TXC-02053 DATA SHEET FEATURES DESCRIPTION • 34368 kbit/s line interface The TranSwitch 34 Mbit/s E3 Receiver/Transmitter Line Interface E3RT is a Bi-CMOS VLSI device that provides the functions needed for terminating the ITU-T


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    PDF TXC-02053 TXC-02053-MB TXC-21055 JESD22-A112-A PE65966 HDB3 coding

    CH341A

    Abstract: 03104 bilq AMI 52 732 V TS16 TXC-03114 national alarm RFTS-10 X77H-X70H
    Text: QE1F-Plus Device Quad E1 Framer-Plus TXC-03114 FEATURES DESCRIPTION • Offline framer supports Standard and Frame Hold-Off frame alignment with CRC-4 multiframe check and selectable out of frame criteria, and transparent non-framing mode • Frame alignment detection and loss of frame


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    PDF TXC-03114 TXC-03114-MB CH341A 03104 bilq AMI 52 732 V TS16 TXC-03114 national alarm RFTS-10 X77H-X70H

    OPENCAD CMOS Block library

    Abstract: TW99 V53A 82RA trc41 100pulse H01-H02 78pu A14348JJ3V0UM00 calculate sin verilog
    Text: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社


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    PDF A14348JJ3V0UM003 A14348JJ3V0UM00 A14348JJ3V0UM00 FAX044548-7900 OPENCAD CMOS Block library TW99 V53A 82RA trc41 100pulse H01-H02 78pu calculate sin verilog

    nec v53

    Abstract: verilog DPLL OPENCAD CMOS Block library Topmax ABC03 F159 upci 255 CB-C9VX rtl 8105 A14349JJ4V0UM004
    Text: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社


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    PDF A14349JJ4V0UM004 A14349JJ4V0UM00 A14349JJ4V0UM00 FAX044548-7900 nec v53 verilog DPLL OPENCAD CMOS Block library Topmax ABC03 F159 upci 255 CB-C9VX rtl 8105 A14349JJ4V0UM004

    U2554

    Abstract: KE87A U2554 B KE49A u255 modelsim 6.3f u249 N46D V53A J14SK
    Text: お客様各位 カタログ等資料中の旧社名の扱いについて 2010 年 4 月 1 日を以って NEC エレクトロニクス株式会社及び株式会社ルネサステクノロジ が合併し両社の全ての事業が当社に承継されております。従いまして、本資料中には旧社


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    PDF A14352JJ2V0UM002 A14352JJ2V0UM00 FAX044548-7900 U2554 KE87A U2554 B KE49A u255 modelsim 6.3f u249 N46D V53A J14SK

    X13769XJ2V0CD00

    Abstract: CMOS-N5 CMOS-6S CMOS-9HD
    Text: お客さまに最適なゲートアレイは? スタート スタート・ボタンを押すと検索を開始します。 一覧表示 一覧表示ボタンを押すとフローチャートを表示します。 CD-ROM X13769XJ2V0CD00 品名別検索 アプリケーション


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    PDF X13769XJ2V0CD00 13769XJ2V0CD00 X13769XJ2V0CD00 CMOS-N5 CMOS-6S CMOS-9HD

    nec 07225

    Abstract: LRA-13
    Text: BACK SALI-25C Device Six ATM Line Interface at 25 Mbit/s TXC-07625 DATA SHEET FEATURES DESCRIPTION • Transmission Convergence - meets ATM Forum specifications - maps ATM cells to six 25.6 Mbit/s payloads - NRZI/NRZ and 5B/4B conversions - scrambling, cell delineation and rate adaptation


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    PDF SALI-25C TXC-07625 100ppm ALI-25T TXC-07625-MB nec 07225 LRA-13

    PD65625

    Abstract: PD65654 V30MZC PD65808 V30MX PD65875 PD65842 PD65841 CMOS-N5 PD65802
    Text: CD-ROM版セミカスタム IC CD-ROM X13769XJ2V0CD00 05−1 セミカスタム IC NECのASIC • ASICとは?(1/2) LSIは大きく,汎用LSIと特定用途向けLSI (ASIC:Application Specific IC) とに分けられます。 汎用LSIは, メーカ側で独自に設計し標準のLSIとして市販されているLSIです。各ユーザの使用量は少なくても大


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    PDF X13769XJ2V0CD00 PD681× 114ps 169ps 864ps 35mASIC 10GHz, PD65625 PD65654 V30MZC PD65808 V30MX PD65875 PD65842 PD65841 CMOS-N5 PD65802

    X13769XJ2V0CD00

    Abstract: ASIC V853 CBC-10 CMOS-6S asic ic
    Text: セミカスタム IC 製品一覧 NECのASIC 0.25 m ASIC ASICとは? LSIの選択 ゲートアレイ Road Map 選択基準 セルベースIC Road Map 選択基準について エンベデッドアレイ 開発期間と相対性能 アナログマスタ


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    PDF X13769XJ2V0CD00 EA-C10 CB-C10 X13769XJ2V0CD00 ASIC V853 CBC-10 CMOS-6S asic ic

    I7 motherboard circuit diagram

    Abstract: MOTHERBOARD CIRCUIT diagram explained
    Text: t h a n S w it c h # DS3LIM-SN DS3/STS-1 Line Interface Module NRZ Clock/Data Output TXC-20153D, TXC-20153G X- DATA SHEET DESCRIPTION FEATURES • Complete B3ZS analog to NRZ digital DS3/ STS-1 line interface unit in a compact 2.6 square inch, 50-pin DIP Module


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    PDF 50-pin TXC-20153D TXC-20153G TXC-20153-MB I7 motherboard circuit diagram MOTHERBOARD CIRCUIT diagram explained

    1j63

    Abstract: .1J63 7062l
    Text: f QE1F-PIus Device f t r H Quad E1 Framer-Plus TXC-03114 DATA SHEET DESCRIPTION The QE1F-Plus is a four-channel E1 2048 kbit/s framer designed for voice and data communications applications. A dual unipolar or NRZ line interface is supported with full alarm detection and generation per


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    PDF TXC-03114 TXC-03114-MB 1j63 .1J63 7062l

    Untitled

    Abstract: No abstract text available
    Text: L3M Device Level 3 Mapper TXC-03452B DATASHEET FEATURES DESCRIPTION = The L3M maps a DS3 line signal into an STM-1 TUG-3 or STS-3/STS-1 SPE or STS-1 SPE SDH/SONET sig­ nal. An E3 line signal is mapped into an STM-1 TUG-3 signal only. The L3M provides a TUG-3 formatted signal


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    PDF TXC-03452B TXC-03452B-M

    transistor f422

    Abstract: transistor f423 F422 transistor transistor f421 nec product naming rule BK-DK
    Text: i O 1993 iir n r, . . NEC E le ctro n ics Inc. Prelim inary Description CMOS-8LCX 3-VOLT, 0.50-M ICRON CMOS GATE ARRAYS c ro s s c h e c k te s t s u p p o rt February 1993 Figure 1. Various CMOS-8LCX Packages NEC’s 3-volt CMOS-8LCX family are ultra-high perform­


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    PDF iPD658xx transistor f422 transistor f423 F422 transistor transistor f421 nec product naming rule BK-DK

    Untitled

    Abstract: No abstract text available
    Text: MRT Device X co u w 6-, 8-, 34-Mbit/s Line Interface TXC-02050 DATA SHEET FEATURES DESCRIPTION ' = = The TranSwitch Multi-rate Receive/Transmit MRT device is a CMOS VLSI device that provides the func­ tions needed for terminating two CCITT line rates, 8448


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    PDF 34-Mbit/s TXC-02050 TXC-02050-MB