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    CK155 Search Results

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    CK155 Price and Stock

    Traco Power TCK-155

    FIXED IND 39UH 500MA 1 OHM SMD
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    DigiKey TCK-155 Bag 364 1
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    Mouser Electronics TCK-155 87
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    RS TCK-155 Bulk 21 Weeks 10
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    TME TCK-155 10 1
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    Sager TCK-155 1
    • 1 $2
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    MIL SPEC CONNECT PMSD-02-22C-K-15.50-S

    .165" POWER MATE DOUBLE ROW DISC
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    DigiKey PMSD-02-22C-K-15.50-S 28 10
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    Omega Engineering RSC-K-1-5-5

    RETRACTABLE SENSOR CABLE, SPRING
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    DigiKey RSC-K-1-5-5 Bulk 1
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    Newark RSC-K-1-5-5 Bulk 2 1
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    RS RSC-K-1-5-5 Bulk 5 Weeks 1
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    Samtec Inc PMSD-02-22C-K-15.50-S

    .165" POWER MATE DOUBLE ROW DISC
    Free Sample
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    DigiKey PMSD-02-22C-K-15.50-S Bulk 1
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    Avnet Americas PMSD-02-22C-K-15.50-S Bulk 1
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    Mouser Electronics PMSD-02-22C-K-15.50-S
    • 1 $4.01
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    Master Electronics PMSD-02-22C-K-15.50-S
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    Sager PMSD-02-22C-K-15.50-S 1
    • 1 $4.01
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    CK155 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    R4383

    Abstract: T400 clock TSWC03622 TSYN01622 TSYN03622 TSWC01622 TSWC02622
    Text: Advisory October 28, 2003 TSWC01622/TSWC02622/TSWC03622/TSYN01622/TSYN03622 Device Version 1.1 Advisory The following data sheets are to be referenced: • TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS03-117HSPL-1 . ■


    Original     		2/TSWC02622/TSWC03622/TSYN01622/TSYN03622 TSWC01622 DS03-117HSPL-1) TSWC02622 DS03-118HSPL-1) TSWC03622 DS03-120HSPL) TSYN01622 DS03-119HSPL) TSYN03622 R4383 T400 clock PDF

    GR-253

    Abstract: TTRN0110G
    Text: Data Sheet March 29, 2002 TTRN0110G 10 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer Features Applications Supports standard OC-192/STM-64 data rate of 9.95328 Gbits/s up through forward error correction FEC rate of 10.7092 Gbits/s as well as the Ethernet rate of 10.3125 Gbits/s


    Original     		TTRN0110G OC-192/STM-64 transfe0-712-4106) DS02-062HSPL DS01-236HSPL) GR-253 TTRN0110G PDF

    YA28

    Abstract: AC10 post amplifier A0774011 AC10 GR-253 YA18 qmv1080 QMV108
    Text: Data Sheet YA28 2.5 Gb/s 1:4 Demultiplexer with Clock and Data Recovery Features Meets or exceeds all relevant ANSI, ITU and Bellcore specifications Fully balanced, differential architecture Differential CML data input accepts signals of 2.5 Gb/s data rate


    Original     		48-pin OC-48 YA28 AC10 post amplifier A0774011 AC10 GR-253 YA18 qmv1080 QMV108 PDF

    1 into 16 demultiplexer circuit diagram using 1 i

    Abstract: 1 into 12 demultiplexer circuit diagram 1 into 16 demultiplexer circuit diagram ip 65 equipment qmv10 AB89 AC10 UT15 AC10 post amplifier YA18
    Text: YA20 2.5 Gb/s 1:16 Demultiplexer Data Sheet Features Data and clock inputs accept differential CML signals at up to 2.5 Gb/s Internally generated divide-by-16 clock and deserialized data delivered via PECL 100 k outputs Fully differential internal logic for


    Original     		divide-by-16 16-bit 1 into 16 demultiplexer circuit diagram using 1 i 1 into 12 demultiplexer circuit diagram 1 into 16 demultiplexer circuit diagram ip 65 equipment qmv10 AB89 AC10 UT15 AC10 post amplifier YA18 PDF

    1 into 16 demultiplexer circuit diagram using 1 i

    Abstract: 1 into 12 demultiplexer circuit diagram Nortel demux AB89 AC10 YA08 YA18 YA19 YA20 1 into 4 demultiplexer circuit diagram
    Text: YA20 2.5 Gb/s 1:16 Demultiplexer Data Sheet Features Data and clock inputs accept differential CML signals at up to 2.5 Gb/s Internally generated divide-by-16 clock and deserialized data delivered via PECL 100 k outputs Fully differential internal logic for


    Original     		divide-by-16 16-bit 1 into 16 demultiplexer circuit diagram using 1 i 1 into 12 demultiplexer circuit diagram Nortel demux AB89 AC10 YA08 YA18 YA19 YA20 1 into 4 demultiplexer circuit diagram PDF

    ck77

    Abstract: CK51 TADM04622
    Text: Data Sheet, Revision 1 August 26, 2003 TSYN03622 SONET/SDH/PDH/ATM Clock Synthesizer 1 Introduction The last issue of this data sheet was June 20, 2003. A revision history is included in 21 Revision History on page 65. Red change bars have been installed on all text, figures,


    Original     		TSYN03622 DS03-130HSPL-1 DS03-130HSPL) ck77 CK51 TADM04622 PDF

    RXD55

    Abstract: RXD26
    Text: Hardware Design Guide June 2004 STSI-144 Scalable Time-Slot Interchanger Hardware Design Guide Introduction Related Documents This document describes the hardware interfaces to Agere Systems Inc. scalable time-slot interchanger STSI-144 device. Information relevant to the use of


    Original     		STSI-144 STSI-144) DS04-230SWCH DS04-168SWCH DS04-214SWCH) RXD55 RXD26 PDF

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Data Sheet May 2002 TSWC03622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Same functionality as TSWC01622 with reduced jitter specifications ■ Fully integrated clock synthesis ■ Clock or system sync protection switching


    Original     		TSWC03622 DS02-239HSPL PDF

    TSI-16

    Abstract: TTSI144641BL-1 SI14 STSI-144
    Text: Avance Information May 2002 STSI-144 Scalable Time-Slot Interchanger Product Description Introduction Features This document is a high-level description for the scalable time-slot interchanger STSI-144 device. The features and functions of the device are listed


    Original     		STSI-144 STSI-144) DS02-094SWCH TSI-16 TTSI144641BL-1 SI14 PDF

    Untitled

    Abstract: No abstract text available
    Text: Avance Information August 2003 STSI-48 Scalable Time-Slot Interchanger Product Description Introduction Features This document is a high-level description for the scalable time-slot interchanger STSI-48 device. The features and functions of the device are listed


    Original     		STSI-48 STSI-48) DS03-194SWCH PDF

    Untitled

    Abstract: No abstract text available
    Text: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection


    Original     		TSWC01622/TSWC02622/TSWC03622/TSYN01622 TSWC01622 DS02-237HSPL, TSWC02622 DS02-238HSPL) TSWC03622 DS02-308HSPL, TSYN01622 DS02-289HSPL) TSWC0x622/TSYN01622 PDF

    T400 clock

    Abstract: TSWC01622 TSWC02622 TSWC03622 TSYN01622
    Text: Data Advisory October 25, 2002 TSWC01622/TSWC02622/TSWC03622/TSYN01622 Device Advisory for Version 1.1 of the Device Reference data sheets October 2002, TSWC01622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch data sheet DS02-237HSPL, TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection


    Original     		TSWC01622/TSWC02622/TSWC03622/TSYN01622 TSWC01622 DS02-237HSPL, TSWC02622 DS02-238HSPL) TSWC03622 DS02-308HSPL, TSYN01622 DS02-289HSPL) TSWC0x622/TSYN01622 T400 clock PDF

    TADM042G5

    Abstract: TDAT042G5 TSOT0410G TSWC02622 TTRN012G5
    Text: Preliminary Product Brief February 2003 TSWC02622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Fully integrated clock synthesis ■ Clock or system sync protection switching ■ Fast autonomous switching with software override


    Original     		TSWC02622 OC-48 ba2-4106) PB03-022HSPL TADM042G5 TDAT042G5 TSOT0410G TTRN012G5 PDF

    TMXF84622

    Abstract: TADM04622 TDAT04622 TMXF28155 TSI-16 TSWC01622 TSWC03622 TSI-16 Card
    Text: Preliminary Product Brief February 2003 TSWC03622 SONET/SDH/PDH/ATM Clock Synthesizer and Protection Switch Features Description • Same functionality as TSWC01622 with looser jitter specifications ■ Fully integrated clock synthesis ■ Clock or system sync protection switching


    Original     		TSWC03622 TSWC01622 OC-12: PB03-023HSPL TMXF84622 TADM04622 TDAT04622 TMXF28155 TSI-16 TSI-16 Card PDF

    2ya18

    Abstract: nortel demux ya18 FZT968 nortel YA YA19 YA20 AB89 AC10 OC48
    Text: YA18 2.5 Gb/s Clock and Data Recovery Circuit Data Sheet Features Fully balanced, differential architecture from input to output Differential CML data input accepts signals of up to 2.7 Gb/s data rates - 50 Ω terminated 50 Ω terminated differential CML


    Original     		PDF

    optical external modulator

    Abstract: CK311 NTD10 OC48 TD10 TQ8214 td10 1400 NTD13 TriQuint Optoelectronics
    Text: R I Q U I N T S E M I C O N D U C T O R, I N C . The TQ8214 is a SONET/SDH OC48 MUX that time-division multiplexes a 16-bit or 8-bit parallel data bus to a serial 2.48832 Gb/s NRZ data stream for transmission through a communications channel. Without any additional amplification, the 2.48832 Gb/s output stage can drive either a


    Original     		TQ8214 16-bit TQ8214 twTQ8214 optical external modulator CK311 NTD10 OC48 TD10 td10 1400 NTD13 TriQuint Optoelectronics PDF

    GR-253

    Abstract: TRCV012G5 TTRN012G5
    Text: Product Brief October 1999 TTRN012G5 2.5 GHz Clock Synthesizer, 16:1 Data Multiplexer Features • Fully integrated 2.5 GHz clock synthesizer; 16:1 data multiplexer; supports OC-48/STM-16 data rates ■ Supports clockless data transfer into the 16:1 multiplexer


    Original     		TTRN012G5 OC-48/STM-16 GR-253 PN99-184HSPL PN99-139HSPL) GR-253 TRCV012G5 TTRN012G5 PDF

    GR-253

    Abstract: TRCV012G5 TTRN012G5
    Text: Product Brief August 1999 TRCV012G5 2.5 Gbits/s Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer Features • Fully integrated limiting amplifier, clock recovery, 1:16 data demultiplexer ■ Supports OC-48/STM-16 data rates, including 2.66 Gbits/s forward error correction FEC


    Original     		TRCV012G5 OC-48/STM-16 PN99-140HSPL GR-253 TTRN012G5 PDF

    K1555

    Abstract: RQ48 CK311 CK38 TQ8223 D1294 RQ-15 resistor 40-1-88 RQ23 rq31
    Text: T R I Q U I N T S E M I C O N D U C T O R, I N C . TQ8223 The TQ8223 is extremely flexible for telecom, ATM and networking applications. The serial 2.48832 Gb/s data stream is demultiplexed into a 32-bit wide 77.76 MHz TTL data bus. Internal data inversion is also


    Original     		TQ8223 TQ8223 32-bit 208-pin K1555 RQ48 CK311 CK38 D1294 RQ-15 resistor 40-1-88 RQ23 rq31 PDF

    CKT55

    Abstract: No abstract text available
    Text: DESCRIPTION FEATURES • Single chip source for 622.08M Hz and 155.52MHz clocks ■ 622.08M Hz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/C M O S com patible inputs and reference output ■ SONET com pliant jitter perform ance <0.01 Ul


    OCR Scan     		52MHz 28-pin -12/S T-000253 12kHz OC-12 SY89426JC SY89426JCTR J28-1 CKT55 PDF

    IR LFN detector

    Abstract: LFN ir
    Text: Advance Data Sheet September 1999 microelectronics group Lucent Technologies Bell Labs Innovations TRCV012G5 2.5 Gbits/s Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer Features Description • Fully integrated limiting amplifier, clock recovery,


    OCR Scan     		TRCV012G5 OC-48/STM-16 LV95086 IR LFN detector LFN ir PDF

    dflj

    Abstract: No abstract text available
    Text: Advance Data Sheet September 1999 + microelectronics _ group Lucent Technologies m M Bell Labs Innovations TRCV012G5 2.5 Gbits/s Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer Features Description • Fully integrated limiting amplifier, clock recovery,


    OCR Scan     		TRCV012G5 OC-48/STM-16 128-Pin TRCV012G5 QG40472 dflj PDF

    Untitled

    Abstract: No abstract text available
    Text: * SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERGY SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks Synergy's SY89426 M ulti-O utput Phase Locked Loop PLL is a SONET com pliant clock generator providing


    OCR Scan     		OC-12/OC-3 SY89426 08MHz 52MHz SY89426 C-12/STS-12 76MHz. PDF

    Untitled

    Abstract: No abstract text available
    Text: * SONET OC-12/OC-3 CLOCK SYNTHESIZER SYNERGY SEMICONDUCTOR Clockworks SY89426 DESCRIPTION FEATURES • Single chip source for 622.08MHz and 155.52MHz clocks ■ 622.08MHz output is differential PECL, 155.52MHz output is single-ended PECL ■ TTL/CMOS compatible inputs and reference output


    OCR Scan     		OC-12/OC-3 SY89426 08MHz 52MHz SY89426 PDF