CI 16551
Abstract: Harris CMOS Integrated Circuits
Text: CD74HCU04 CI, INPUT CAPACITANCE pF Typical Performance Curves 70 65 60 55 50 45 40 35 30 25 20 15 10 5 (Continued) AMBIENT TEMPERATURE, TA = 25oC VDD = 2V, VI 0-2V INPUT PIN 5 CONDITIONS VDD = 3V, VI 0-3V VDD = 4V, VI 0-4V VDD = 5V, VI 0-5V VDD = 6V, VI 0-6V
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CD74HCU04
ISO9000
CD74HCU04E
CD74HCU04M
CD74HC04,
CI 16551
Harris CMOS Integrated Circuits
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cd74hc32
Abstract: CD74HCT32
Text: CD54HCT32, CD74HC32, CD74HCT32 S E M I C O N D U C T O R High Speed CMOS Logic Quad 2-Input OR Gate September 1997 Features Description • Typical Propagation Delay: 7ns at VCC = 5V, CL = 15pF, TA = 25oC The Harris CD74HC32, CD74HCT32 contain four 2-input OR
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CD54HCT32,
CD74HC32,
CD74HCT32
CD74HCT32
74HCT
1-800-4-HARRIS
cd74hc32
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IC 3914
Abstract: CD54AC541F3A CD54ACT541F3A
Text: CD54AC541F3A, CD54ACT541F3A S E M I C O N D U C T O R Octal Buffer/Line Driver Three-State, Non-Inverting July 1998 Features Description • This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
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CD54AC541F3A,
CD54ACT541F3A
MIL-STD883
CD54AC541F3A
CD54ACT541F3A
CD54AC541F3A
MIL-STD-883,
1-800-4-HARRIS
IC 3914
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CD74HCT132 harris
Abstract: CD74HC132 CD74HCT132
Text: CD74HC132, CD74HCT132 S E M I C O N D U C T O R High Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger August 1997 Features Description • Unlimited Input Rise and Fall Times The Harris CD74HC132, CD74HCT132 each contain four 2-input NAND Schmitt Triggers in one package. This logic
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CD74HC132,
CD74HCT132
CD74HCT132
74HCT
1-800-4-HARRIS
CD74HCT132 harris
CD74HC132
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cd74hc240
Abstract: No abstract text available
Text: CD74HC240, CD74HCT240, CD74HC241, CD74HCT241, CD74HC244, CD74HCT244 S E M I C O N D U C T O R High Speed CMOS Logic Octal Buffer/Line Drivers, Three-State November 1997 Features Description • CD74HC/HCT240 Inverting The Harris CD74HC240 and CD74HCT240 are inverting
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CD74HC240,
CD74HCT240,
CD74HC241,
CD74HCT241,
CD74HC244,
CD74HCT244
CD74HC240
CD74HCT240
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CD74HC86
Abstract: 74HCT 74LS CD54HC86W CD54HCT86W CD74HC86E CD74HC86M CD74HCT86 CD74HCT86E CD74HCT86M
Text: CD74HC86, CD74HCT86 S E M I C O N D U C T O R High Speed CMOS Logic Quad 2-Input EXCLUSIVE OR Gate August 1997 Features Description • Typical Propagation Delay: 9ns at VCC = 5V, CL = 15pF, TA = 25oC The Harris CD74HC86, CD74HCT86 contain four independent EXCLUSIVE OR gates in one package. They
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CD74HC86,
CD74HCT86
CD74HCT86
74HCT
1-800-4-HARRIS
CD74HC86
74HCT
74LS
CD54HC86W
CD54HCT86W
CD74HC86E
CD74HC86M
CD74HCT86E
CD74HCT86M
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Untitled
Abstract: No abstract text available
Text: CD74HC73, CD74HCT73 S E M I C O N D U C T O R Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times The Harris CD74HC73 and CD74HCT73 utilize silicon gate
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CD74HC73,
CD74HCT73
CD74HC73
CD74HCT73
HC/HCT107
74HCT
1-800-4-HARRIS
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cd74hc10e
Abstract: cd74hct10
Text: CD74HC10, CD74HCT10 S E M I C O N D U C T O R High Speed CMOS Logic Triple 3-Input NAND Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC10, CD74HCT10, logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of
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CD74HC10,
CD74HCT10
CD74HCT10,
74HCT
1-800-4-HARRIS
cd74hc10e
cd74hct10
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74LS series logic gate symbols
Abstract: 74HCT 74LS CD54HC20W CD74HC20 CD74HC20E CD74HC20M CD74HCT20 CD74HCT20E CD74HCT20M
Text: CD74HC20, CD74HCT20 S E M I C O N D U C T O R High Speed CMOS Logic Dual 4-Input NAND Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC20, CD74HCT20, logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of
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CD74HC20,
CD74HCT20
CD74HCT20,
74HCT
1-800-4-HARRIS
74LS series logic gate symbols
74LS
CD54HC20W
CD74HC20
CD74HC20E
CD74HC20M
CD74HCT20
CD74HCT20E
CD74HCT20M
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74HCT
Abstract: 74LS CD74HC27 CD74HC27E CD74HC27M CD74HCT27 CD74HCT27E CD74HCT27M
Text: CD74HC27, CD74HCT27 S E M I C O N D U C T O R High Speed CMOS Logic Triple 3-Input NOR Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC27, CD74HCT27, logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of
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CD74HC27,
CD74HCT27
CD74HCT27,
74HCT
1-800-4-HARRIS
74LS
CD74HC27
CD74HC27E
CD74HC27M
CD74HCT27
CD74HCT27E
CD74HCT27M
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cd74hc107
Abstract: No abstract text available
Text: CD74HC107, CD74HCT107 S E M I C O N D U C T O R Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times The Harris CD74HC107 and CD74HCT107 utilize silicon
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CD74HC107,
CD74HCT107
CD74HC107
CD74HCT107
HC/HCT73
74HCT
1-800-4-HARRIS
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CD74HCT75
Abstract: CD74HC75 CD74HCT75 Harris
Text: CD74HC75, CD74HCT75 S E M I C O N D U C T O R Dual 2-Bit Bistable Transparent Latch March 1998 Features Description • True and Complementary Outputs The Harris CD74HC75 and CD74HCT75 are dual 2-bit bistable transparent latches. Each one of the 2-bit latches is
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CD74HC75,
CD74HCT75
CD74HC75
CD74HCT75
-55oC
125oC
1-800-4-HARRIS
CD74HCT75 Harris
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cd74hc74
Abstract: CD74HCT74
Text: CD54HC74, CD74HC74, CD74HCT74 S E M I C O N D U C T O R Dual D Flip-Flop with Set and Reset Positive-Edge Trigger January 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times The Harris CD54HC74, CD74HC74 and CD74HCT74 utilize
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CD54HC74,
CD74HC74,
CD74HCT74
CD74HC74
CD74HCT74
74HCT
1-800-4-HARRIS
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74ls gate symbols
Abstract: CD74HC21 74HCT 74LS CD74HC21E CD74HC21M CD74HCT21 CD74HCT21E CD74HCT21M cd74hct21 harris
Text: CD74HC21, CD74HCT21 S E M I C O N D U C T O R High Speed CMOS Logic Dual 4-Input AND Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC21, CD74HCT21, logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of
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CD74HC21,
CD74HCT21
CD74HCT21,
74HCT
1-800-4-HARRIS
74ls gate symbols
CD74HC21
74LS
CD74HC21E
CD74HC21M
CD74HCT21
CD74HCT21E
CD74HCT21M
cd74hct21 harris
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cd74hct563
Abstract: No abstract text available
Text: S E M I C O N D U C T O R CD74HC533, CD74HCT533, CD74HC563, CD74HCT563 January 1998 High Speed CMOS Logic Octal Inverting Transparent Latch, Three-State Outputs Features Description • Common Latch-Enable Control The Harris CD74HC533, CD74HCT533, CD74HC563, and
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CD74HC533,
CD74HCT533,
CD74HC563,
CD74HCT563
CD74HCT563
1-800-4-HARRIS
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cd74hc67
Abstract: No abstract text available
Text: CD74HC670, CD74HCT670 S E M I C O N D U C T O R High-Speed CMOS Logic 4x4 Register File January 1998 Features Description • Simultaneous and Independent Read and Write Operations The Harris CD74HC670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write
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CD74HC670,
CD74HCT670
CD74HC670
CD74HCT670
16-bit
1-800-4-HARRIS
cd74hc67
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max5519
Abstract: No abstract text available
Text: CD74HC597, CD74HCT597 S E M I C O N D U C T O R High Speed CMOS Logic 8-Bit Shift Register with Input Storage January 1998 Features Description • Buffered Inputs The Harris CD74HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin-compatible with the
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CD74HC597,
CD74HCT597
CD74HC597
CD74HCT597
1-800-4-HARRIS
max5519
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CD74HC259 harris
Abstract: No abstract text available
Text: CD74HC259, CD74HCT259 S E M I C O N D U C T O R High Speed CMOS Logic 8-Bit Addressable Latch November 1997 Features Description • Buffered Inputs and Outputs The Harris CD74HC259 and CD74HCT259 Addressable Latch features the low-power consumption associated with
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CD74HC259,
CD74HCT259
CD74HC259
CD74HCT259
1-800-4-HARRIS
CD74HC259 harris
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Untitled
Abstract: No abstract text available
Text: hS E M aI C O rN DrU Ci TsO R "F S F 2 5 4mD J, F m S F u 2 5 4 a mR m Radiation Hardened, SEGR Resistant N-Channel Power MOSFETs Features Package • 18A, 250V, rDS ON = 0.170£1 TO-254AA • Total Dose - M eets Pre-Rad Specifications to 100kRAD(Si) • Single Event
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OCR Scan
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O-254AA
100kRAD
1-800-4-HARRIS
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IN402
Abstract: No abstract text available
Text: DG406/883, DG407/883 HARRIS S E M I C O N D U C T O R Single 16-Channel/Differential 8-Channel C M O S Analog Multiplexers April 1997 Features Description • Thi s Ci rcui t is Pr o c e s s e d in A c c o r d a n c e to M I L - S T D - 8 8 3 and is Ful l y
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OCR Scan
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DG406/883,
DG407/883
16-Channel/Differential
DG406/883
DG407/883
DG506A/883
DG507A/883
1-800-4-H
IN402
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BASIC digital multimeter diagram
Abstract: PKM24-4A0 38D8R02H 5 VOLT piezo beeper 4MC2 harris volt meter digital multimeter icl7139
Text: h S E M aI C O r N Dr U Ci T sO R æ Im C L m m 7 1m 3 m 9 w , Features • 18 R a n g e s -IC L 7 1 49 4 2 4 4 4 C L 7a ^ m 1* 4 * 9 Description 13 R a n g e s - ICL7139 - 4 DC Voltage 400mV, 4 V, 40V, 400V - 1 AC Voltage 400V - 4 DC Current 4mA, 40mA, 400mA, 4A
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OCR Scan
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ICL7139
ICL7149
400mA
1-800-4-HARRIS
BASIC digital multimeter diagram
PKM24-4A0
38D8R02H
5 VOLT piezo beeper
4MC2
harris volt meter
digital multimeter icl7139
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Untitled
Abstract: No abstract text available
Text: HS-1115RH S Radiation Hardened, High Speed, Low Power Output Limiting, Closed-Loop-Buffer Amplifier August 1996 Features Description • Electrically Screened to SMD 5962F9678501VPA The HS-1115RH is a radiation hardened, high speed closed loop buffer featuring both user programmable gain and out
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OCR Scan
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HS-1115RH
5962F9678501VPA
HS-1115RH
MIL-PRF-38535.
225MHz,
MIL-PRF-38535
1-800-4-HARRIS
M302571
GGb75T4
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XF MR 60hz trans
Abstract: VB26
Text: HC-5509B3999-003 SLIC S u b s c r ib e r Line Interface Circuit March 1996 Features Description • Dl Monolithic High Voltage Process • Selective Power Denial to Subscriber The HC-5509B3999-003 telephone Subscriber Line Inter face Circuit integrates most of the BORSCHT functions on a
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OCR Scan
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HC-5509B3999-003
HC-5509B3999-003
1-800-4-HARRIS
43D2E71
XF MR 60hz trans
VB26
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Untitled
Abstract: No abstract text available
Text: HIN232A HARRIS S E M I C O N D U C T O R High Speed +5V RS-232 Transm itter/R eceiver w ith 0.1 M icrofarad External C apacitor juiy 1997 Features Description • Meets All EIA RS-232E and V.28/V.24 Specifications The HIN232A High Speed RS-232 transmitter/receiver
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OCR Scan
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HIN232A
RS-232
RS-232E
HIN232A
1-800-4-HARRIS
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