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Untitled Abstract: No abstract text available Text: P4C1026 REVISIONS DOCUMENT NUMBER: DOCUMENT TITLE: SRAM127 P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM REV. ISSUE DATE ORIG. OF CHANGE OR Oct-05 JDB New Data Sheet A Aug-06 JDB Updated SOJ package information Document # SRAM127 REV A DESCRIPTION OF CHANGE	Original	PDF	P4C1026 Oct-05 Aug-06 SRAM127 P4C1026 SRAM127
Untitled Abstract: No abstract text available Text: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell TTL/CMOS Compatible Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) – 20/25/35 ns (Military) Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved)	Original	PDF	P4C1026 28-Pin 32-Pin SRAM127 P4C1026 Oct-05 Aug-06
Untitled Abstract: No abstract text available Text: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell TTL/CMOS Compatible Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) – 20/25/35 ns (Military) Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved)	Original	PDF	P4C1026 28-Pin 32-Pin P4C1026 SRAM127 SRAM127
P4C1026 Abstract: P4C1258 Text: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell TTL/CMOS Compatible Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) – 20/25/35 ns (Military) Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved)	Original	PDF	P4C1026 28-Pin 32-Pin P4C1026 toler150 SRAM127 SRAM127 P4C1258
Untitled Abstract: No abstract text available Text: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell TTL/CMOS Compatible Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) – 20/25/35 ns (Military) Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved)	Original	PDF	P4C1026 28-Pin 32-Pin P4C1026 SRAM127 SRAM127
Untitled Abstract: No abstract text available Text: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell Three-State Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) TTL/CMOS Compatible Outputs Fully TTL Compatible Inputs Low Power Standard Pinout (JEDEC Approved)	Original	PDF	P4C1026 28-Pin P4C1026 SRAM127 Oct-05 SRAM127
Untitled Abstract: No abstract text available Text: P4C1026 ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM FEATURES Full CMOS, 6T Cell TTL/CMOS Compatible Outputs High Speed Equal Access and Cycle Times – 15/20/25/35 ns (Commercial/Industrial) – 20/25/35 ns (Military) Fully TTL Compatible Inputs Standard Pinout (JEDEC Approved)	Original	PDF	P4C1026 28-Pin 32-Pin SRAM127 P4C1026