TQ-204
Abstract: No abstract text available
Text: d i ’ High speed IGBT IXSH/IXSM 35N100A V CES = ^C25 = 70 A = 3.5 V v CE sat 1 0 0 0 V Short Circuit SO A Capability Symbol Test Conditions v CES v CGR v GES T, = 25='Cto150°C 1000 V T, = 25"C to 150°C; RGE = 1 M ii 1000 V Continuous ±20 V V«. Transient
|
OCR Scan
|
PDF
|
35N100A
Cto150
O-247
O-204
35N100A
TQ-204
|
Untitled
Abstract: No abstract text available
Text: TL16C550C ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL SLLS177B- MARCH 1994 - REVISED MARCH 1996 • Programmable Auto-RTS and Auto-CTS • In Auto-CTS Mode, CTS Controls Transmitter • In Auto-RTS Mode, RCV FIFO Contents and Threshold Control RTS
|
OCR Scan
|
PDF
|
TL16C550C
SLLS177B-
TL16C450
16-MHz
16-byte
|
44c256
Abstract: 3034C
Text: SMJ44C256 262144 BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY _ SGMS034C - MAY 1989 - B E V ILO JUNE 1965 Organization. . . 262144 Words x 4 Bits Single 5-V Supply 10% Tolerance Processed to MIL-STD-833, Class B Performance Ranges: 3-State Unlatched Output
|
OCR Scan
|
PDF
|
SMJ44C256
SGMS034C
MIL-STD-833,
SMJ44C256-80
SMJ44C256-10
SMJ44C256-12
SMJ44C256-15
20-Pin
300-Mil
20-Lead
44c256
3034C
|
74278
Abstract: No abstract text available
Text: TYPES SN54278, SN74278 4-BIT CASCADABLE PRIORITY REGISTERS M AY 1 972 —R E V ISE D A P R IL 1 98 5 Latched Data Inputs Serve as Buffer Register and Can also: Synchronize Data Acquisition "Debounce" Mechanical Switch Input • Cascading Input PO and Output P1
|
OCR Scan
|
PDF
|
SN54278,
SN74278
SN54278
74278
|
NS16C450N
Abstract: No abstract text available
Text: TL16C450 ASYNCHRONOUS COMMUNICATIONS ELEM ENT 0 3 0 9 6 , M A R C H 1 9 8 8 - R E V IS E O A P R IL 1 9 8 9 N DUAL-IN-LINE PACKAGE • Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to 216 - 1 and Generates an Internal 16 X
|
OCR Scan
|
PDF
|
TL16C450
TL16C450
NS16C450N
|
1s1211
Abstract: No abstract text available
Text: SN74AS4374B OCTAL EDGE-TRIGGERED D-TYPE DUAL-RANK FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS109C D30B1, A PRIL 1988 - REVISED JAN U AR Y 1991 DWOMNMCKAQI 1W V BW • *-8tata Outputs Drtva Bua Unaa Dtrectty • Package Option« Include Plaatlc “Small Outllna" Paakagaa and Standard Plaatlc
|
OCR Scan
|
PDF
|
SN74AS4374B
SDAS109C
D30B1,
AS4374B
1s1211
|
D2957
Abstract: 1987-REVISEDAPRIL
Text: 54ACT11030,74ACT11030 8-INPUT POSITIVE-NAND GATES _ D2957. MARCH 1987-REVISEDAPRIL 1993 Inputs Are TTL*Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-PIn V^c and GNO Configurations Minimize High-Speed Switching Noise EPIC Enhanced-Perlormance Implanted
|
OCR Scan
|
PDF
|
54ACT11030
74ACT11030
D2957.
1987-REVISEDAPRIL
500-mA
300-mll
D2957,
D2957
|
Untitled
Abstract: No abstract text available
Text: SN54HC7266, SN74HC72S6 QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES D 2 8 0 4 . M A R C H 1 9 8 4 -R E V IS E D SEPTEMBER 1 9 8 7 • Dependable Texas Instruments Quality and Reliability • Totem-Pole Version of 'HC266 S N 5 4 H C 7 2 6 6 . . . J P AC K A G E S N 7 4 H C 7 2 6 6 . . . D OR N P AC KA G E
|
OCR Scan
|
PDF
|
SN54HC7266,
SN74HC72S6
300-mil
HC266
SN54HC7266
SN74H
|
Untitled
Abstract: No abstract text available
Text: PAL20L8A, PAL20R4A, PAL20R6A, PAL20R8A STANDARD HIGH-SPEED PAL CIRCUITS D 2 7 0 6 , DEC EM BE R 1 9 8 2 - R E V IS E D DEC EM BE R 1 9 8 7 PAL20L8' M SUFFIX . . . JW PACKAGE C SUFFIX . . . JW OR NT PACKAGE Standard High Speed 25 ns PAL Family • Choice of Input/Output Configuration
|
OCR Scan
|
PDF
|
PAL20L8A,
PAL20R4A,
PAL20R6A,
PAL20R8A
300-mil
600-mil
13-state
PAL20L8'
AL20L8A
|
Untitled
Abstract: No abstract text available
Text: 74ACT11867 SYNCHRONOUS 8-BIT UP/DOWN BINARY COUNTER WITH ASYNCHRONOUS CLEAR S C A S 1 7 8 - D 3 9 9 0 , D E C E M B E R 1991 - R E V IS E D A P R I L 1 9 9 3 Inputs Are TTL-Voltage Compatible Asynchronous Clear Fully Independent Clock Circuit Simplifies Use
|
OCR Scan
|
PDF
|
74ACT11867
500-mA
|
Untitled
Abstract: No abstract text available
Text: TL5501 6 BIT ANALOG-TO-DIGITAL CONVERTER D 3 16 3 , OCTOBER 1 9 8 8 -R E V IS E D APRIL 1990 N PACKAGE 6-Bit Resolution TOP VIEW Linearity Error . . . ± 0 .8 % (LSB) D OC 1 U l 6 "2 GND Maximum Conversion Rate . . . 3 0 M Hz Typ Analog Input Voltage Range . . .
|
OCR Scan
|
PDF
|
TL5501
|
SN7560B
Abstract: No abstract text available
Text: "TEXAS I N S T R 8961724 TEXAS INSTR -CLIN /IN TFO Tl D Ë J 0*11.1724 □ O Ï S T D E 0 LIN/INTFC ADVANCE INFORMATION 9 1D 7 5 9 0 2 D SN75608 DUAL FLUX-REGULATING ACTUATOR T-52-13-45 2 .6 -A Current Capability per Channel D 2966, DECEM BER 1986 Z KV SINGLE-IN-LINE PACKAGE
|
OCR Scan
|
PDF
|
SN75608
T-52-13-45
15-Pin
PACKAGE656012
0D7ST11
SN7560B
|
Untitled
Abstract: No abstract text available
Text: SN75439 QUADRUPLE PERIPHERAL DRIVER SLR S013A- D3116. MAY 1988 - REVISED NOVEMBER 1989 * 1.3-A Current Capability Each Channel * Saturating Outputs With Low On-State Resistance * Two Inverting and Two Noninverting Driver Channels With Common Active-Low Enable
|
OCR Scan
|
PDF
|
SN75439
S013A-
D3116.
SLRS013A-
D3116,
|
Untitled
Abstract: No abstract text available
Text: CDC337 CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS330- DECEMBER 1990- REVISED MARCH 1994 Low Output Skew, Low Pulse Skew for Clock-Distributlon and Clock-Generation Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Distributes One Clock Input to Eight
|
OCR Scan
|
PDF
|
CDC337
SCAS330-
-48-mA
|
|
|
13-VDA
Abstract: No abstract text available
Text: C irv A v i^ iCorportboo a J▼ v SP8542/SP8544 w SIGNAL PROCESSIN G EXCELLENCE Two a n d F ou r C hannel 12-B it M u ltiplexed Sam pling A D C s • Two or Four Channel Input Mux ■ 12 Bit Resolution ■ Single +5Volt Supply ■ Internal 1.25 Volt Reference
|
OCR Scan
|
PDF
|
SP8542/SP8544
SP8542
SP8544
12-Bit
18-pin
13-VDA
|
QS3384
Abstract: QS3L384 SN74CBT3384A
Text: SN74CBT3384A 10-BIT BUS SWITCH S C D S 004F- NOVEMBER 1992 - REVISED AUGUST 1996 • Functionally Equivalent to QS3384 and QS3L384 DB, DW, OR PW PACKAGE TOP VIEW • 5-i2 Switch Connection Between Two Ports 10 E [ 1 1B1 [ 2 • TTL-Compatible Input and Output Levels
|
OCR Scan
|
PDF
|
SN74CBT3384A
10-BIT
SCDS004F
QS3384
QS3L384
SN74CBT3384A
01055B4
QS3L384
|
hc4060
Abstract: HC4060 crystal SN74HC4060 14-STAGE SN54HC4060
Text: SN54HC4060, SN74HC4060 14-STAGE ASYNCHRONOUS BINARY COUNTERS AND OSCILLATORS SC LS 161A - DECEMBER 1 9 8 2 - REVISED JANUARY 1996 • Allow Design of Either RC or Crystal Oscillator Circuits • Package Options Include Plastic Small-Outline D and Ceramic Flat (W)
|
OCR Scan
|
PDF
|
SN54HC4060,
SN74HC4060
14-STAGE
SCLS161A-
300-mil
HC4060
zero82-REVISED
HC4060
HC4060 crystal
SN74HC4060
SN54HC4060
|
SN54ABT16652
Abstract: SN74ABT16652
Text: SN54ABT16652, SN74ABT16652 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS _ Members of the Texas Instruments Wldebus Family State-of-the-Art EPIC-llB™ BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA
|
OCR Scan
|
PDF
|
SN54ABT16652,
SN74ABT16652
16-BIT
SCBS215A-
JESD-17
-32-mA
300-mil
380-mil
25-mil
inbl723
SN54ABT16652
|
oma2541 servo
Abstract: D-12 OMA2541SD OMA2541SK OMA2541SKC skc 1c Basic Dual DC Power Supply 6V
Text: OMA2541 SK OMA2541SKC OMA2541SD DUAL HIGH POWER OPERATIONAL AMPLIFIER 8-Pin TO-3 And 12-Pin DIP, Dual 5 Amp Operational Amplifier FEATURES • Available In Isolated Standard TO-3, “Copper Slug” TO-3 And Power DIP Packages • 5 Amp Peak Output Current
|
OCR Scan
|
PDF
|
OMA2541SK
OMA2541SKC
OMA2541
12-Pin
MIL-STD-883
5081534-5776FAX
oma2541 servo
D-12
OMA2541SD
skc 1c
Basic Dual DC Power Supply 6V
|
mb570
Abstract: Am26LS32 "pin-compatible" SLLS202A AM26C32 AM26LS32 AM26LV31 AM26LV32 AM26LV32C AM26LV32CNSLE TV RECEIVER 1995 IF
Text: AM26LV32C LOW VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER SLLS202A - MAY 1995 - REVISED S E P T E M B E R 1995 32-MHz Switching Rate D OR NST PACKAGE TOP VIEW Operates from a Single 3.3-V Supply Ultra-Low Power Dissipation . . . 27 mW Typ Open-Circuit Fall Safe
|
OCR Scan
|
PDF
|
AM26LV32C
SLLS202A
32-MHz
AM26C32,
AM26LS32,
MB570
AM26LV32CNSLE.
SLLS202A-
mb570
Am26LS32 "pin-compatible"
AM26C32
AM26LS32
AM26LV31
AM26LV32
AM26LV32CNSLE
TV RECEIVER 1995 IF
|
Untitled
Abstract: No abstract text available
Text: O T M D T M IL I F â Ë Q J M S I Final Electrical Specifications LT1630/LT1631 TECHNOLOGY 30MHz, 10V/|as, D u a l/Q u a d Rail-to-Rail Inp u t a n d O u tp u t Precision O p A m ps L if m February 1998 KfìTURCS DCSCRIPTIOn Gain-Bandwidth Product: 30MHz
|
OCR Scan
|
PDF
|
LT1630/LT1631
30MHz,
30MHz
150nA
10OOnA
14-Pin
LT1498/LT1499
10MHz,
LT1632/LT1633
45MHz,
|
Untitled
Abstract: No abstract text available
Text: Micro Linear MLÎ17, ML117R 2,4, or 6-Channel Read/Write Circuits GENERAL DESCRIPTION FEATURES The ML117 devices are bipolar monolithic integrated circuits designed for use with center-tapped ferrite recording heads. They provide a low noise read path, write current control,
|
OCR Scan
|
PDF
|
ML117R
ML117
ML117R
18-Lead
ML117,
ML117-2CP
|
Untitled
Abstract: No abstract text available
Text: r r u r m _ LT1259/LT1260 TECHNOLOGY Low Cost Dual and Triple 130MHz C urrent Feedback Am plifiers with Shutdown K R T U IK S D C S C R IP T IO n • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LT 1259 contains two independent 130MHz current
|
OCR Scan
|
PDF
|
LT1259/LT1260
130MHz
LT1260
LT1203/LT1205
150MHz
LT1204
LT1227
140MHz
100V/ns
|
Untitled
Abstract: No abstract text available
Text: D M T M IL [ M Ü M S E Final Electrical Specifications L i f LTC1484 m TECHNOLOGY Low Power EIA485 Transceiver with Receiver Fail-Safe September 1998 FCRTURCS D C S C R IP TIO n • No Damage or Latchup to ±15kV ESD Human Body Model , IEC-1000-4-2 Level 4 Contact (±8kV)
|
OCR Scan
|
PDF
|
LTC1484
EIA485
IEC-1000-4-2
LTC1483
LTC1485
LTC1487
LTC1690
|
