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    CY7C1362V25 Search Results

    CY7C1362V25 Datasheets (9)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1362V25 Cypress Semiconductor 256K x 36/256K x 32/512K x 18 Pipelined SRAM Original PDF
    CY7C1362V25-100AC Cypress Semiconductor 256Kx 36/ 512Kx 18 Synchronous Pipelined SRAM Scan PDF
    CY7C1362V25-100BAC Cypress Semiconductor 256Kx 36/ 512Kx 18 Synchronous Pipelined SRAM Scan PDF
    CY7C1362V25-133AC Cypress Semiconductor 256Kx 36/ 512Kx 18 Synchronous Pipelined SRAM Scan PDF
    CY7C1362V25-133BAC Cypress Semiconductor 256Kx 36/ 512Kx 18 Synchronous Pipelined SRAM Scan PDF
    CY7C1362V25-166AC Cypress Semiconductor 256Kx 36/ 512Kx 18 Synchronous Pipelined SRAM Scan PDF
    CY7C1362V25-166BAC Cypress Semiconductor 256Kx 36/ 512Kx 18 Synchronous Pipelined SRAM Scan PDF
    CY7C1362V25-200AC Cypress Semiconductor 256Kx 36/ 512Kx 18 Synchronous Pipelined SRAM Scan PDF
    CY7C1362V25-200BAC Cypress Semiconductor 256Kx 36/ 512Kx 18 Synchronous Pipelined SRAM Scan PDF

    CY7C1362V25 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    CY7C1360

    Abstract: CY7C1360V25 CY7C1362V25 CY7C1364V25 intel 80.82
    Text: CY7C1360V25 CY7C1362V25 CY7C1364V25 PRELIMINARY 256K x 36/256K x 32/512K x 18 Pipelined SRAM Features • Supports 200-MHz bus • Fully registered inputs and outputs for pipelined operation • Single 2.5V power supply • Fast clock-to-output times — 3.1 ns for 200-MHz device


    Original
    CY7C1360V25 CY7C1362V25 CY7C1364V25 36/256K 32/512K 200-MHz 166-MHz 133-MHz 100-MHz CY7C1360 CY7C1360V25 CY7C1362V25 CY7C1364V25 intel 80.82 PDF

    intel 80.82

    Abstract: CY7C1360
    Text: CY7C1360V25 CY7C1362V25 PRELIMINARY 256K x 36 / 512K x 18 Synchronous Pipelined SRAM Features • Supports 200-MHz bus • Fully registered inputs and outputs for pipelined operation • Single 2.5V power supply • Fast clock-to-output times — 3.1 ns for 200-MHz device


    Original
    CY7C1360V25 CY7C1362V25 200-MHz 166-MHz 133-MHz 100-MHz 100-pin intel 80.82 CY7C1360 PDF

    CY7C1360V25

    Abstract: CY7C1362V25 CY7C1364V25
    Text: 329 CY7C1360V25 CY7C1362V25 CY7C1364V25 PRELIMINARY 256K x 36/256K x 32/512K x 18 Pipelined SRAM Features • Supports 200-MHz bus • Fully registered inputs and outputs for pipelined operation • Single 2.5V power supply • Fast clock-to-output times — 3.1 ns for 200-MHz device


    Original
    CY7C1360V25 CY7C1362V25 CY7C1364V25 36/256K 32/512K 200-MHz 166-MHz 133-MHz 100-MHz CY7C1360V25 CY7C1362V25 CY7C1364V25 PDF

    CY7C1361V25

    Abstract: CY7C1363V25
    Text: CY7C1361V25 CY7C1363V25 PRELIMINARY 256K x 36 / 512K x 18 Flowthrough SRAM Features Functional Description • Supports 113-MHz bus operations The CY7C1361V25 and CY7C1363V25 are 2.5v, 256K x 36 and 512K x 18 synchronous-flowthrough SRAM designed to interface with high-speed microprocessors with minimal glue


    Original
    CY7C1361V25 CY7C1363V25 113-MHz CY7C1361V25 CY7C1363V25 117-MHz 100-MHz 80-MHz PDF

    2M X 32 Bits 72-Pin Flash SO-DIMM

    Abstract: AN2131QC Triton P54C SO-DIMM 72pin 32bit 5V 2M AN2131-DK001 AN2131SC vhdl code for pipelined matrix multiplication VIC068A user guide parallel interface ts vhdl 7C037
    Text: GO TO WEB MAIN INDEX 3URGXFW 6HOHFWRU *XLGH Static RAMs Organization/Density Overview Density X1 X4 X8 X9 X16 X18 X32 X36 7C148 7C149 7C150 4 Kb 16 Kb 7C167A 7C168A 7C128A 6116 64 Kb to 72 Kb 7C187 7C164 7C166 7C185 6264 7C182 256 Kb to 288 Kb 7C197 7C194


    Original
    7C148 7C149 7C150 7C167A 7C168A 7C128A 7C187 7C164 7C166 7C185 2M X 32 Bits 72-Pin Flash SO-DIMM AN2131QC Triton P54C SO-DIMM 72pin 32bit 5V 2M AN2131-DK001 AN2131SC vhdl code for pipelined matrix multiplication VIC068A user guide parallel interface ts vhdl 7C037 PDF

    CY7C1338-100AXC

    Abstract: gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC
    Text: CYPRESS / GALVANTECH # - Connect pin 14 FT pin to Vss CY7C1019BV33-15VC GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12


    Original
    CY7C1019BV33-15VC GS71108AJ-12 CY7C1019BV33-15VXC GS71108AGJ-12 CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12 CY7C1019CV33-10VC GS71108AJ-10 CY7C1338-100AXC gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC PDF

    CY7C1360

    Abstract: CY7C1360V25 CY7C1362V25
    Text: V CYPRESS CY7C1360V25 CY7C1362V25 PRELIMINARY 256K x36/512K x 18Synchronous Pipelined SRAM Features • Supports 200-M Hz bus • Fully registered inputs and outputs for pipelined oper­ ation All synchronous inputs pass through input registers controlled


    OCR Scan
    CY7C1360V25 CY7C1362V25 256Kx36/512Kx18SynchronousPipelined 200-MHz 166-MHz 133-MHz 100-MHz 100-pin CY7C1360V25 CY7C1360 CY7C1362V25 PDF

    M-25012 states

    Abstract: CY7C1360V25 CY7C1362V25 CY7C1364V25
    Text: ^ „ CY7C1360V25 CY7C1362V25 W ^ T Y P R F .S S PREUm NARY CY7C 1364V25 256K X 36/256K x 32/512K x 18 Pipelined SRAM Features All synchronous inputs pass through input registers controlled by the rising edge of the clock. All data outputs pass through output registers controlled by the rising edge of the clock. Max­


    OCR Scan
    CY7C1360V25 CY7C1362V2 CY7C1364V25 36/256K 32/512K 200-MHz 166-MHz 133-MHz 100-MHz M-25012 states CY7C1360V25 CY7C1362V25 CY7C1364V25 PDF

    CY7C1361V25

    Abstract: CY7C1363V25
    Text: C Y 7 C 1 3 6 1 V 25 C Y 7 C 1 3 6 3 V 25 PRELIMINARY ~= C Y P H hbb = 256K x 36 / 512K x 18 Flowthrough SRAM Functional Description Features • Supports 113-MHz bus operations The CY7C1361V25 and CY7C1363V25 are 2.5v, 256K x 36 and 512K x 18 synchronous-flowthrough SRAM designed to


    OCR Scan
    CY7C1361V25 CY7C1363V25 113-MHz 117-MHz 100-MHz 80-MHz 100-pin CY7C1361V25 CY7C1363V25 PDF