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    CY37192VP Search Results

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    CY37192VP Price and Stock

    Infineon Technologies AG CY37192VP160-66AXC

    IC CPLD 192MC 20NS 160TQFP
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    DigiKey CY37192VP160-66AXC Tray
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    Rochester Electronics LLC CY37192VP160-66AXC

    IC CPLD 192MC 20NS 160TQFP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY37192VP160-66AXC Tray 17
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    Infineon Technologies AG CY37192VP160-100AXC

    IC CPLD 192MC 12NS 160TQFP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
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    Cypress Semiconductor CY37192VP160-66AXC

    CPLD Ultra37000 Family 5.7K Gates 192 Macro Cells 66MHz 3.3V 160-Pin TQFP
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    Verical CY37192VP160-66AXC 22 17
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    Rochester Electronics CY37192VP160-66AXC 22 1
    • 1 $17.78
    • 10 $17.78
    • 100 $16.71
    • 1000 $15.11
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    CY37192VP Datasheets (13)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY37192VP Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37192VP160-100AC Cypress Semiconductor UltraLogic 3.3V 192-Macrocell ISR CPLD Original PDF
    CY37192VP160-100AC Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37192VP160-100AC Cypress Semiconductor 3.3V, ISR High-Performance CPLD Original PDF
    CY37192VP160-100AC Cypress Semiconductor Embedded - CPLDs (Complex Programmable Logic Devices), Integrated Circuits (ICs), IC CPLD 192MC 12NS 160LQFP Original PDF
    CY37192VP160-100AXC Cypress Semiconductor 5V, 3.3V, ISRTM High-Performance CPLDs Original PDF
    CY37192VP160-66AC Cypress Semiconductor 3.3V, ISR High-Performance CPLD Original PDF
    CY37192VP160-66AC Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37192VP160-66AC Cypress Semiconductor UltraLogic 3.3V 192-Macrocell ISR CPLD Original PDF
    CY37192VP160-66AI Cypress Semiconductor 3.3V, ISR High-Performance CPLD Original PDF
    CY37192VP160-66AI Cypress Semiconductor 5V, 3.3V, ISR High-Performance CPLDs Original PDF
    CY37192VP160-66AI Cypress Semiconductor UltraLogic 3.3V 192-Macrocell ISR CPLD Original PDF
    CY37192VP160-66AXC Cypress Semiconductor 5V, 3.3V, ISRTM High-Performance CPLDs Original PDF

    CY37192VP Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    ASE BGA

    Abstract: tsmc mos 45 7C37655B CY37256
    Text: Cypress Semiconductor Product Qualification Report QTP# 99457 Revision 1.3 September 2000 High-Performance CPLDs Family CY37192P CY37192VP UltraLogic 192 Macrocell ISR™ CPLDs CY37256P CY37256VP UltraLogic™ 256 Macrocell ISR™ CPLDs CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA:


    Original     		PDF CY37192P CY37192VP CY37256P CY37256VP CY37192 /CY37256* CY37256P160-AC ASE BGA tsmc mos 45 7C37655B CY37256

    tlp 453

    Abstract: No abstract text available
    Text: fax id: 6151 PRELIMINARY Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 10 ns Features — tS = 5.5 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant


    Original     		PDF Ultra37192V 192-Macrocell IEEE1149 tlp 453

    CY37512P208-100UMB

    Abstract: CY37512P208-100UM CY37032VP44-100AI CY37256P160-83UM CY37064P44-154YMB CY37256P160-125UMB CERAMIC leaded CHIP CARRIER CLCC 68
    Text: Family PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000TM 222-MHz CY37512P208-100UMB CY37512P208-100UM CY37032VP44-100AI CY37256P160-83UM CY37064P44-154YMB CY37256P160-125UMB CERAMIC leaded CHIP CARRIER CLCC 68

    CY37032VP44-100AI

    Abstract: CY37064P44-154YMB CY37512P208-100UMB
    Text: Family Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000TM CY37032VP44-100AI CY37064P44-154YMB CY37512P208-100UMB

    5962-9951902QYA

    Abstract: CY37128P100-125AXC U208 5962-9952301QZC CERAMIC LEADLESS CHIP CARRIER CY37032P44-125JXC CY37512P256-100BGI CY37192 CY37256 CY37384
    Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes


    Original     		PDF Ultra37000 CY37128P160-100AXC, CY37128P100-100AXI, CY37192P160-154AXC, CY37192P160-125AXC, CY37192P160-125AXI, CY37192P160-83AXC, CY37192P160-83AXI, CY37256P160-154AXC, CY37256P160-125AXC, 5962-9951902QYA CY37128P100-125AXC U208 5962-9952301QZC CERAMIC LEADLESS CHIP CARRIER CY37032P44-125JXC CY37512P256-100BGI CY37192 CY37256 CY37384

    Untitled

    Abstract: No abstract text available
    Text: CY37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 12.0 ns Features — tS = 7.0 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant • 3.3V In-System Reprogrammable™ ISR™


    Original     		PDF CY37192V 192-Macrocell

    CY37032VP44-100AI

    Abstract: 5962-9952502QZC 400BA
    Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000 CY37032VP44-100AI 5962-9952502QZC 400BA

    CY37032VP44-100AI

    Abstract: CY37064P44-154YMB
    Text: Family PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000TM 222-MHz 84-Pin 1-80095-A CY37032VP44-100AI CY37064P44-154YMB

    CY37032VP44-100AI

    Abstract: No abstract text available
    Text: Family Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000TM CY37032VP44-100AI

    CY37256P160-125AXI

    Abstract: CY37032P44-125JXC 5962-9952502QZC CY37128P100-125AXC CY37032V 5962-9952301QZC 5962-9952302QZC CY37064P100-125AXI CY37512VP208-66NI tea1400
    Text: Ultra37000 CPLD Family 5V and 3.3V ISR High Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs ❐ JTAG interface for reconfigurability ❐ Design changes do not cause pinout changes ❐ Design changes do not cause timing changes


    Original     		PDF Ultra37000 Ultra37000TM CY37256P160-125AXI CY37032P44-125JXC 5962-9952502QZC CY37128P100-125AXC CY37032V 5962-9952301QZC 5962-9952302QZC CY37064P100-125AXI CY37512VP208-66NI tea1400

    CY37032

    Abstract: CY37032V CY37064 CY37064V CY37128 CY37128V CY37192 CY37256 CY37384 CY37512
    Text: 1Ultra37000 Features Family Ultra37000: December 13, 1996 Revision: March 15, 2001 Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability


    Original     		PDF 1Ultra37000 Ultra37000: Ultra37000TM CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37192 CY37256 CY37384 CY37512

    CY37064

    Abstract: ULTRA37000 CY37032 CY37032V CY37064V CY37128 CY37128V CY37192 CY37256 CY37384
    Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes


    Original     		PDF Ultra37000 CY37128V BB100 CY37032VP44-143JC CY37032VP44-100JC CY37032VP44-100JI CY37064VP44-143JC CY37064VP84-143JC CY37064VP44-100JC CY37064VP84-100JC CY37064 CY37032 CY37032V CY37064V CY37128 CY37192 CY37256 CY37384

    CY37192

    Abstract: CY37192V
    Text: PRELIMINARY CY37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 12 ns Features — tS = 7 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — 3.3V ISR • • • • • • • • • — 5V tolerant • 3.3V In-System Reprogrammable™ ISR™


    Original     		PDF CY37192V 192-Macrocell CY37192 CY37192V

    CY37032P44-154AXI

    Abstract: CY37128P160-125AC 5962-9951902QYA CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37192
    Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes


    Original     		PDF Ultra37000 proY37192P160-83AXI, CY37256P160-154AXC, CY37256P160-125AXC, CY37256P160-125AXI, CY37256P160-83AXC, CY37256P160-83AXI, CY37032VP44-143AXC, CY37032VP44-100AXC, CY37032VP44-100AXI, CY37032P44-154AXI CY37128P160-125AC 5962-9951902QYA CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37192

    CY37032VP44-100AI

    Abstract: CY37512P208-100UM CY37512P208-100UMB CY37064P44-154YMB
    Text: Family Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000TM CY37032VP44-100AI CY37512P208-100UM CY37512P208-100UMB CY37064P44-154YMB

    CY37032VP44-100AI

    Abstract: CY37128P100-125AXC
    Text: Ultra37000 CPLD Family 5V, 3.3V, ISR High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes do not cause pinout changes — Design changes do not cause timing changes


    Original     		PDF Ultra37000 CY37192P160-154AXC, CY37192P160-125AXC, CY37192P160-125AXI, CY37192P160-83AXC, CY37192P160-83AXI, CY37256P160-154AXC, CY37256P160-125AXC, CY37256P160-125AXI, CY37256P160-83AXC, CY37032VP44-100AI CY37128P100-125AXC

    Untitled

    Abstract: No abstract text available
    Text: Ultra37000 CPLD Family 5 V and 3.3 V ISR High Performance CPLDs 5 V and 3.3 V ISR™ High Performance CPLDs General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs ❐ JTAG interface for reconfigurability ❐ Design changes do not cause pinout changes


    Original     		PDF Ultra37000

    CY37064P44-154YMB

    Abstract: CY37512P208-100UMB CY37256P160-125UMB CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37032VP44-100AI
    Text: Family Ultra37000 CPLD Family[1] 5V, 3.3V, ISR™ High-Performance CPLDs Features General Description • In-System Reprogrammable™ ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    Original     		PDF Ultra37000TM CY37064P44-154YMB CY37512P208-100UMB CY37256P160-125UMB CY37032 CY37032V CY37064 CY37064V CY37128 CY37128V CY37032VP44-100AI

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY CY37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 12 ns Features — ts = 7 n s • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 6.5 ns Product-term clocking IEEE 1149.1 JTAG boundary scan Programmable slew rate control on individual l/Os


    OCR Scan     		PDF CY37192V 192-Macrocell 160-pin

    Untitled

    Abstract: No abstract text available
    Text: CY37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD Features — tpD = 12 ns — ts = 7 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 6 .5 ns • Product-term clocking — 3.3V ISR • IEEE 1149.1 JTAG boundary scan


    OCR Scan     		PDF CY37192V 192-Macrocell

    clcc land pattern

    Abstract: CY37512VP208-66UMB CY37032VP44-100AI CY37064P44-154YMB CY37256P160-125UMB TO-220AB/clcc land pattern
    Text: CYPRESS PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs General Description Features • In-System Reprogram mable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    OCR Scan     		PDF Ultra37000TM Ultra37000 22V10 clcc land pattern CY37512VP208-66UMB CY37032VP44-100AI CY37064P44-154YMB CY37256P160-125UMB TO-220AB/clcc land pattern

    l0249

    Abstract: CY37032VP44-100AI
    Text: CYPRESS PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs General Description Features • In-System Reprogram mable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes


    OCR Scan     		PDF Ultra37000TM Ultra37000 22V10 84-Pin l0249 CY37032VP44-100AI

    ncl016

    Abstract: No abstract text available
    Text: •gg P R E L IM IN A R Y ^^^B88888888888888888888SSi^ Ultra37192V UltraLogic 3.3V 192-Macrocell ISR™ CPLD — tPD = 12 ns Features — ts = 7 n s • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation — tco = 6.5 ns Product-term clocking


    OCR Scan     		PDF B88888888888888888888SSi^ Ultra37192V 192-Macrocell IEEE1149 160-pin ncl016

    CY37192

    Abstract: CY37192V cypress ultra37000 jtag
    Text: ww.vi fv«/ kvv' UltraLogic 3.3V 192-Macrocell ISR™ CPLD — ts = 7.0 ns Features — tco = 6.0 ns • 192 macrocells in twelve logic blocks • IEEE standard 3.3V operation 3.3V ISR • • • • • • • • • — 5V tolerant • 3.3V In-System Reprogrammable™ ISR™


    OCR Scan     		PDF CY37192V 192-Macrocell CY37192 CY37192V cypress ultra37000 jtag