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    74LS157 PIN DIAGRAM Search Results

    74LS157 PIN DIAGRAM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    CS-DSDMDB09MF-010 Amphenol Cables on Demand Amphenol CS-DSDMDB09MF-010 9-Pin (DB9) Deluxe D-Sub Cable - Copper Shielded - Male / Female 10ft Datasheet
    CS-DSDMDB15MF-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB15MF-002.5 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Female 2.5ft Datasheet
    CS-DSDMDB15MM-025 Amphenol Cables on Demand Amphenol CS-DSDMDB15MM-025 15-Pin (DB15) Deluxe D-Sub Cable - Copper Shielded - Male / Male 25ft Datasheet
    CS-DSDMDB25MM-010 Amphenol Cables on Demand Amphenol CS-DSDMDB25MM-010 25-Pin (DB25) Deluxe D-Sub Cable - Copper Shielded - Male / Male 10ft Datasheet
    CS-DSDMDB37MM-002.5 Amphenol Cables on Demand Amphenol CS-DSDMDB37MM-002.5 37-Pin (DB37) Deluxe D-Sub Cable - Copper Shielded - Male / Male 2.5ft Datasheet

    74LS157 PIN DIAGRAM Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LS157

    Abstract: 74ls157 pin diagram 74LS157 datasheet TTL 74ls157 ls157 Motorola LS157 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS157 functions
    Text: SN54/74LS157 QUAD 2-INPUT MULTIPLEXER The LSTTL / MSI SN54 / 74LS157 is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs present the selected data in the


    Original     		PDF SN54/74LS157 74LS157 LS157 74ls157 pin diagram 74LS157 datasheet TTL 74ls157 Motorola LS157 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS157 functions

    EZ-030

    Abstract: PAL16V8 palace16v8 EPROM 27c010 function of AM29000 ez030 27C010 AM85C30 74LS157s 74ls157 pin diagram
    Text: EZ-030 Demonstration Board Theory of Operation Advanced Micro Devices Application Note by David Stoenner Most microprocessor evaluation and demonstration circuits are designed to illustrate the highest performance and flexibility the microprocessor can deliver, but without ease-of-design considerations.


    Original     		PDF EZ-030 Am29030 Am29030TM 29KTM Am29000 Am29005 Am29035 Am29050 PAL16V8 palace16v8 EPROM 27c010 function of AM29000 ez030 27C010 AM85C30 74LS157s 74ls157 pin diagram

    74LS157 datasheet

    Abstract: 74LS157 diode 0750 circuit diagram of 32-1 multiplexer motorola zc data sheet 74ls157 LS157 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
    Text: SN54/74LS157 QUAD 2-INPUT MULTIPLEXER The LSTTL / MSI SN54 / 74LS157 is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs present the selected data in the


    Original     		PDF SN54/74LS157 74LS157 LS157 74LS157 datasheet diode 0750 circuit diagram of 32-1 multiplexer motorola zc data sheet 74ls157 SN54LSXXXJ SN74LSXXXD SN74LSXXXN

    DB25 LPT

    Abstract: 74LS157 datasheet 6264 adc TTL 74ls157 lpt oscilloscope parallel port 378H STATIC RAM 6264 DB25 connector datasheet for printer external RAM ic 6264 centronics db25 programming
    Text: Homebrew Hardware: Parallel port ADC 8-bit ZN448E-based ADC to interface to a PC parallel port Copyright W.A. Steer 1995 Note on Parallel Port notation -The usual I/O base addresses for parallel ports are: 3BCh 378h 278h Port on Monochrome display adapter


    Original     		PDF ZN448E-based zcapl31/LptADC DB25 LPT 74LS157 datasheet 6264 adc TTL 74ls157 lpt oscilloscope parallel port 378H STATIC RAM 6264 DB25 connector datasheet for printer external RAM ic 6264 centronics db25 programming

    Untitled

    Abstract: No abstract text available
    Text: GD54/74LS157 QUADRUPLE 2-T0-1-LINE DATA SELECTORS/MULTIPLEXERS NON INVERTED DATA OUTPUTS Feature • • Buffered Inputs and Outputs Common Strobe/Select input for all 4 circuits. Pin Configuration INPUTS Vcc S TRO BE 4 A 4B G 4B INPUTS O U TP U T -. O UTPUT


    OCR Scan     		PDF GD54/74LS157

    74157 pin diagram

    Abstract: TTL 74153 74s157 pin diagram fairchild 9312 74157 D157 Fairchild 9322 93L09 74S153 93L22
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL - T T L D154 54/74170, 54LS/74LS170, 54LS/74LS670 15 H 1 2 3 12 11 10 I M Ew Ü2 Dl D3 loa I la 1 3 - W b 1 3 - So 5 - Ra 3 - S i N T 14 11 10 6 T 7 E lo 11 3 3 5 6 S 11— 0 CP 7 lOb 11b lOc l i e


    OCR Scan     		PDF 54LS/74LS170, 54LS/74LS670 93L09 54LS/74LS298 93L22, 54S/74S157, 54LS/74LS157, 54S/74S158, 54LS/74LS158, 54S/74S257 74157 pin diagram TTL 74153 74s157 pin diagram fairchild 9312 74157 D157 Fairchild 9322 93L09 74S153 93L22

    LS157

    Abstract: No abstract text available
    Text: M M O T O R O L A . SN54/74LS157 QUAD 2-INPUT MULTIPLEXER The LS TTL/M SI S N 54/74LS 157 is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs present the selected data in the


    OCR Scan     		PDF 54/74LS LS157

    74ls157

    Abstract: 1251U
    Text: <8> MOTOROLA SN54/74LS157 D E S C R IP T IO N — The LS T T L /M S IS N 5 4 LS /7 4 LS 1 57 is a high speed Quad 2-Input Multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four buffered outputs present the selected data in the true non-inverted form. The


    OCR Scan     		PDF SN54/74LS157 LS157 74ls157 1251U

    74157

    Abstract: 54LS 74LS151 74LS258 74LS152 93L09 D161 Fairchild 93l09 93L22 74152A
    Text: FAIRCHILD OC = open collector, 3S = 3-state Unit Load UL = 40 ¿¿A HIGH/1 6 mA LOW DIGITAL FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D154 54/74170, 54LS/74LS170, 54LS/74LS670 12 15 1 2 D156 54/74298, 54LS/74LS298 D155 9309, 93L09 3 12 11 10 9 4 5 6 7


    OCR Scan     		PDF 54LS/74LS170, 54LS/74LS670 93L09 54LS/74LS298 93L22, 54S/74S157, 54LS/74LS157, 54S/74S158, 54LS/74LS158, 54S/74S257, 74157 54LS 74LS151 74LS258 74LS152 D161 Fairchild 93l09 93L22 74152A

    MUX 74157

    Abstract: 74157 mux 74153 mux mux 74153 74298 quad 2 in mux ttl 74157 TTL 74153 MUX 74151 pin diagram of 74153 74153 8bit
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D154 54/74170, 54LS/74LS170, 54LS/74LS670 12 15 1 2 3 H I M Ew Dl Ü2 D156 54/74298, 54LS/74LS298 D155 9309, 93L09 12 11 10 D3 9 4 5 6 7 3 1 3 - So 5 - Ra 3 - Si 6 o o o ec UJ 7 N N 14 15


    OCR Scan     		PDF 54LS/74LS170, 54LS/74LS670 93L09 54LS/74LS298 93L22, 54S/74S157, 54LS/74LS157, 54S/74S158, 54LS/74LS158, 54S/74S257 MUX 74157 74157 mux 74153 mux mux 74153 74298 quad 2 in mux ttl 74157 TTL 74153 MUX 74151 pin diagram of 74153 74153 8bit

    74LS152

    Abstract: TTL 74153 74157 54LS ttl 74157 74170 74LS151 74S153 74S253 93L09
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D154 54/74170, 54LS/74LS170, 54LS/74LS670 HIM 15 Ew Wa 1 3 - Wb 5 - Ra 4 - Rb 2 Ü2 Dl 3 12 11 10 D3 1 3 - So 3 - Si o 6 o o ec UJ TTTTf 10 4 5 9 7 6 Ì2a l3a lob lib 3 3 14 15 5 6


    OCR Scan     		PDF 54LS/74LS170, 54LS/74LS670 93L09 54LS/74LS298 93L22, 54S/74S157, 54LS/74LS157, 54S/74S158, 54LS/74LS158, 54S/74S257 74LS152 TTL 74153 74157 54LS ttl 74157 74170 74LS151 74S153 74S253 93L09

    D157

    Abstract: 74157 pin diagram D159 74LS258 74LS573 F 9309 ttl 7491 93L22 93L09 D177
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D177 9328, 93L28 D178 54/7491 D179 54LS/74LS573 2 3 Do D i Da Q h - 13 CP Oh 4 5 6 7 Ds D e D ? D2 D a D4 Û2 O s 04 0 5 O e Q? 1 1 - LE 1 “O - 14 OE Oo Q i I 1I I I I I I 19 18 17 16 15 14 13 12


    OCR Scan     		PDF 93L28 54LS/74LS573 54LS/74LS352 54LS/74LS353 54LS/74LS153 54S/74S153 54LS/74LS253 54S/74S253 54LS/74LS352 54LS/74LS353 D157 74157 pin diagram D159 74LS258 74LS573 F 9309 ttl 7491 93L22 93L09 D177

    74157PC

    Abstract: No abstract text available
    Text: 157 CONNECTION DIAGRAM PINOUT A '54/74157 O U l c l - l 54S/74S157 o n I S I 54LS/74LS157 0 /// s ° QUAD 2-INPUT MULTIPLEXER LOGIC SYMBOL DESCRIPTION — The '157 isa high speed quad2-inputmultiplexer. Fourbits of data from two sources can be selected using the common Select and En­


    OCR Scan     		PDF 54S/74S157 54LS/74LS157 54/74S 54/74LS 74157PC

    74LS152

    Abstract: 74151A multiplexers 74151 PIN DIAGRAM 74151A 74ls151 pin diagram 74LS151 pin diagram of 74157 74152A pin diagram of 74153 TTL 74153
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL - T T L D154 54/74170, 54LS/74LS170, 54LS/74LS670 H 1 2 3 12 11 10 I M Ew Dl Ü2 D3 loa I la 1 3 - W b 1 3 - So 5 - Ra 3 - S i 4 - Rb 6 7 14 2 E lo 11 3 3 4 5 6 5 7 6 S 11— 0 CP lOb 11b lOc l i e


    OCR Scan     		PDF 54LS/74LS170, 54LS/74LS670 93L09 54LS/74LS298 93L22, 54S/74S157, 54LS/74LS157, 54S/74S158, 54LS/74LS158, 54S/74S257 74LS152 74151A multiplexers 74151 PIN DIAGRAM 74151A 74ls151 pin diagram 74LS151 pin diagram of 74157 74152A pin diagram of 74153 TTL 74153

    74157 pin diagram

    Abstract: 74LS157 signetics 74s157 pin diagram pin diagram of 74157
    Text: 74157, 74158, LS157, LS158, S157, S158 Signetics Data Selectors/Multiplexers '157 Quad 2-Input Data Selector/Multiplexer Non-lnverted '158 Quad 2-Input Data Selector/Multiplexer (Inverted) Logic Products Product Specification DESCRIPTION The '157 is a quad 2-input m ultiplexer


    OCR Scan     		PDF LS157, LS158, 74157 pin diagram 74LS157 signetics 74s157 pin diagram pin diagram of 74157

    74157

    Abstract: 74158 binary+to+gray+code+conversion+using+ic+74157 74LS157 signetics 74157 pin diagram pin diagram of 74157 74158 pin diagram
    Text: 74157, 74158, LS157, LS158, S157, S158 Signetics Logic Products 1 Data Selectors/Multiplexers DESCRIPTION T h e '1 5 7 is a quad 2-input multiplexer TYPICAL PROPAGATION DELAY TYPE TYPICAL SUPPLY CURRENT TOTAL which selects four bits of data from two sources under the control of a com mon


    OCR Scan     		PDF

    Untitled

    Abstract: No abstract text available
    Text: H D 74LS157. 'Quadruple 2-line-to-1-line Data Selectors/Multiplexers noninverted outputs IP IN ARRANGEMENT This data selector/multiplexer contains inverters and drivers to supply fu ll on-chip data selection to the four output gates. A separate strobe input is provided. A 4-bit word is selected


    OCR Scan     		PDF HD74LS157 T-90-10 74LSOO ib203

    74153 mux

    Abstract: MUX 74157 74174 shift register 74157 mux mux 74153 74LS152 CI 74151 D flip-flop 74175 pin 74152 mux 74157
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL - T T L D154 54/74170, 54LS/74LS170, 54LS/74LS670 15 H 1 2 3 12 11 10 I M Ew Ü2 Dl D3 loa I la 1 3 - W b 1 3 - So 5 - Ra 3 - S i 6 6 o o o ec UJ 7 N 14 15 2 2 3 3 4 5 6 lo 11 l2 l3 CP 1 9


    OCR Scan     		PDF 54LS/74LS170, 54LS/74LS670 93L09 54LS/74LS298 93L22, 54S/74S157, 54LS/74LS157, 54S/74S158, 54LS/74LS158, 54S/74S257 74153 mux MUX 74157 74174 shift register 74157 mux mux 74153 74LS152 CI 74151 D flip-flop 74175 pin 74152 mux 74157

    LTBKN

    Abstract: 1S2074 74LSOO HD74LS157
    Text: H D 74LS157. 'Quadruple 2-line-to-1-line Data Selectors/Multiplexers noninverted outputs IP IN ARRANGEMENT This data selector/multiplexer contains inverters and drivers to supply full on-chip data selection to the four output gates. A separate strobe input is provided. A 4-bit word is selected


    OCR Scan     		PDF HD74LS157. QQ14CI14 DG-14 06max 20-IU8 OG-16 DG-24 LTBKN 1S2074 74LSOO HD74LS157

    74157 pin diagram and truth table

    Abstract: 74157PC Pinout diagram of 74LS157 Pinout diagram of 74S157 74LS157 74S157PC 74LS157PC 74157 74157 pin diagram 54LS157DM
    Text: 157 C O N N E C T IO N D IA G R A M PINOUT A 's a î i a ï s t 54S/74S157 o n i s I 54LS/74LS157 0 / / / s o 16] Vc • E QU A D 2-INPUT MULTIPLEXER io .|T Ü ]É lia [7 14] loc * E « ] lie iob n r Ï 2 ] Ze iib [T ÎT Ilo a Z b [7 T5? lig [b l]z < i g n d


    OCR Scan     		PDF 54S/74S157 54LS/74LS157 74157PC, 74S15 54/74S 54/74LS 74157 pin diagram and truth table 74157PC Pinout diagram of 74LS157 Pinout diagram of 74S157 74LS157 74S157PC 74LS157PC 74157 74157 pin diagram 54LS157DM

    Untitled

    Abstract: No abstract text available
    Text: SANYO SEMICONDUCTOR - CORP IS E D I o > 3006B CMOS High-Speed Standard Logic LC74HC Senes Quad 2-!nput Noninverting Data Selector/Multiplexer - £2225 Features The LC74HC157 selects a 4-bit word from either the A or B inputs, as determined by the SEL input, and transfer it


    OCR Scan     		PDF 3006B LC74HC LC74HC157 74LS157)

    gg70

    Abstract: TTL 74ls157
    Text: SAN YO S E M I C O N D U C T O R CORP S3E D 7^70?^ G O l G M H b bê? • TSAJ O rdering number : E N 3 7 4 7 r -£ 7- 2 1 -SI i SAVYO MLC74HC157 AM No.3747 CMOS High-Speed S tandard Logic i Quad 2-Input N oninverting Data Selector/M ultiplexer F e a tu re s


    OCR Scan     		PDF MLC74HC157 MLC74HC157AM 74LS157) gg70 TTL 74ls157

    54hct157

    Abstract: No abstract text available
    Text: r z T SGS-THOMSON i i 54HCT157/15i? ^ 7 # [M ^(am[iiM(g«S_ M74HCT157/158 HCT157 QUAD 2 CHANNEL MULTIPLEXER HCT158 QUAD 2 CHANNEL MULTIPLEXER (INV. H IG H S P E E D tpD = 21 ns (TYP.) AT Vcc = 5 V LOW POWER DISSIPATION Icc = 4 |iA (MAX.) AT T a = 25 °C


    OCR Scan     		PDF 54HCT157/15i? M74HCT157/158 HCT157 HCT158 M54HCTXXXF1R M74HCTXXXM1R M74HCTXXXB1R M74HCTXXXC1R 54/74LS157/158 54hct157

    HC157

    Abstract: 74HC157 M74HCXXX HC158 M74HC157 M74HC158 74HC157 equivalent BY157
    Text: M54HC157/158 M74HC157/158 S G S -T H O M S O N iM]D Ëi @a,i©Tr ©iiaoËS HC157 QUAD 2-CHANNEL MULTIPLEXER HC158 QUAD 2-CHANNEL MULTIPLEXER (INV. HIGH SPEED tpo = 10 ns (TYP.) at V c c = 5V LOW POWER DISSIPATION lcc = 4 /tA (MAX.) at TA = 25°C HIGH NOISE IMMUNITY


    OCR Scan     		PDF M54HC157/158 M74HC157/158 HC157 HC158 54/74LS157/158 M54/74HC157 M54/74HC158 74HC157 M74HCXXX M74HC157 M74HC158 74HC157 equivalent BY157