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    74LS139 Search Results

    74LS139 Result Highlights (5)

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    74LS139FPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS139P-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    SN74LS139ADRE4 Texas Instruments Dual 2-line to 4-line decoders / demultiplexers 16-SOIC 0 to 70 Visit Texas Instruments Buy
    SN74LS139AN Texas Instruments Dual 2-line to 4-line decoders / demultiplexers 16-PDIP 0 to 70 Visit Texas Instruments Buy
    SN74LS139ADR Texas Instruments Dual 2-line to 4-line decoders / demultiplexers 16-SOIC 0 to 70 Visit Texas Instruments Buy
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    74LS139 Price and Stock

    Texas Instruments SN74LS139ADR

    IC DECODER/DEMUX 1X2:4 16SOIC
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    Texas Instruments SN74LS139ANSR

    IC DECODER/DEMUX 1 X 2:4 16SO
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    Texas Instruments SN74LS139AN

    IC DECODER/DEMUX 1X2:4 16DIP
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    Component Electronics, Inc SN74LS139AN 1,179
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    Texas Instruments SN74LS139AD

    IC DECODER/DEMUX 1X2:4 16SOIC
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    Rochester Electronics SN74LS139AD 22,452 1
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    Component Electronics, Inc SN74LS139AD 108
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    Win Source Electronics SN74LS139AD 3,338
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    Rochester Electronics LLC DM74LS139SJ

    DECIMAL DECODER, LS SERIES
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    74LS139 Datasheets (13)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LS139 Fairchild Semiconductor Decoder/Demultiplexer Original PDF
    74LS139 Hitachi Semiconductor Dual 2-line-to-4-line Decoders/Demultiplexers Original PDF
    74LS139 Motorola DUAL 1-OF-4 DECODER/ DEMULTIPLEXER Original PDF
    74LS139 National Semiconductor Decoders/Demultiplexers Original PDF
    74LS139 On Semiconductor LOW POWER SCHOTTKY Original PDF
    74LS139 Texas Instruments DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS Original PDF
    74LS139 Fairchild Semiconductor Full Line Condensed Catalogue 1977 Scan PDF
    74LS139 Raytheon Decoders / Demultiplexers Scan PDF
    74LS139 Signetics Decoder / Demultiplexer Scan PDF
    74LS139 Signetics Decoders/Demultiplexers Scan PDF
    74LS139 Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74LS139C Unknown TTL Data Book 1980 Scan PDF
    74LS139M Unknown TTL Data Book 1980 Scan PDF

    74LS139 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    demultiplexer truth table

    Abstract: 74ls139 datasheet 74ls139 decoder SN54/74LS139 transistor motorola 236 LS139 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS139 application
    Text: SN54/74LS139 DUAL 1-OF-4 DECODER/ DEMULTIPLEXER The LSTTL/MSI SN54/74LS139 is a high speed Dual 1-of-4 Decoder /Demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW Outputs. Each


    Original
    SN54/74LS139 SN54/74LS139 LS139 demultiplexer truth table 74ls139 datasheet 74ls139 decoder transistor motorola 236 SN54LSXXXJ SN74LSXXXD SN74LSXXXN 74LS139 application PDF

    ATML U 010

    Abstract: ATML H 010 1S2074 400M 74LSOO HD74LS139 OG-16 L400M ATML 010
    Text: H D 74LS139. Dual 2-line-to-4-line Decoders/Demultiplexers IPIN ARRANGEMENT The H 74LS139 comprises two individual two-line-to-fourline decoder in a single package. The active-low enable input can be used as a data line in demultiplexing applications. IBLOCK DIAGRAM


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    HD74LS139 QQ14CI14 DG-14 06max 20-IU8 OG-16 DG-24 ATML U 010 ATML H 010 1S2074 400M 74LSOO OG-16 L400M ATML 010 PDF

    74191 8 bit

    Abstract: 7443 Flip-Flop D134 7443 d Flip-Flop 74LS42 74155 9B23 D135 93L38 93L11
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


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    74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74191 8 bit 7443 Flip-Flop D134 7443 d Flip-Flop 74LS42 74155 9B23 D135 93L38 93L11 PDF

    74LS190 PIN diagram

    Abstract: ttl 7442 74LS42 74LS138 pin diagram D134 7442 pin diagram 74155 74145 D133 93L01
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


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    74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74LS190 PIN diagram ttl 7442 74LS42 74LS138 pin diagram D134 7442 pin diagram 74155 74145 D133 93L01 PDF

    7448 decoder

    Abstract: ID 9302 Fairchild 74190 pin diagram decoder 7447 TTL 7448 74LS47 74LS47 pin TTL 7446 decoder 74LS47 decoder 7448
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 G N D = Pin 8 Vcc = Pin 16 G N D = Pin 8


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    74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 7448 decoder ID 9302 Fairchild 74190 pin diagram decoder 7447 TTL 7448 74LS47 74LS47 pin TTL 7446 decoder 74LS47 decoder 7448 PDF

    transistor d133

    Abstract: Decoder BCD 7 seg ttl 7442 transistor 6B 7-seg ANODE COMMON 74155 74LS247 pin diagram of 74LS247 ttl 74191 75491
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -T T L D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


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    74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 transistor d133 Decoder BCD 7 seg ttl 7442 transistor 6B 7-seg ANODE COMMON 74155 74LS247 pin diagram of 74LS247 ttl 74191 75491 PDF

    Untitled

    Abstract: No abstract text available
    Text: LS TTL DN74LS Series 74LS139 74LS139 Dual 2 -lin e to 4 -lin e Decoders / Demultiplexers H Description P -2 D N 74LS139 contains tw o 2-bit binary to quaternary de­ coder/dem ultiplexer circuits, each w ith independent enable input term inals. • Features


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    DN74LS DN74LS139 74LS139 16-pin PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74LS139 DUAL 2-TO-4-LINE DECODERS/DEMULTIPLEXERS Feature Pin Configuration • • Designed Specifically for High Speed Memory Decoders and Data Transmission Systems Schottky Clamped for High Performance Vçç SELECT DATA OUTPUTS ENABLE^_ _


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    GD54/74LS139 PDF

    SP74SC139N

    Abstract: 74ls139 decoder pin configuration 74LS139 SP74SC139F E332A
    Text: / SP74SC139 DECODER/DEMULTIPLEXER PIN CO NFIGURATIO N 1G [ T v cc 1A [T Ï3 2G FEATURES • Designed for high performance memory decoders in microprocessor sytems ■ Two independent 2 to 4 line Decoders/ Demultiplexers with inverted outputs ■ Pin compatible with 74LS139


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    SP74SC139 74LS139 SP74SC139 74LS139. SP74SC139N 74ls139 decoder pin configuration 74LS139 SP74SC139F E332A PDF

    74LS139

    Abstract: 74l513 demultiplexer 74ls 74ls signetics pin diagram of 74LS 74LS 74S139 93L21 N74LS139D N74LS139N
    Text: 74LS139, S139 Signetics Decoders/Demultiplexers Dual 1-of-4 D e c o d e r/D e m u ltip le x e r Product Specification Logic Products FEATURES • Demultiplexing capability • Two independent 1-of-4 decoders • Multifunction capability • Replaces 9321 and 93L21 for


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    93L21 74LS139, TYPICS139, 1N916, 1N3064, 500ns 74LS139 74l513 demultiplexer 74ls 74ls signetics pin diagram of 74LS 74LS 74S139 N74LS139D N74LS139N PDF

    74LS139PC

    Abstract: 74LS139P 74LS139DC
    Text: ;'1 NATIONAL SEMICOND -CLO.GIO OSE D | bSDllPS 00b3fll? D | 139 139 T-66-21-55 CONNECTION DIAGRAM P IN O U T 54S/74S139 54LS/74LS139 A o a [I i s ] Eb A la [ 7 Î 7 ] Aob Öoa [ T 75] 1 2 ]Ö 0 b Ö 2a [ ? T ijö ib Ô 3 a [T 10] 5 2 b [? ~9~1 0 3 b DESCRIPTION — The *139 is a high speed dual t-of-4 decoder/demulti­


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    00b3fll? 54S/74S139 54LS/74LS139 T-66-21-55 bS01155 54/74LS 54/74S 74LS139PC 74LS139P 74LS139DC PDF

    74HC139M

    Abstract: 74hc139n
    Text: A s e m I R C i c o n H d u S eptem ber 1983 I L D Revised February 1999 c t o r MM74HC139 Dual 2-To-4 Line Decoder equivalent to the 74LS139. All inputs are protected from dam age due to static discharge by diodes to V qq and General Description The M M 74H C 139 deco d e r utilizes advanced silicon-gate


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    MM74HC139 74HC139M 74hc139n PDF

    pin diagram of ic 74ls139

    Abstract: LS 74LS139 74LS139 74ls139 decoder 74ls139 decoder pin configuration decoders 3*8
    Text: 7 4 LS1 3 9 , S139 Decoders/Demultiplexers S ig n e t ic s Dual 1-of-4 Decoder/Demultiplexer Product Specification Logic Products FEATURES TYPICAL PROPAGATION DELAY ENABLE AT 2 LOGIC LEVELS TYPICAL SUPPLY CURRENT (TOTAL) 74LS139 19ns 6.8mA 74S139 6ns 60mA


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    93L21 74LS139 74S139 EnabS139 1N916, 1N3064, 500ns 500ns pin diagram of ic 74ls139 LS 74LS139 74ls139 decoder 74ls139 decoder pin configuration decoders 3*8 PDF

    74LS139

    Abstract: of ic 74ls139 5101 fg
    Text: <8> M O T O R O L A SN54/74LS139 D E S C R I P T I O N — The L S T T L / M S I S N 5 4 L S / 7 4 L S 1 3 9 is a high speed Dual 1-of*4 Decoder/Demultiplexer. T he device h as two independent decoders, each accepting tw o inputs and providing four mutually


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    SN54/74LS139 74LS139 of ic 74ls139 5101 fg PDF

    pin diagram of ic 74ls139

    Abstract: 74LS139 74LS
    Text: Signetics 74LS139, S139 Decoders/Demultiplexers Dual 1-of-4 Decoder/Demultiplexer Product Specification Logic Products FEATURES • Demultiplexing capability • Two independent 1-of-4 decoders • Multifunction capability • Replaces 9321 and 93L21 for higher performance


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    LS139 93L21 74LS139 74S139 500ns 500ns pin diagram of ic 74ls139 74LS PDF

    74LS139

    Abstract: 74ls gate symbols 74LS 1 into 16 demultiplexer circuit diagram using 1 i AM25LS LS 74LS139 Am25LS139
    Text: Am25LS139 • Am54LS/74LS139 Dual 2-Line To 4-Line Decoder/Demultiplexer D IS T IN C T IV E C H AR AC TER ISTIC S FUNCTIONAL DESCRIPTION • • The Am 25LS 139 is a du al 2 -lin e to 4 -lin e d e co d e r/d e m u lti­ p le x e r u n it fa b r ic a te d u s in g a d v a n c e d L o w -P o w e r


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    Am25LS139 Am54LS/74LS139 Am25LS Am54/74LS 440/jA MIL-STD-883 Am25LS Am54LS/74LS Am25LS/54LS/74LS139 74LS139 74ls gate symbols 74LS 1 into 16 demultiplexer circuit diagram using 1 i LS 74LS139 PDF

    74LS139

    Abstract: S139
    Text: 74LS139, S139 Signetìcs Decoders/Demultiplexers Dual 1-of-4 D e c o d e r/D e m u ltip le x er Product Specification Logic Products FEA TUR ES • Demultiplexing capability • Two independent 1-of-4 decoders • Multifunction capability • Replaces 9321 and 93L21 for


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    74LS139, 93L21 74LS139 74S139 1N916, 1N3064, 500ns 500ns S139 PDF

    Untitled

    Abstract: No abstract text available
    Text: Am25LS139 • Am54LS/74LS139 Dual 2-Line To 4-Line Decoder/Demultiplexer D IS T IN C T IV E C H A R A C T E R IS T IC S FUNCTIONAL DESCRIPTION • • T h e A m 2 5 L S 1 3 9 is a du al 2 -lin e to 4 -lin e d e c o d e r/d e m u lti­ p le x e r u n it f a b r ic a te d u s in g a d v a n c e d L o w - P o w e r


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    Am25LS139 Am54LS/74LS139 25LS/54LS/74LS139 PDF

    Untitled

    Abstract: No abstract text available
    Text: H D 74LS139. Dual 2-line-to-4-line Decoders/Demultiplexers IPIN ARRANGEMENT The 74LS139 comprises two individual two-line-to-fourline decoder in a single package. The active-low enable input can be used as a data line in demultiplexing applications. IBLOCK DIAGRAM


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    HD74LS139. HD74LS139 T-90-10 ib203 PDF

    DN74LS139

    Abstract: MA161
    Text: I LS T T L DN74LS Series 74LS139 74LS139 Dual 2 - lin e to 4 - lin e D ecoders / D em ultiplexers I Description P -2 D N 74LS139 contains tw o 2-bit binary to quaternary de­ coder/dem ultiplexer circuits, each w ith independent enable input term inals.


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    DN74LS DN74LS139 DN74LS139 16-pin SO-16D) MA161 PDF

    74LS139

    Abstract: M16A M16D MM74HC139 MM74HC139M MM74HC139MTC MM74HC139SJ MTC16 diode D254
    Text: Revised February 1999 E M IC O N D U C T O R T M MM74HC139 Dual 2-To-4 Line Decoder General Description equivalent to the 74LS139. All inputs are protected from dam age due to static discharge by diodes to V qq and T he M M 74H C 139 d ecoder utilizes advanced silicon-gate


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    MM74HC139 MM74HC139 74LS139 M16A M16D MM74HC139M MM74HC139MTC MM74HC139SJ MTC16 diode D254 PDF

    74LS138

    Abstract: 7443 ttl 74155 ttl 74191 7443 TTL 74ls138 74LS139 74LS191 74ls138 fairchild TTL 74145
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


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    74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74LS138 7443 ttl 74155 ttl 74191 7443 TTL 74ls138 74LS139 74LS191 74ls138 fairchild TTL 74145 PDF

    74LS190 PIN diagram

    Abstract: presettable digital clock ttl 74191 Fairchild 74190 74LS191 74155 D130 74192 74ls192 pin diagram of 74163
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


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    74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74LS190 PIN diagram presettable digital clock ttl 74191 Fairchild 74190 74LS191 74155 D130 74192 74ls192 pin diagram of 74163 PDF

    74191 8 bit

    Abstract: D flip-flop 74175 pin 74LS152 74155 D134 D132 74155 PIN DIAGRAM 7442 logic diagram D133 93L21
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL D130 54/74190, 74LS190 54/74191, 74LS191 D132 54/74155, 54LS/74LS155 54/74156, 54LS/74LS156 D131 9321, 93L21, 54/74S139, 54LS/74LS139 15 14 13 TTTT 12 11 10 9 Vcc = Pin 16 GND = Pin 8 Vcc = Pin 16 GND = Pin 8


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    74LS190 74LS191 93L21, 54/74S139, 54LS/74LS139 54LS/74LS155 54LS/74LS156 93L01, 93L34, 54LS/74LS259 74191 8 bit D flip-flop 74175 pin 74LS152 74155 D134 D132 74155 PIN DIAGRAM 7442 logic diagram D133 93L21 PDF