Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    74 TTL INVERTER OR GATE Search Results

    74 TTL INVERTER OR GATE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    54H53FM Rochester Electronics LLC 54H53 - AND-OR-Invert Gate, TTL, CDFP14 Visit Rochester Electronics LLC Buy
    5451FM Rochester Electronics LLC 5451 - AND-OR-Invert Gate, TTL, CDFP14 Visit Rochester Electronics LLC Buy
    MC2104L Rochester Electronics LLC AND-OR-Invert Gate, TTL, CDIP14 Visit Rochester Electronics LLC Buy
    MC2104L/R Rochester Electronics LLC MC2104 - AND-OR-Invert Gate, TTL Visit Rochester Electronics LLC Buy
    MC520L Rochester Electronics LLC MC520 - AND-OR-Invert Gate, TTL, CDIP14 Visit Rochester Electronics LLC Buy

    74 TTL INVERTER OR GATE Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LS04 fan-out

    Abstract: 74OL6000 cmos inverter 74OL6011 "1N6263" 74ol6000 equivalent 74OL6001 74OL6010
    Text: HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 74LS04 fan-out 74OL6000 cmos inverter 74OL6011 "1N6263" 74ol6000 equivalent 74OL6001 74OL6010

    74LS04 fan-out

    Abstract: 74OL6011 300w dc to ac inverter 74OL6000 transistor k 4212 ic 74LS04 ttl 74ol6000 equivalent cmos inverter pin configuration 74LS04 74OL6001
    Text: HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 74LS04 fan-out 74OL6011 300w dc to ac inverter 74OL6000 transistor k 4212 ic 74LS04 ttl 74ol6000 equivalent cmos inverter pin configuration 74LS04 74OL6001

    74ol6000 equivalent

    Abstract: 74OL6000 74LS04 fan-out 300w dc to ac inverter 74OL6011 ttl inverter 74LS04 74ls04 not transistor k 4213 cmos inverter
    Text: HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 74ol6000 equivalent 74OL6000 74LS04 fan-out 300w dc to ac inverter 74OL6011 ttl inverter 74LS04 74ls04 not transistor k 4213 cmos inverter

    ttl inverter

    Abstract: INVERTER TRANSFORMERS design 74LS04 fan-out 74OL6000 74OL6000-6010 UF74OL 74OL6011 pin configuration 74LS04 trace inverter schematic 74ol6000 equivalent
    Text: OPTOPLANAR HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 ttl inverter INVERTER TRANSFORMERS design 74LS04 fan-out 74OL6000 74OL6000-6010 UF74OL 74OL6011 pin configuration 74LS04 trace inverter schematic 74ol6000 equivalent

    74LS04 fan-out

    Abstract: pin configuration 74LS04 74ol6000 equivalent 5v cmos inverter inverter source code cmos inverter ttl inverter operation 300w dc to ac inverter inverter dc to ac 74OL6000
    Text: OPTOPLANAR HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 74LS04 fan-out pin configuration 74LS04 74ol6000 equivalent 5v cmos inverter inverter source code cmos inverter ttl inverter operation 300w dc to ac inverter inverter dc to ac 74OL6000

    ttl inverter

    Abstract: 7ls04
    Text: OPTOPLANAR HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 P01101067 74OL6001300 74OL6001300W 74OL60013S 74OL60013SD ttl inverter 7ls04

    74LS04 fan-out

    Abstract: 74OL6011 6010 OPTOCOUPLER
    Text: OPTOPLANAR HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 P01101067 74OL6011 74OL6011300 74OL6011300W 74OL60113S 74OL60113SD 74LS04 fan-out 6010 OPTOCOUPLER

    74OL6011

    Abstract: No abstract text available
    Text: OPTOPLANAR HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 P01101067 74OL6000300 74OL6000300W 74OL60003S 74OL60003SD 74OL6011

    74LS04 fan-out

    Abstract: 74LS04 fan-in 7ls04 6010 OPTOCOUPLER 74OL6011
    Text: OPTOPLANAR HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 P01101067 74OL6010300 74OL6010300W 74OL60103S 74OL60103SD 74LS04 fan-out 74LS04 fan-in 7ls04 6010 OPTOCOUPLER 74OL6011

    74ol6000 cross

    Abstract: 2n2222 TRANSISTOR 74OL6011
    Text: HIGH-SPEED LOGIC-TO-LOGIC OPTOCOUPLERS TTL BUFFER TTL INVERTER CMOS BUFFER CMOS INVERTER LSTTL TO PACKAGE 6 74OL6000 74OL6001 74OL6010 74OL6011 SYMBOL BUFFER 6 1 1 INVERTER 6 1 DESCRIPTION OPTOLOGIC is the first family of truly logic compatible optically coupled logic interface gates.


    Original     		PDF 74OL6000 74OL6001 74OL6010 74OL6011 P01101067 E90700, 74ol6000 cross 2n2222 TRANSISTOR 74OL6011

    74AHC1G132

    Abstract: ttl inverter TTL 3 input or gate VHC1G50 74 ttl inverter or gate TTL nand 74AHCT1G132 VHC1GT50 VHC1G04 VHC1GT04
    Text: HC Portfolio Comparison PART # VHC1G00 VHC1GT00 VHC1G01 VHC1G02 VHC1GT02 VHC1G03 VHC1GT03 VHC1G04 VHC1GT04 VHC1GU04 VHC1G05 VHC1GT05 VHC1G06 VHC1GT06 VHC1G07 VHC1GT07 VHC1G08 VHC1GT08 VHC1G09 VHC1G14 VHC1GT14 VHC1G32 VHC1GT32 VHC1G50 VHC1GT50 VHC1G66 VHC1GT66


    Original     		PDF VHC1G00 VHC1GT00 VHC1G01 VHC1G02 VHC1GT02 VHC1G03 VHC1GT03 VHC1G04 VHC1GT04 VHC1GU04 74AHC1G132 ttl inverter TTL 3 input or gate VHC1G50 74 ttl inverter or gate TTL nand 74AHCT1G132 VHC1GT50 VHC1G04 VHC1GT04

    full subtractor circuit using decoder

    Abstract: full subtractor circuit using nor gates tdb 158 dp VHDL program 4-bit adder 8 bit carry select adder verilog codes full subtractor circuit using nand gate full adder circuit using nor gates full subtractor circuit using nand gates full subtractor circuit nand gates 0-99 counter by using 4 dual jk flip flop
    Text: CLA70000 Series High Density CMOS Gate Arrays DS2462 Recent advances in CMOS processing technology and improvements in design architecture have led to the development of a new generation of array-based ASIC products with vastly improved gate integration densities. This


    Original     		PDF CLA70000 DS2462 full subtractor circuit using decoder full subtractor circuit using nor gates tdb 158 dp VHDL program 4-bit adder 8 bit carry select adder verilog codes full subtractor circuit using nand gate full adder circuit using nor gates full subtractor circuit using nand gates full subtractor circuit nand gates 0-99 counter by using 4 dual jk flip flop

    full adder circuit using nor gates

    Abstract: full subtractor circuit using nand gate full subtractor circuit using nor gates full subtractor circuit using decoder 8 bit carry select adder verilog codes half adder 74 full subtractor circuit nand gates 8 bit subtractor 3 bit carry select adder verilog codes full subtractor circuit using nand gates
    Text: CLA70000 Series High Density CMOS Gate Arrays DS2462 Recent advances in CMOS processing technology and improvements in design architecture have led to the development of a new generation of array-based ASIC products with vastly improved gate integration densities. This


    Original     		PDF CLA70000 DS2462 full adder circuit using nor gates full subtractor circuit using nand gate full subtractor circuit using nor gates full subtractor circuit using decoder 8 bit carry select adder verilog codes half adder 74 full subtractor circuit nand gates 8 bit subtractor 3 bit carry select adder verilog codes full subtractor circuit using nand gates

    8 bit carry select adder verilog codes

    Abstract: full subtractor circuit using decoder 3 bit carry select adder verilog codes tdb 158 dp gec plessey semiconductor full subtractor circuit using nor gates full adder circuit using nor gates mc2870 VHDL program 4-bit adder 8 bit subtractor
    Text: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MARCH 1992 2462 - 3.1 CLA70000 SERIES HIGH DENSITY CMOS GATE ARRAYS Supersedes January 1992 edition - version 2.1 Recent advances in CMOS processing technology and improvements in design architecture have led to the


    Original     		PDF CLA70000 8 bit carry select adder verilog codes full subtractor circuit using decoder 3 bit carry select adder verilog codes tdb 158 dp gec plessey semiconductor full subtractor circuit using nor gates full adder circuit using nor gates mc2870 VHDL program 4-bit adder 8 bit subtractor

    vhc165

    Abstract: TTL nand VHC16245 vhc08 toshiba 74VHC540 16 bit counter with latch VHC4020 VHC16244 VHCT237 "J-K Flip flop"
    Text: HC Portfolio Comparison PART # VHC00 VHCT00 VHC01 VHC02 VHCT02 VHC03 VHCT03 VHC04 VHCT04 VHCU04 VHC05 VHCT05 VHC07 VHC08 VHCT08 VHC09 VHC10 VHCT10 VHC11 VHCT11 VHC14 VHCT14 VHC20 VHCT20 VHC21 VHCT21 VHC27 VHCT27 VHC30 VHCT30 VHC32 VHCT32 VHC42 VHCT42 VHC50


    Original     		PDF VHC00 VHCT00 VHC01 VHC02 VHCT02 VHC03 VHCT03 VHC04 VHCT04 VHCU04 vhc165 TTL nand VHC16245 vhc08 toshiba 74VHC540 16 bit counter with latch VHC4020 VHC16244 VHCT237 "J-K Flip flop"

    mc10123

    Abstract: mc10198 ECL binary Counter MC10H135
    Text: Numeric Data Sheet Listing MECL 10H Data Sheets MC10H016 4–Bit Binary Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 MC10H100 Quad 2–Input NOR Gate With Strobe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


    Original     		PDF MC10H016 MC10H100 MC10H101 MC10H102 MC10H103 MC10H104 MC10H105 MC10H106 MC10H107 MC10H109 mc10123 mc10198 ECL binary Counter MC10H135

    74LS80

    Abstract: 74LS198 74LS150 74LS94 OAI32 74LS179 TTL 74LS198 MUX21H TTL 74ls138 to 7 segment 7476 3 bit ripple counter
    Text: 4flE ]> • 77MLjbciO 0001L3M 4bO « P C H T- °J EK-044-9004 CMOS Gate Array 5GV Series RICOH CORP/ ELECTRONIC The RICOH gate array 5GV series complies with the CMOS 1.5ju rule, and offers high speed operation with a gate delay time of 1.0 ns. The 5GV series inherits the rich library of 5GF gate array series. The cell library is compatible with


    OCR Scan     		PDF 77MLjbc 0001L3M TEK-044-9004 RSC-15 TBF368 M390C M393C CM16BR* M540C M541C 74LS80 74LS198 74LS150 74LS94 OAI32 74LS179 TTL 74LS198 MUX21H TTL 74ls138 to 7 segment 7476 3 bit ripple counter

    16-LINE TO 4-LINE PRIORITY ENCODERS

    Abstract: 74 series logic gates Flip flops "J-K Flip flops" J-K Flip flops NAND Gates HD74 Synchronous 8-Bit Binary Counters HD74S synchronous binary counter with latch
    Text: o V o la i \ \_ a . TTL H D 74/H D 74S Series I M A IN C HARACTERISTICS I PERFORMANCE (per gate Performance HD74 Series HD74S Series Propagation 10 ns 3 ns Delay Time Power 10 mW 20 m\V Dissipation Speed-Power 100 pJ 60 pJ Product O Series Param eter max)


    OCR Scan     		PDF HD74/HD74S HD74S HD74Series 16-bit DP-14 DP-16 DP-20 16-LINE TO 4-LINE PRIORITY ENCODERS 74 series logic gates Flip flops "J-K Flip flops" J-K Flip flops NAND Gates HD74 Synchronous 8-Bit Binary Counters synchronous binary counter with latch

    AOI31

    Abstract: RSC-15 74LS94 EK-044-9004 ic 74ls83 CSR b4c M240C 4520C M165C bf368
    Text: n n EK-044-9004 CMOS Gate Array 5GV Series The RICOH gate array 5GV series complies with the CMOS 1.5/i rule, and offers high speed operation with a gate delay time of 1.0 ns. The 5GV series inherits the rich library of 5GF gate array series. The cell library is compatible with


    OCR Scan     		PDF EK-044-9004 RSC-15 74LS165 74LS197 LS240 M390C M393C M540C 40I7C 4028C AOI31 74LS94 EK-044-9004 ic 74ls83 CSR b4c M240C 4520C M165C bf368

    16 bit comparator using 74*85 IC

    Abstract: 74LSI39 74LS80 shift register 74ls96 4 bit synchronous ic 7476 74ls150 74LS94 74ls91 counter OAI211 74ls179
    Text: EKG-3-8805 CMOS Gate Array 5GF Series • O u tlin e T he R icoh gate a rray 5GF series com plies w ith th e CMOS 1.5 m rule, and o ffe rs high speed o p e ra tio n w ith a gate delay tim e o f 1.0 ns. T he 5G F series in h e rits th e rich lib ra ry o f th e 5GH series, and th e S R A M and mask RO M can be used


    OCR Scan     		PDF EKG-3-8805 RSC-15 74LS279 74LS298 74LS353 74LS367A 74LS368A 74LS390 74LS393 74LS399 16 bit comparator using 74*85 IC 74LSI39 74LS80 shift register 74ls96 4 bit synchronous ic 7476 74ls150 74LS94 74ls91 counter OAI211 74ls179

    Untitled

    Abstract: No abstract text available
    Text: ATL80 Features * 0.8 |i drawn gate length combined with triple level metal provides outstanding speed/density performance. * All ATL80 arrays can operate at 5.0 volts and 3.3 volts for lowpower applications. The ATL80 series can also operate in a mixed voltage environment.


    OCR Scan     		PDF ATL80 ATL80 MIL-STD-883.

    atmel 819

    Abstract: atmel h 208 atl80 atmel 823
    Text: ATL80 Features * 0.8 |i drawn gate length combined with triple level metal provides outstanding speed/power performance * Design translation of existing ASIC, PLD and FPGA designs provide for easy alternate sourcing with equivalent performance * All ATL80 arrays can operate at 5.0 volts and 3.3 volts for lowpower applications


    OCR Scan     		PDF ATL80 ATL80 MlL-STD-883 atmel 819 atmel h 208 atmel 823

    fairchild military nand gates

    Abstract: 7400 fan-out cmos
    Text: O T National ÆjA Semiconductor F G C Series Advanced 2-Micron C M O S Gate Array Family Description Array Organization The FGC Series is an advanced, high performance CMOS gate array fam ily designed for LSI implementation of existing discrete logic systems


    OCR Scan     		PDF FGC6000 fairchild military nand gates 7400 fan-out cmos

    full subtractor circuit using decoder and nand ga

    Abstract: PLESSEY CLA LC28 full adder 2 bit ic GP144
    Text: RUG 1 .6 'M 1992 GEC PLESS EY . AUGUST 1992 S E M I C O N D U C T O R S CLA70000 SERIES HIGH DENSITY CMOS GATE ARRAYS S u p e rs e d e s M a rc h 1 9 9 2 ed itio n Recent advances in CMOS processing technology and im provem ents in design a rch ite ctu re have led to the


    OCR Scan     		PDF CLA70000 full subtractor circuit using decoder and nand ga PLESSEY CLA LC28 full adder 2 bit ic GP144