Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    320BALL Search Results

    320BALL Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    XC3S700A

    Abstract: xc3s200aft256 XC3S400AFT256 XC3S50A L01P L02P FG320 UG331 L05P xc3s400a ftg256
    Text: Spartan-3A FPGA Family: Data Sheet R DS529 July 10, 2007 Product Specification Module 1: Introduction and Ordering Information - DS529-1 v1.4.1 July 10, 2007 • • • • • • • Introduction Features Architectural and Configuration Overview General I/O Capabilities


    Original
    PDF DS529 DS529-1 DS529-2 DS529-3 XC3S50A XC3S200A FT256 DS529-4 XC3S700A xc3s200aft256 XC3S400AFT256 L01P L02P FG320 UG331 L05P xc3s400a ftg256

    MB91F594

    Abstract: MB91F59BC
    Text: FUJITSU SEMICONDUCTOR DATA SHEET DS705-00010-3v0-E 32-bit Microcontroller FR Family FR81S MB91590 Series * *


    Original
    PDF DS705-00010-3v0-E 32-bit FR81S MB91590 591BH/F591BHS/F592B/F592BS/F592BH/F592BHS MB91F594B/F594BS/F594BH/F594BHS/F596B /F596BS /F596BH /F596BHS* MB91F597B MB91F594 MB91F59BC

    89HPES16T7

    Abstract: PES16T7 SERDES 2.5
    Text: 89HPES16T7 Product Brief 16-Lane 7-Port PCI Express Switch Device Overview ◆ The 89HPES16T7 is a member of the IDT PRECISE family of PCI Express switching solutions. The PES16T7 is a 16-lane, 7-port peripheral chip that performs PCI Express Packet switching with a feature set


    Original
    PDF 89HPES16T7 16-Lane 89HPES16T7 PES16T7 16-lane, PES16T7 SERDES 2.5

    SPARTAN-3 XC3S400 PQ208

    Abstract: SPARTAN-3 XC3S400 pq208 architecture SPARTAN-3 XC3S400 tq144 SPARTAN-3 XC3S400 Spartan-3 FPGA Family XC3S4000-FG676 SPARTAN-3 XC3S400 pin SPARTAN-3 XC3S400 architecture XC3S4000FG676 XILINX SPARTAN VQG100
    Text: 06 Spartan-3 FPGA Family: Introduction and Ordering Information R DS099-1 v1.4 January 17, 2005 Preliminary Product Specification Introduction - The Spartan -3 family of Field-Programmable Gate Arrays is specifically designed to meet the needs of high volume,


    Original
    PDF DS099-1 XC3S50CP132, XC3S2000FG456, XC3S4000FG676 DS099-1, DS099-2, DS099-3, DS099-4, DS313, DS314-1, SPARTAN-3 XC3S400 PQ208 SPARTAN-3 XC3S400 pq208 architecture SPARTAN-3 XC3S400 tq144 SPARTAN-3 XC3S400 Spartan-3 FPGA Family XC3S4000-FG676 SPARTAN-3 XC3S400 pin SPARTAN-3 XC3S400 architecture XILINX SPARTAN VQG100

    REELS

    Abstract: CABGA 56
    Text: Product Bulletin November 2010 #PB1240I Lattice Ordering Guidelines for Custom Product and Tape and Reel Introduction Lattice “Custom Products” include the following: • Factory Pre-Programming Encryption & Non-Encryption  Custom Processing (Including custom testing, restricted material set, custom product


    Original
    PDF PB1240I 20-Pin 24-Pin 1-800-LATTICE REELS CABGA 56

    XCF00S

    Abstract: spartan 3a FGG900 DS099 XCN07010
    Text: ds313.fm Page 1 Friday, April 18, 2008 10:26 AM Spartan-3L Low Power FPGA Family R DS313 v1.2 April 18, 2008 Product Specification This product is undergoing discontinuance. Please refer to XCN07010, Product Discontinuation Notice, for more information on last-time purchases and replacement products.


    Original
    PDF ds313 DS313 XCN07010, SSTL18 XCF00S spartan 3a FGG900 DS099 XCN07010

    xc3s500e fg320

    Abstract: intel strataflash j3d SPARTAN 3E STARTER BOARD transistor tt 2222 pin configuration 500K variable resistor eeprom programmer schematic winbond AT45DB AT49 jtag cable Schematic XC3S500E spartan 3a
    Text: Spartan-3E FPGA Family: Complete Data Sheet R DS312 April 18, 2008 Product Specification Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics DS312-1 v3.7 April 18, 2008 DS312-3 (v3.7) April 18, 2008 • • • •


    Original
    PDF DS312 DS312-1 DS312-3 DS312-2 XC3S500E VQG100 DS312-4 xc3s500e fg320 intel strataflash j3d SPARTAN 3E STARTER BOARD transistor tt 2222 pin configuration 500K variable resistor eeprom programmer schematic winbond AT45DB AT49 jtag cable Schematic spartan 3a

    Untitled

    Abstract: No abstract text available
    Text: Package Diagrams Index of Package Diagrams 100-Pin TQFP . 100-Ball BGA . 120-Pin PQFP .


    Original
    PDF 100-Pin 100-Ball 120-Pin 128-Pin 133-Pin 144-Ball 160-Pin 176-Pin

    AA13

    Abstract: AA19 AC11 AC13 AD12
    Text: ispLSI 3320 In-System Programmable High Density PLD Functional Block Diagram J0 Output Routing Pool ORP G3 F3 G2 G1 G0 F2 F1 F0 E3 D Q D Q H1 E2 OR Array D Q E1 H2 H3 D Q D Q OR Array Twin GLB E0 D Q D3 D Q D2 I1 D Q I2 D1 I3 D0 C3 Global Routing Pool


    Original
    PDF 212A/3320 3320-100LQ 208-Pin 3320-100LB320 320-Ball 3320-100LM* 3320-70LQ 3320-70LB320 AA13 AA19 AC11 AC13 AD12

    digital graphic equalizer ic

    Abstract: idt tcam Broadcom WLAN 4 pin loco crystal oscillator HDTV sync generator DDR3 rDIMM Broadcom TCAM lvds MUX/DEMUX SE 135 ddr2 ram
    Text: Quick Reference Guide Table of Contents Page URL Clock Generator/Synthesizer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3


    Original
    PDF 79RC32438 16/16-KB 32-bit 16-bit 32-bits, 1-08/DG/BWD/HOP/2K QRG-CORP-0018 digital graphic equalizer ic idt tcam Broadcom WLAN 4 pin loco crystal oscillator HDTV sync generator DDR3 rDIMM Broadcom TCAM lvds MUX/DEMUX SE 135 ddr2 ram

    SPARTAN-3

    Abstract: DS099 XCF00S FGG900
    Text: ds313.fm Page 1 Thursday, September 15, 2005 11:39 AM Spartan-3L Low Power FPGA Family R DS313 v1.1 September 15, 2005 Preliminary Product Specification Introduction Spartan -3L Field-Programmable Gate Arrays (FPGAs) consume less static current than corresponding members


    Original
    PDF ds313 DS313 SSTL18 SPARTAN-3 DS099 XCF00S FGG900

    xc3s500e vq100

    Abstract: No abstract text available
    Text: 1 Spartan-3E FPGA Family Data Sheet DS312 July 19, 2013 Product Specification Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics DS312 v4.1 July 19, 2013 DS312 (v4.1) July 19, 2013 • Introduction • • Features


    Original
    PDF DS312 DS312 xc3s500e vq100

    Untitled

    Abstract: No abstract text available
    Text: Spartan-3A FPGA Family: Data Sheet R DS529 April 23, 2007 Product Specification - Detailed Descriptions by Mode • Master Serial Mode using Platform Flash PROM · Master SPI Mode using Commodity Serial Flash · Master BPI Mode using Commodity Parallel Flash


    Original
    PDF DS529 UG330: DS529-1 XC3S50A XC3S200A FT256 DS529-4

    spi flash programmer schematic

    Abstract: UG332 spi flash spartan 6 AT45DB642D Numonyx M25P128 MultiBoot service manual proton 1100 quick 850a interface of IR SENSOR with SPARTAN3 FPGA eprom e spi flash
    Text: Spartan-3 Generation Configuration User Guide Extended Spartan-3A, Spartan-3E, and Spartan-3 FPGA Families UG332 v1.5 March 16, 2009 R R Xilinx is disclosing this user guide, manual, release note, and/or specification (the "Documentation") to you solely for use in the development


    Original
    PDF UG332 X8Y15 SRL16 spi flash programmer schematic UG332 spi flash spartan 6 AT45DB642D Numonyx M25P128 MultiBoot service manual proton 1100 quick 850a interface of IR SENSOR with SPARTAN3 FPGA eprom e spi flash

    FG320

    Abstract: FGG320
    Text: R Fine-Pitch BGA FG320/FGG320 Package PK071 (v1.2.1) March 23, 2005 320-BALL FINE-PITCH BGA (FG320/FGG320) 2004, 2005 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.


    Original
    PDF FG320/FGG320) PK071 320-BALL FG320 FGG320

    416-ball

    Abstract: 1152-ball 132-ball lattice fpbga 484 FPBGA
    Text: Product Bulletin April 2009 #PB1240H Lattice Ordering Guidelines for Custom Product and Tape and Reel Introduction Lattice “Custom Products” include the following: • Factory Programming • Custom Processing • Custom Testing • Custom Marking •


    Original
    PDF PB1240H 20-Pin 24-Pin 28-Pin 416-ball 1152-ball 132-ball lattice fpbga 484 FPBGA

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 3256E In-System Programmable High Density PLD Functional Block Diagram G3 H0 A0 A1 OR Array A2 A3 ORP ORP • IN-SYSTEM PROGRAMMABLE — 5V In-System Programmable ISP using Lattice ISP or Boundary Scan Test (IEEE 1149.1) Protocol — Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality


    Original
    PDF 3256E 0212/3256E 3256E-100LM 3256E-100LB320 3256E-70LM 3256E-70LB320 304-Pin 320-Ball

    SPARTAN-3 XC3S400 PQ208

    Abstract: AFG320 SPARTAN-3 XC3S400 microblaze XAPP462 XC3S200 PQ208 pin diagram xc3s400 pinout TQG144
    Text: Spartan-3 FPGA Family: Complete Data Sheet R DS099 July 13, 2004 Advance Product Specification This document includes all four modules of the Spartan -3 FPGA data sheet. Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics


    Original
    PDF DS099 DS099-1 DS099-3 DS099-4 DS099-1, DS099-2, DS099-3, DS099-4, SPARTAN-3 XC3S400 PQ208 AFG320 SPARTAN-3 XC3S400 microblaze XAPP462 XC3S200 PQ208 pin diagram xc3s400 pinout TQG144

    PES16T7

    Abstract: 89HPES16T7 89hpes16t7zhbxg 89HPES16T7ZH JESD-51 89hpes16t7zhbx
    Text: 89HPES16T7 Data Sheet 16-Lane 7-Port PCI Express Switch ® Device Overview ◆ The 89HPES16T7 is a member of the IDT PRECISE family of PCI Express switching solutions. The PES16T7 is a 16-lane, 7-port peripheral chip that performs PCI Express packet switching with a feature set


    Original
    PDF 89HPES16T7 16-Lane 89HPES16T7 PES16T7 16-lane, BX320 320-ball BXG320 89hpes16t7zhbxg 89HPES16T7ZH JESD-51 89hpes16t7zhbx

    xc3s1200e fg320

    Abstract: XC3S250E vqg100 SST25LFxxxA xc3s100 LVCMOS12 XC3S500E-FT256 Macronix Lot Identifier XC3S1200E-FG320 IPL34 MX25Lxxxx
    Text: Spartan-3E FPGA Family: Complete Data Sheet R DS312 November 23, 2005 Advance Product Specification Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics DS312-1 v2.0 November 23, 2005 8 pages DS312-3 (v2.0) November 23, 2005


    Original
    PDF DS312 DS312-1 DS312-3 DS312-2 FG400 DS312-1, DS312-2, DS312-3, DS312-4, DS312-4 xc3s1200e fg320 XC3S250E vqg100 SST25LFxxxA xc3s100 LVCMOS12 XC3S500E-FT256 Macronix Lot Identifier XC3S1200E-FG320 IPL34 MX25Lxxxx

    XC3S100E TQG144

    Abstract: XC3S500E FGG320 FR 309 diode
    Text: Spartan-3E FPGA Family: Complete Data Sheet R DS312 May 19, 2006 Preliminary Product Specification Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics DS312-1 v3.0 March 22, 2006 DS312-3 (v3.2) May 19, 2006 • •


    Original
    PDF DS312 DS312-1 DS312-3 DS312-2 XC3S100E CP132 XC3S1600E FG320 XC3S100E TQG144 XC3S500E FGG320 FR 309 diode

    XC3S400 PQG208

    Abstract: 3S400 Xilinx XCF08P SPARTAN-3 XC3S400 pq208 architecture XC3S200 RELIABILITY REPORT SPARTAN-3 XC3S400 PQ208 216-0304 XC3S400 TQg144
    Text: Spartan-3 FPGA Family: Complete Data Sheet R DS099 July 13, 2004 Advance Product Specification This document includes all four modules of the Spartan -3 FPGA data sheet. Module 1: Introduction and Ordering Information Module 3: DC and Switching Characteristics


    Original
    PDF DS099 DS099-1 DS099-3 DS099-4 DS099-1, DS099-2, DS099-3, DS099-4, XC3S400 PQG208 3S400 Xilinx XCF08P SPARTAN-3 XC3S400 pq208 architecture XC3S200 RELIABILITY REPORT SPARTAN-3 XC3S400 PQ208 216-0304 XC3S400 TQg144

    3256E

    Abstract: No abstract text available
    Text: ispLSI 3256E In-System Programmable High Density PLD Functional Block Diagram G3 H0 A0 A1 OR Array A2 A3 ORP ORP • IN-SYSTEM PROGRAMMABLE — 5V In-System Programmable ISP using Lattice ISP or Boundary Scan Test (IEEE 1149.1) Protocol — Increased Manufacturing Yields, Reduced Time-toMarket, and Improved Product Quality


    Original
    PDF 3256E 0212/3256E 3256E-100LM 304-Pin 3256E-100LB320 320-Ball 3256E-70LM 3256E

    CXO 049

    Abstract: GX6101 CXO 043 BX61 CI043 CXO 046 ci pal 014 V/ci pal 014
    Text: MACH 4 CPLD Family BEYOND PERFO R M A N CE High Performance EE CMOS Programmable Logic FEATURES ♦ High-performance, EE CMOS 3.3-V & 5-V CPLD families ♦ Flexible architecture for rapid logic designs — Excellent First-Tim e-Fit and refit feature — SpeedLocking™ performance for guaranteed fixed timing


    OCR Scan
    PDF M4A3-256/128-7YC10YI CXO 049 GX6101 CXO 043 BX61 CI043 CXO 046 ci pal 014 V/ci pal 014