MH89793
Abstract: MT8979 MT9079
Text: MH89793 E1 Line Interface Unit LIU with Selectable Impedance Preliminary Information Features DS5419 ISSUE 2 June 1996 Ordering Information • • • • • • • • Complete primary rate 2048kbit/s E1 line driver and receiver with clock recovery Meets ETSI requirements [ETSI ETS 300 011,
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MH89793
DS5419
2048kbit/s
MT8979,
MT9079
MH89793
MT8979
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MH89793
Abstract: MT8979 MT9079
Text: MH89793 E1 Line Interface Unit LIU with Selectable Impedance Preliminary Information Features DS5419 ISSUE 2 June 1996 Ordering Information • • • • • • • • Complete primary rate 2048kbit/s E1 line driver and receiver with clock recovery Meets ETSI requirements [ETSI ETS 300 011,
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Original
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PDF
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MH89793
DS5419
2048kbit/s
MT8979,
MT9079
MH89793
MT8979
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MH89793
Abstract: MT8979 MT9079 zarlink PDIP
Text: MH89793 E1 Line Interface Unit LIU with Selectable Impedance Preliminary Information Features DS5419 ISSUE 2 June 1996 Ordering Information • • • • • • • • Complete primary rate 2048kbit/s E1 line driver and receiver with clock recovery Meets ETSI requirements [ETSI ETS 300 011,
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Original
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PDF
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MH89793
DS5419
2048kbit/s
MT8979,
MT9079
MH89793
MT8979
zarlink PDIP
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Untitled
Abstract: No abstract text available
Text: MH89793 E1 Line Interface Unit LIU with Selectable Impedance Preliminary Information Features DS5419 ISSUE 2 June 1996 Ordering Information • • • • • • • • Complete primary rate 2048kbit/s E1 line driver and receiver with clock recovery Meets ETSI requirements [ETSI ETS 300 011,
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Original
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PDF
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MH89793
2048kbit/s
MT8979,
MT9079
DS5419
MH89793
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Untitled
Abstract: No abstract text available
Text: MH89792 E1 Line Interface Unit LIU Data Sheet Features DS5712 Issue 4 March 2002 Ordering Information • Complete primary rate 2048kbit/s E1line driver and receiver with clock recovery • Meets ETSI requirements (ETSI ETS 300 011, NET 5) Onboard pulse transformers for transmit and
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Original
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PDF
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MH89792
2048kbit/s
MT8979,
MT9079
490mm2
DS5712
MH89792-1
MH89792-2
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MH89792
Abstract: MH89792-1 MH89792-2 MT8979 MT9041 MT9079 PCM30 RJ48C
Text: MH89792 E1 Line Interface Unit LIU Data Sheet Features DS5712 Issue 4 March 2002 Ordering Information • Complete primary rate 2048kbit/s E1line driver and receiver with clock recovery • Meets ETSI requirements (ETSI ETS 300 011, NET 5) Onboard pulse transformers for transmit and
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Original
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PDF
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MH89792
DS5712
2048kbit/s
MT8979,
MT9079
490mm2
MH89792-1
MH89792-2
MH89792
MH89792-1
MT8979
MT9041
PCM30
RJ48C
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MH89793
Abstract: MT8979 MT9079 EW 90
Text: MH89793 E1 Line Interface Unit LIU with Selectable Impedance Preliminary Information Features DS5419 ISSUE 2 June 1996 Ordering Information • • • • • • • • Complete primary rate 2048kbit/s E1 line driver and receiver with clock recovery Meets ETSI requirements [ETSI ETS 300 011,
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Original
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PDF
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MH89793
DS5419
2048kbit/s
MT8979,
MT9079
MH89793
MT8979
EW 90
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MH89792
Abstract: MT9079 PCM30 RJ48C MH89792-1 MH89792-2 MT8979 MT9041 TPEC
Text: MH89792 E1 Line Interface Unit LIU Preliminary Information ISSUE 4 Features • • • • • • • • • Complete primary rate 2048kbit/s E1line driver and receiver with clock recovery Meets ETSI requirements (ETSI ETS 300 011, NET 5) Onboard pulse transformers for transmit and
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Original
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PDF
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MH89792
2048kbit/s
MT8979,
MT9079
490mm
MH89792
PCM30
RJ48C
MH89792-1
MH89792-2
MT8979
MT9041
TPEC
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MH89793
Abstract: MT8979 MT9041 MT9079 PCM30 RJ48C RZA 18 RJ48
Text: MH89793 E1 Line Interface Unit LIU with Selectable Impedance Preliminary Information Features ISSUE 2 June 1996 Ordering Information • • • • • • • • Complete primary rate 2048kbit/s E1 line driver and receiver with clock recovery Meets ETSI requirements [ETSI ETS 300 011,
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Original
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PDF
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MH89793
2048kbit/s
MT8979,
MT9079
MH89793
MT8979
MT9041
PCM30
RJ48C
RZA 18
RJ48
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Zarlink Pin Compatible
Abstract: No abstract text available
Text: MH89793 E1 Line Interface Unit LIU with Selectable Impedance Preliminary Information Features DS5419 ISSUE 2 June 1996 Ordering Information • • • • • • • • Complete primary rate 2048kbit/s E1 line driver and receiver with clock recovery Meets ETSI requirements [ETSI ETS 300 011,
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Original
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PDF
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MH89793
2048kbit/s
MT8979,
MT9079
DS5419
MH89793
Zarlink Pin Compatible
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MH89792
Abstract: MH89792-1 MH89792-2 MT8979 MT9041 MT9079 PCM30 RJ48C VOH24
Text: MH89792 E1 Line Interface Unit LIU Data Sheet Features DS5712 Issue 4 March 2002 Ordering Information • Complete primary rate 2048kbit/s E1line driver and receiver with clock recovery • Meets ETSI requirements (ETSI ETS 300 011, NET 5) Onboard pulse transformers for transmit and
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Original
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PDF
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MH89792
DS5712
2048kbit/s
MT8979,
MT9079
490mm2
MH89792-1
MH89792-2
MH89792
MH89792-1
MT8979
MT9041
PCM30
RJ48C
VOH24
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RXB 24
Abstract: MH89792 MH89792-1 MH89792-2 MT8979 MT9041 MT9079 PCM30 RJ48C
Text: MH89792 E1 Line Interface Unit LIU Preliminary Information ISSUE 4 Features • • • • • • • • • Complete primary rate 2048kbit/s E1line driver and receiver with clock recovery Meets ETSI requirements (ETSI ETS 300 011, NET 5) Onboard pulse transformers for transmit and
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Original
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PDF
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MH89792
2048kbit/s
MT8979,
MT9079
490mm
RXB 24
MH89792
MH89792-1
MH89792-2
MT8979
MT9041
PCM30
RJ48C
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RXB 24
Abstract: No abstract text available
Text: MH89792 E1 Line Interface Unit LIU Data Sheet Features DS5712 Issue 4 March 2002 Ordering Information • Complete primary rate 2048kbit/s E1line driver and receiver with clock recovery • Meets ETSI requirements (ETSI ETS 300 011, NET 5) Onboard pulse transformers for transmit and
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Original
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PDF
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MH89792
2048kbit/s
MT8979,
MT9079
490mm2
DS5712
MH89792-1
MH89792-2
MH89792
RXB 24
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MT90812AL1
Abstract: TGE-5 EB32
Text: MT90812 Integrated Digital Switch IDX Advance Information Mar 2011 Features • • • • • • • • • • • • • • • • • • MT90812AP MT90812AL MT90812APR MT90812AP1 MT90812AL1 MT90812APR1 192 channel x 192 channel non-blocking switching
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MT90812
-27dB,
MT90812AL1
TGE-5
EB32
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Untitled
Abstract: No abstract text available
Text: IßTEXAR X R -T 6 166 Codirectional Digital Data Processor FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION The XR-T6166 is a digital CM O S circuit which performs the interface function betweeh a 64kbit/s data stream and a 2048kbit/s PCM timeslot data channel. When
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PDF
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XR-T6166
64kbit/s
2048kbit/s
XR-T6164,
XR-T6166
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Untitled
Abstract: No abstract text available
Text: MH89792 MITEL E1 Line Interface Unit LIU Preliminary Information Features • ISSUE 4 Complete prim ary rate 2048kbit/s E1 line driver and receiver with clock recovery MH89792-1 MH89792-2 Meets ETSI requirements (ETSI ETS 300 011, NET 5) Onboard pulse transformers for transm it and
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OCR Scan
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PDF
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MH89792
2048kbit/s
MH89792-1
MH89792-2
MT8979,
MT9079
490mm2
MH89792
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Untitled
Abstract: No abstract text available
Text: J T E X A R XR-T6165 Codirectional Digital Data Processor PIN ASSIGNMENT GENERAL DESCRIPTION The XR-T6165 is a digital CMOS circuit which performs the interface function between a 64Kbit/s data stream and a 2048Kbit/s PCM timeslot data channel. When used in
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PDF
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XR-T6165
XR-T6165
64Kbit/s
2048Kbit/s
XR-T6164,
64Kbit/s
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clock alarm circuit diagram
Abstract: No abstract text available
Text: 22* E X 4 R XR-T6166 Codirectional Digital Data Processor FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION The XR-T6166 is a digital CMOS circuit which performs the interface function between a 64Kbit/s data stream and a 2048Kbit/s PCM timeslot data channel. When used in
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OCR Scan
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PDF
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XR-T6166
64Kbit/s
2048Kbit/s
XR-T6164,
clock alarm circuit diagram
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Untitled
Abstract: No abstract text available
Text: EX4R XR-T6165 Codirectional Digital Data Processor PIN ASSIGNMENT GENERAL DESCRIPTION The XR-T6165 is a digital CMOS circuit which performs the interface function between a 64Kbit/s data stream and a 2048Kbit/s PCM timeslot data channel. When used in conjunction with the XR-T6164, the XR-T6165 conforms
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OCR Scan
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PDF
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XR-T6165
64Kbit/s
2048Kbit/s
XR-T6164,
XR-T6165
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Untitled
Abstract: No abstract text available
Text: E1 Line Interface Unit LIU with Selectable Impedance Preliminary Information Features ISSUE 2 • Complete primary rate 2048kbit/s E1 line driver and receiver with clock recovery • Meets ETSI requirements [ETSI ETS 300 011, NET 5] • Built-in selectable term ination impedance
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OCR Scan
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PDF
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2/75a)
MT8979,
MT9079
MH89793
2048kbit/s
b24T370
MH89793
bS4T37Q
0012QÃ
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Untitled
Abstract: No abstract text available
Text: XR-T6166 Codirectional Digital Data Processor FUNCTIONAL BLOCK DIAGRAM G EN ERA L DESCRIPTION The XR-T6166 is a digital CM OS circuit which performs the interface function between a 64Kbit/s data stream and a 2048Kbit/s PCM tim eslot data channel. When used in
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OCR Scan
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PDF
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XR-T6166
XR-T6166
64Kbit/s
2048Kbit/s
XR-T6164,
64Kbit/s
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ftz 951
Abstract: G793 G-743
Text: Frame and Line Interface Component FALC 54 PEB 2254 General Information The Frame and Line Interface Component PEB 2254 (FALC54) is a high sophisticated single chip solution for primary rate PCM carriers. It may be programmed to operate in 1.544-Mbit/s (T1) or 2.048-Mbit/s (CEPT) carrier systems.
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FALCTM54)
FALC54)
544-Mbit/s
048-Mbit/s
FALC54
PCM24
8/16-bit
P-MQFP-80
ftz 951
G793
G-743
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Untitled
Abstract: No abstract text available
Text: vm IMP8980D PCM Digital Switch General Description Functional Description This CMOS device is designed for switching PCM -encoded voice or data, under microprocessor control, in a modern digital exchange, PBX or Central Office. It provides simultaneous connections for up
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IMP8980D
64kbit/s
2048kbit/s
IMP8980D
IMP8980DC
IMP8980DE
IMP8980DP
IMP8980DL
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TDD 1605
Abstract: lt 6029 PLCC-44 cr16 0.8um tg-500 L3000N L3000S PLCC44 SEL24 STLC3040
Text: STLC3040 S U BSC R IBER LINE INTERFACE CODEC FILTER, CO FISLIC PRELIM IN ARY DATA PLCC44 O RDERING NUM BER: STLC3040FN Figure 1 : Pin Connection Top view o > [ « [ <° \ Single chip CODEC and FILTER including all LOW-VOLTAGE SLIC functions. Advanced 12V BJT, 5V CMOS 0.8um technol
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STLC3040
PLCC44
TDD 1605
lt 6029
PLCC-44 cr16
0.8um
tg-500
L3000N
L3000S
SEL24
STLC3040
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